JPS54155777A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54155777A
JPS54155777A JP6476878A JP6476878A JPS54155777A JP S54155777 A JPS54155777 A JP S54155777A JP 6476878 A JP6476878 A JP 6476878A JP 6476878 A JP6476878 A JP 6476878A JP S54155777 A JPS54155777 A JP S54155777A
Authority
JP
Japan
Prior art keywords
wafer
metal layers
ohmic
type
ohmic metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6476878A
Other languages
Japanese (ja)
Other versions
JPS617018B2 (en
Inventor
Shigenobu Murashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP6476878A priority Critical patent/JPS54155777A/en
Publication of JPS54155777A publication Critical patent/JPS54155777A/en
Publication of JPS617018B2 publication Critical patent/JPS617018B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To quicken the feedback of a defective product by providing one element at a wafer circumference part with ohmic metal layers and then by appreciating this before providing all semiconductor element formed on the semiconductor wafer with ohmic metal layers.
CONSTITUTION: Inside of the P-type layer of wafer 1 consisting of a N-type semiconductor substrate and the P-type layer, several N-type regions are formed and all covered with oxidized film 2 and window holes 3 is made in fixed regions. Next, at least one element at the circumference part of wafer 1 is provided with ohmic electrode layers 4c and 4d and ohmic metal layers 4 are bonded to all surfaces of remaining parts, namely, the surface of wafer 1 and film 2 exposed in window holes 3. Then, a sintering treatment is done and a check on electric characteristics such as a forward current is made by making use of metal layers 4c and 4d. At this time, when an excellent result is obtained, the reverse surface of wafer 1 is polished to a fixed thickness, the unneeded parts of metal layers 4 are removed to obtaine electrodes 4a and 4c, and electrode 5 is also provided to the reverse surface of wafer 1.
COPYRIGHT: (C)1979,JPO&Japio
JP6476878A 1978-05-29 1978-05-29 Manufacture of semiconductor device Granted JPS54155777A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6476878A JPS54155777A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6476878A JPS54155777A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS54155777A true JPS54155777A (en) 1979-12-08
JPS617018B2 JPS617018B2 (en) 1986-03-03

Family

ID=13267694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6476878A Granted JPS54155777A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54155777A (en)

Also Published As

Publication number Publication date
JPS617018B2 (en) 1986-03-03

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