JPS54154951A - Microprogram control circuit - Google Patents

Microprogram control circuit

Info

Publication number
JPS54154951A
JPS54154951A JP6398178A JP6398178A JPS54154951A JP S54154951 A JPS54154951 A JP S54154951A JP 6398178 A JP6398178 A JP 6398178A JP 6398178 A JP6398178 A JP 6398178A JP S54154951 A JPS54154951 A JP S54154951A
Authority
JP
Japan
Prior art keywords
block
supplied
clock signals
blocks
microorder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6398178A
Other languages
Japanese (ja)
Inventor
Hitomi Ayusawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP6398178A priority Critical patent/JPS54154951A/en
Publication of JPS54154951A publication Critical patent/JPS54154951A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To stop the operation of the unnecessary block and thus to realize the power saving by supplying the clock signals only to the necessary blocks via the microorder.
CONSTITUTION: The microprogram stored in ROM7 is drawn out according to the value of program counter 9 and then decided through order decoder 11 in order to control the necessary blocks. The number of the blocks is limited for one microproorder. In this connection, the clock signals delivered from clock signal circuit 6 are supplied individually to each block, and thus the clock signals are supplied only to the necessary blocks by the microorder decoded. As a result, no clock signal is supplied to the block the operation of which is not required at that moment, thus reducing the power consumption for the circuit.
COPYRIGHT: (C)1979,JPO&Japio
JP6398178A 1978-05-29 1978-05-29 Microprogram control circuit Pending JPS54154951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6398178A JPS54154951A (en) 1978-05-29 1978-05-29 Microprogram control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6398178A JPS54154951A (en) 1978-05-29 1978-05-29 Microprogram control circuit

Publications (1)

Publication Number Publication Date
JPS54154951A true JPS54154951A (en) 1979-12-06

Family

ID=13244961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6398178A Pending JPS54154951A (en) 1978-05-29 1978-05-29 Microprogram control circuit

Country Status (1)

Country Link
JP (1) JPS54154951A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145458A (en) * 1985-12-20 1987-06-29 Nec Corp Microcomputer
JPS63178620A (en) * 1987-01-19 1988-07-22 Nec Corp Clock strobe circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145458A (en) * 1985-12-20 1987-06-29 Nec Corp Microcomputer
JPS63178620A (en) * 1987-01-19 1988-07-22 Nec Corp Clock strobe circuit

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