JPS54153560A - Converter between digital and analog - Google Patents

Converter between digital and analog

Info

Publication number
JPS54153560A
JPS54153560A JP6163878A JP6163878A JPS54153560A JP S54153560 A JPS54153560 A JP S54153560A JP 6163878 A JP6163878 A JP 6163878A JP 6163878 A JP6163878 A JP 6163878A JP S54153560 A JPS54153560 A JP S54153560A
Authority
JP
Japan
Prior art keywords
row
memory cells
correction
current
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6163878A
Other languages
Japanese (ja)
Inventor
Yoshihito Amamiya
Kotaro Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP6163878A priority Critical patent/JPS54153560A/en
Publication of JPS54153560A publication Critical patent/JPS54153560A/en
Pending legal-status Critical Current

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Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To correct the relative accuracy of each row externally, after the end of manufacturing process, by providing the correction circuit with the AD and DA converters having the weighted current row, resistance row or capacitance row.
CONSTITUTION: Non-volatile memory cells are constituted by using P-MOS type Tr for Q61 to Q67 and P-MOS type Tr of floating gate for Q71 to Q77. Q81 to Q87 are analog switches 4 to connect the correction capacitors C/2, C, 2C, 4C to the reference capacitors 28C and 14C preset, and the current, resistor and capacitor for correction are respectively connected to the reference current, reference resistor, and reference capacitor preset depending on the memory state of the memory cells. P1 to P7 are electrodes to write in the memory cells. Further, the analog switches are conductive or non-conductive so that the capacitance viewed from the terminal 60 is 32C and that from the terminal 50 is 16C.
COPYRIGHT: (C)1979,JPO&Japio
JP6163878A 1978-05-25 1978-05-25 Converter between digital and analog Pending JPS54153560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6163878A JPS54153560A (en) 1978-05-25 1978-05-25 Converter between digital and analog

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6163878A JPS54153560A (en) 1978-05-25 1978-05-25 Converter between digital and analog

Publications (1)

Publication Number Publication Date
JPS54153560A true JPS54153560A (en) 1979-12-03

Family

ID=13176941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6163878A Pending JPS54153560A (en) 1978-05-25 1978-05-25 Converter between digital and analog

Country Status (1)

Country Link
JP (1) JPS54153560A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5738025A (en) * 1980-08-19 1982-03-02 Sanyo Electric Co Ltd Digital-to-analog converter
US6100837A (en) * 1998-01-14 2000-08-08 Mitsubishi Denki Kabushiki Kaisha A-D converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5738025A (en) * 1980-08-19 1982-03-02 Sanyo Electric Co Ltd Digital-to-analog converter
US6100837A (en) * 1998-01-14 2000-08-08 Mitsubishi Denki Kabushiki Kaisha A-D converter

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