JPS54132145A - False random code generator - Google Patents

False random code generator

Info

Publication number
JPS54132145A
JPS54132145A JP4097478A JP4097478A JPS54132145A JP S54132145 A JPS54132145 A JP S54132145A JP 4097478 A JP4097478 A JP 4097478A JP 4097478 A JP4097478 A JP 4097478A JP S54132145 A JPS54132145 A JP S54132145A
Authority
JP
Japan
Prior art keywords
output
circuit
constitution
random code
abnormal state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4097478A
Other languages
Japanese (ja)
Other versions
JPS5531501B2 (en
Inventor
Toshio Kikuchi
Shinzo Koo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4097478A priority Critical patent/JPS54132145A/en
Publication of JPS54132145A publication Critical patent/JPS54132145A/en
Publication of JPS5531501B2 publication Critical patent/JPS5531501B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Abstract

PURPOSE:To obtain a false random code generator featuring period 2<n> by inverting one signal of the feedback circuit after detecting the abnormal state in which the output are all 1 or 0 for the 1st to n-1 steps of the n-step series shift register SR. CONSTITUTION:Detector circuit 3 detects 0 or 1 of starting n-1 bit of n-bit SR1, and thus Qi of one input of feedback circuit 2 is inverted via inversion circuit 4. As a result, output Q of circuit 2 is inverted to be fed back to the input of SR1. When SR1 reads in the output with the next clock, the abnormal state under which the output are all 0 or 1 is inserted to the sequence. With this constitution, the period of 2<n>-1 turns to 2<n>. In other words, the state of 2<n> can be secured with the nature approximate to the M-system false random code, thus securing applcation of the binary notation. Furthermore, the abnormal state detector circuit is omitted, thus simplifying the constitution. And the deterioration of the random performance can be ignored substantially with 50% of growing probability of 1/0.
JP4097478A 1978-04-06 1978-04-06 False random code generator Granted JPS54132145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4097478A JPS54132145A (en) 1978-04-06 1978-04-06 False random code generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4097478A JPS54132145A (en) 1978-04-06 1978-04-06 False random code generator

Publications (2)

Publication Number Publication Date
JPS54132145A true JPS54132145A (en) 1979-10-13
JPS5531501B2 JPS5531501B2 (en) 1980-08-19

Family

ID=12595411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4097478A Granted JPS54132145A (en) 1978-04-06 1978-04-06 False random code generator

Country Status (1)

Country Link
JP (1) JPS54132145A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01253320A (en) * 1988-03-31 1989-10-09 Nec Corp Cyclic encoding circuit
JPH0277860A (en) * 1988-04-01 1990-03-16 Digital Equip Corp <Dec> Storage-device self-testing method and device
JPH02216551A (en) * 1988-12-27 1990-08-29 Sony Tektronix Corp Data generating frequency analyzer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01253320A (en) * 1988-03-31 1989-10-09 Nec Corp Cyclic encoding circuit
JPH0277860A (en) * 1988-04-01 1990-03-16 Digital Equip Corp <Dec> Storage-device self-testing method and device
JPH02216551A (en) * 1988-12-27 1990-08-29 Sony Tektronix Corp Data generating frequency analyzer

Also Published As

Publication number Publication date
JPS5531501B2 (en) 1980-08-19

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