FR2402970A1 - Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory - Google Patents

Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory

Info

Publication number
FR2402970A1
FR2402970A1 FR7727626A FR7727626A FR2402970A1 FR 2402970 A1 FR2402970 A1 FR 2402970A1 FR 7727626 A FR7727626 A FR 7727626A FR 7727626 A FR7727626 A FR 7727626A FR 2402970 A1 FR2402970 A1 FR 2402970A1
Authority
FR
France
Prior art keywords
flops
flip
digital signal
sequence generator
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7727626A
Other languages
French (fr)
Inventor
Francois Nectoux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Le Materiel Telephonique Thomson CSF
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Le Materiel Telephonique Thomson CSF filed Critical Le Materiel Telephonique Thomson CSF
Priority to FR7727626A priority Critical patent/FR2402970A1/en
Publication of FR2402970A1 publication Critical patent/FR2402970A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The digital signal generator provides a series of numbers binary coded in the base B, where B = 2n. The series includes each number of the series B times, and each time a number appears it is preceded and followed by a different number. The series is generated by an assembly of n cells, each cell containing a pair of JK flipflops mounted in cascade. The input K, of the first is connected to the output of the second, and the input J of the first receives a signal derived from the outputs of the two flipflops. The output of the assembly is raised to the level of the output of one of the flipflops.
FR7727626A 1977-09-13 1977-09-13 Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory Withdrawn FR2402970A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7727626A FR2402970A1 (en) 1977-09-13 1977-09-13 Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7727626A FR2402970A1 (en) 1977-09-13 1977-09-13 Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory

Publications (1)

Publication Number Publication Date
FR2402970A1 true FR2402970A1 (en) 1979-04-06

Family

ID=9195333

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7727626A Withdrawn FR2402970A1 (en) 1977-09-13 1977-09-13 Digital signal sequence generator - uses JK flip=flops to produce binary signal controlling live memory

Country Status (1)

Country Link
FR (1) FR2402970A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0307549A2 (en) * 1987-08-14 1989-03-22 International Business Machines Corporation Memory test pattern generator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0307549A2 (en) * 1987-08-14 1989-03-22 International Business Machines Corporation Memory test pattern generator
EP0307549A3 (en) * 1987-08-14 1990-08-22 International Business Machines Corporation Memory test pattern generator

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