JPS54122116A - Recording system of digital signals - Google Patents

Recording system of digital signals

Info

Publication number
JPS54122116A
JPS54122116A JP3044078A JP3044078A JPS54122116A JP S54122116 A JPS54122116 A JP S54122116A JP 3044078 A JP3044078 A JP 3044078A JP 3044078 A JP3044078 A JP 3044078A JP S54122116 A JPS54122116 A JP S54122116A
Authority
JP
Japan
Prior art keywords
bit
digital signal
period
recorded
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3044078A
Other languages
Japanese (ja)
Inventor
Nobuyoshi Kihara
Koji Matsushima
Taiji Shimeki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3044078A priority Critical patent/JPS54122116A/en
Publication of JPS54122116A publication Critical patent/JPS54122116A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE: To perform the correction of errors readily and accurately by subsequently recording data bits and parity bits, respectively as 1 unit, unit by unit within one horizontal synchronizing period of video signal.
CONSTITUTION: This is the system of converting 1 sample of analog signal to the digital signal of (n)bits, wherein in the case of superposing this digital signal on the video signal, the digital signal of the uppermost bit, so-called MSB, is recorded in the first 1H period A and the digital signal for the second bit being the next bit of the MSB is subsequently superposed on the video signal in the next 1H period B, thus the digital signal of the (n)th bit being the lowermost bit, so-called LSB, is recorded in the (n)th 1H period Z. Then, if the number of the bits that can be recorded during 1H is let to be l, the digital signals of l samples may be recorded by the use of the (n) horizontal synchronizing periods.
COPYRIGHT: (C)1979,JPO&Japio
JP3044078A 1978-03-15 1978-03-15 Recording system of digital signals Pending JPS54122116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3044078A JPS54122116A (en) 1978-03-15 1978-03-15 Recording system of digital signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3044078A JPS54122116A (en) 1978-03-15 1978-03-15 Recording system of digital signals

Publications (1)

Publication Number Publication Date
JPS54122116A true JPS54122116A (en) 1979-09-21

Family

ID=12303987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3044078A Pending JPS54122116A (en) 1978-03-15 1978-03-15 Recording system of digital signals

Country Status (1)

Country Link
JP (1) JPS54122116A (en)

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