JPS54118757A - Operational amplifier - Google Patents

Operational amplifier

Info

Publication number
JPS54118757A
JPS54118757A JP2549778A JP2549778A JPS54118757A JP S54118757 A JPS54118757 A JP S54118757A JP 2549778 A JP2549778 A JP 2549778A JP 2549778 A JP2549778 A JP 2549778A JP S54118757 A JPS54118757 A JP S54118757A
Authority
JP
Japan
Prior art keywords
offset control
operational amplifier
resistor
terminal
control resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2549778A
Other languages
Japanese (ja)
Inventor
Yoichi Hoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2549778A priority Critical patent/JPS54118757A/en
Publication of JPS54118757A publication Critical patent/JPS54118757A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34DC amplifiers in which all stages are DC-coupled

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To facilitate the design for the print panel by building the offset control resistor into the operational amplifier in order to take no consideration of the offset control circuit for the conducting pattern design of the print panel. CONSTITUTION:The terminal of offset control resistor VR is connected to the offset control resistance terminal on the base of the operational amplifier. Then the container cap containing an opening drilled at the center is covered so that the adjustor such as screw head A of resistor VR may be exposed outside. Otherwise the offset control resistor is put onto the container of the operational amplifier, and the offset control resistance terminal of the operational amplifier is connected to the terminal of the offset control resistor via the insulator lead wire. Thus the offset control resistor to be installed separately can be omitted, facilitating the design for the print panel.
JP2549778A 1978-03-08 1978-03-08 Operational amplifier Pending JPS54118757A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2549778A JPS54118757A (en) 1978-03-08 1978-03-08 Operational amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2549778A JPS54118757A (en) 1978-03-08 1978-03-08 Operational amplifier

Publications (1)

Publication Number Publication Date
JPS54118757A true JPS54118757A (en) 1979-09-14

Family

ID=12167690

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2549778A Pending JPS54118757A (en) 1978-03-08 1978-03-08 Operational amplifier

Country Status (1)

Country Link
JP (1) JPS54118757A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4717888A (en) * 1986-05-22 1988-01-05 Raytheon Company Integrated circuit offset voltage adjustment
JPH0478826U (en) * 1990-11-21 1992-07-09

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4717888A (en) * 1986-05-22 1988-01-05 Raytheon Company Integrated circuit offset voltage adjustment
JPH0478826U (en) * 1990-11-21 1992-07-09

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