JPS54117642A - Information processing unit - Google Patents

Information processing unit

Info

Publication number
JPS54117642A
JPS54117642A JP2453178A JP2453178A JPS54117642A JP S54117642 A JPS54117642 A JP S54117642A JP 2453178 A JP2453178 A JP 2453178A JP 2453178 A JP2453178 A JP 2453178A JP S54117642 A JPS54117642 A JP S54117642A
Authority
JP
Japan
Prior art keywords
information
unit
speed
accomodated
precedence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2453178A
Other languages
Japanese (ja)
Inventor
Koichi Kunimasa
Kenzo Iioka
Noboru Okazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2453178A priority Critical patent/JPS54117642A/en
Publication of JPS54117642A publication Critical patent/JPS54117642A/en
Pending legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To improve the effective speed of an information processing unit by causing a substitution mechanism to substitute information accomodated in high- speed and small-capacity memory to reduce the information transfer frequency to the high-speed and small-capacity memory from a main memory.
CONSTITUTION: Precedence determination mechanism 10 determines a residual precedence in unit 4 for every information transferred from a low-speed large- capacity memory to high-speed small-capacity memory 4, and substitution control mechanism 14 performs the substitution control of information accomodated in unit 4. Here, the precedence is determined for every information, which is to be accomodated in unit 4, by residual precedence determination mechanism 11 in unit 4 on a basis of information of the frequency where information is accessed by the logical operation processing part. Then, mechanism 14 regards precedence determination information as a part of substitution control information of information in unit 4 to substitute information accomodated in unit 4. Consequently, the residual ratio in unit 4 of information required by the logical operation part is improved, and the information transfer frequency from main memory 1 to unit 4 is reduced. As a result, the effective speed of an information processing unit can be improved.
COPYRIGHT: (C)1979,JPO&Japio
JP2453178A 1978-03-06 1978-03-06 Information processing unit Pending JPS54117642A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2453178A JPS54117642A (en) 1978-03-06 1978-03-06 Information processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2453178A JPS54117642A (en) 1978-03-06 1978-03-06 Information processing unit

Publications (1)

Publication Number Publication Date
JPS54117642A true JPS54117642A (en) 1979-09-12

Family

ID=12140728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2453178A Pending JPS54117642A (en) 1978-03-06 1978-03-06 Information processing unit

Country Status (1)

Country Link
JP (1) JPS54117642A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05257814A (en) * 1993-02-08 1993-10-08 Hitachi Ltd Storage hierarchic control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05257814A (en) * 1993-02-08 1993-10-08 Hitachi Ltd Storage hierarchic control method

Similar Documents

Publication Publication Date Title
JPS5299034A (en) Control system for micro program
JPS54117642A (en) Information processing unit
JPS5398741A (en) High level recording and processing system
JPS6462704A (en) High speed working system
JPS5534316A (en) Store buffer control system
JPS56143583A (en) Buffer memory control system
JPS52129244A (en) Buffer invalid control method
JPS5428535A (en) Clock rate control system
JPS5563423A (en) Data transfer system
JPS5697154A (en) Interruption control system for information processor
JPS54155732A (en) Information processing system
JPS54530A (en) Reference control unit of memory
JPS5533252A (en) Memory system
JPS5436144A (en) Address conversion unit
JPS55135929A (en) Input/output control device
JPS55113183A (en) Address converter
JPS54144835A (en) Magnetic disc sub-system
JPS522246A (en) Data processing apparatus
JPS55103662A (en) Data processing unit
JPS5679303A (en) Sequence controller
JPS52150944A (en) Information transfer control unit
JPS5333022A (en) Memory hierarchy control system
JPS54155740A (en) Data collector unit
JPS5622138A (en) Dynamic replacing system for microprogram
JPS54114142A (en) Address control system