JPS54109745A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS54109745A
JPS54109745A JP1647878A JP1647878A JPS54109745A JP S54109745 A JPS54109745 A JP S54109745A JP 1647878 A JP1647878 A JP 1647878A JP 1647878 A JP1647878 A JP 1647878A JP S54109745 A JPS54109745 A JP S54109745A
Authority
JP
Japan
Prior art keywords
amplifier
input
attenuator
output
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1647878A
Other languages
Japanese (ja)
Inventor
Yukinari Fujiwara
Satoshi Fukuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP1647878A priority Critical patent/JPS54109745A/en
Publication of JPS54109745A publication Critical patent/JPS54109745A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To decrease the noise exponent at the minor input level time and to secure the S/N proportional to the increment of the input signal level by setting up individually the operation range of the variable attenuators which are provided at the input and output sides of the amplifier amplifying the signals sent through the input terminal. CONSTITUTION:The main signal line is formed with 1st variable attenuator 2, amplifier 3, 2nd variable attenuator 4 and amplifier 5, and then level detector 7 is installed using the output signal of amplifier 5 as the input. And comparison amplifier 11 and 15 are provided to give a comparsion between the signals of 1st and 2nd comparison signals 12 and 16 and the signals obtained by supplying the output of detector 7 via switch circuit 14. Then the output of amplifier 11 is applied to attenuator 4 via clipping circuit 13, and the output of amplifier 15 is applied to attenuator 2 respectively. At the same time, the output of input level detectpr 17 which identifies the low and high input levels is applied to circuit 14. Thus, the minimum attenuation quantity is set to attenuator 2 in the low level range, and the attenuation quantity of attenuator 4 is varied from the minimum to the maximum levels.
JP1647878A 1978-02-17 1978-02-17 Automatic gain control circuit Pending JPS54109745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1647878A JPS54109745A (en) 1978-02-17 1978-02-17 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1647878A JPS54109745A (en) 1978-02-17 1978-02-17 Automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS54109745A true JPS54109745A (en) 1979-08-28

Family

ID=11917381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1647878A Pending JPS54109745A (en) 1978-02-17 1978-02-17 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS54109745A (en)

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