JPS54105669A - Analog input device - Google Patents

Analog input device

Info

Publication number
JPS54105669A
JPS54105669A JP1233178A JP1233178A JPS54105669A JP S54105669 A JPS54105669 A JP S54105669A JP 1233178 A JP1233178 A JP 1233178A JP 1233178 A JP1233178 A JP 1233178A JP S54105669 A JPS54105669 A JP S54105669A
Authority
JP
Japan
Prior art keywords
data
signal
address
control
given
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1233178A
Other languages
Japanese (ja)
Inventor
Junichi Hatakeyama
Yutaka Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1233178A priority Critical patent/JPS54105669A/en
Publication of JPS54105669A publication Critical patent/JPS54105669A/en
Pending legal-status Critical Current

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  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE: To permit diagnosis of the device unit and efficient data processing to be made with selection of the scanning frequency of the data by producing a fault signal when now and old data compared with each other differ from each other and producing a comparison result signal when both data coincide with each other.
CONSTITUTION: A multiplexer output is specified with command and signal of an address control section 11 under the control of the computor side reading command and address signal, and an oil data signal 35 produced from a data memory section 13 is given to a comparator 15 under the control of a new data signal 34 passed through an analog-to-digital converter 6 and a second address signal 33 of the address control section 11. When both the data differ from each other, a fault signal 36 is produced. When they coincide with each other, a new data signal 38 is supplied to a data memory section 13 under the control of a comparison result signal 37 and is transmitted to the computor side through a read data signal line 39. When an address signal 33 is coupled to a mask data memory circuit 16, mask data 40 is given to the comparator 15, so that only a desired data portion is compared. Further, when a mode switch signal 42 is given, checking for faulty data is switched either collectively or for point after point.
COPYRIGHT: (C)1979,JPO&Japio
JP1233178A 1978-02-08 1978-02-08 Analog input device Pending JPS54105669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1233178A JPS54105669A (en) 1978-02-08 1978-02-08 Analog input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1233178A JPS54105669A (en) 1978-02-08 1978-02-08 Analog input device

Publications (1)

Publication Number Publication Date
JPS54105669A true JPS54105669A (en) 1979-08-18

Family

ID=11802316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1233178A Pending JPS54105669A (en) 1978-02-08 1978-02-08 Analog input device

Country Status (1)

Country Link
JP (1) JPS54105669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6509570B1 (en) * 1999-01-07 2003-01-21 Denki Kagaku Kogyo Kabushiki Kaisha Gallium ion source

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6509570B1 (en) * 1999-01-07 2003-01-21 Denki Kagaku Kogyo Kabushiki Kaisha Gallium ion source

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