JPS54105444A - Double-error correction circuit - Google Patents
Double-error correction circuitInfo
- Publication number
- JPS54105444A JPS54105444A JP1258878A JP1258878A JPS54105444A JP S54105444 A JPS54105444 A JP S54105444A JP 1258878 A JP1258878 A JP 1258878A JP 1258878 A JP1258878 A JP 1258878A JP S54105444 A JPS54105444 A JP S54105444A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- double
- error correction
- bits
- constitution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE: To make it possible to correct any two errors and less by obtaining a correction code of a little redundancey, by adding the 3m+1-number check bits to the m2+(3/2)(m-1)-number data bits with (m) taken as an odd number more than three.
CONSTITUTION: The double-error correction circuit consists of coding circuit 1 which adds the 3m+1-number check bits CB to m2+(3/2)(m-1) data bits DB with (m) taken as any odd number more than three, memory 2 stored with DB and CB, and composite circuit 3 equipped with circuit 20 generating syndrome bits from DB and CB and majority-decision circuit 21 correcting two random errors or more occurring in DB and CB by decoding the output of circuit 20 through majority decision logic. Then, error data are corrected by circuit 3 and then supplied to the arithmetic circuit again. In this constitution, when (m) is five, the double-error correction code can be obtained which is obtained by adding 16 (=3m+1) CBs to 31 [=m2+(3/2)(m-1)] DBs.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53012588A JPS6041771B2 (en) | 1978-02-07 | 1978-02-07 | double error correction circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53012588A JPS6041771B2 (en) | 1978-02-07 | 1978-02-07 | double error correction circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54105444A true JPS54105444A (en) | 1979-08-18 |
JPS6041771B2 JPS6041771B2 (en) | 1985-09-18 |
Family
ID=11809506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53012588A Expired JPS6041771B2 (en) | 1978-02-07 | 1978-02-07 | double error correction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6041771B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57185752A (en) * | 1981-05-11 | 1982-11-16 | Kokusai Denshin Denwa Co Ltd <Kdd> | Reproduction relay system |
-
1978
- 1978-02-07 JP JP53012588A patent/JPS6041771B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57185752A (en) * | 1981-05-11 | 1982-11-16 | Kokusai Denshin Denwa Co Ltd <Kdd> | Reproduction relay system |
JPH0255977B2 (en) * | 1981-05-11 | 1990-11-28 | Kokusai Denshin Denwa Co Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6041771B2 (en) | 1985-09-18 |
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