JPS54104294A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPS54104294A JPS54104294A JP79279A JP79279A JPS54104294A JP S54104294 A JPS54104294 A JP S54104294A JP 79279 A JP79279 A JP 79279A JP 79279 A JP79279 A JP 79279A JP S54104294 A JPS54104294 A JP S54104294A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/22—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
- G05F3/222—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only with compensation for device parameters, e.g. Early effect, gain, manufacturing process, or external variations, e.g. temperature, loading, supply voltage
- G05F3/225—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only with compensation for device parameters, e.g. Early effect, gain, manufacturing process, or external variations, e.g. temperature, loading, supply voltage producing a current or voltage as a predetermined function of the temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/091—Integrated injection logic or merged transistor logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/76—Simultaneous conversion using switching tree
- H03M1/765—Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Automation & Control Theory (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Analogue/Digital Conversion (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/871,672 US4178584A (en) | 1978-01-23 | 1978-01-23 | Integrated injection logic digital-to-analog converter employing feedback regulation and method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54104294A true JPS54104294A (en) | 1979-08-16 |
JPS621254B2 JPS621254B2 (en, 2012) | 1987-01-12 |
Family
ID=25357898
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP79279A Granted JPS54104294A (en) | 1978-01-23 | 1979-01-10 | Integrated circuit |
Country Status (4)
Country | Link |
---|---|
US (1) | US4178584A (en, 2012) |
EP (1) | EP0003260B1 (en, 2012) |
JP (1) | JPS54104294A (en, 2012) |
DE (1) | DE2861963D1 (en, 2012) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62274924A (ja) * | 1986-05-22 | 1987-11-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 集積注入論理出力回路 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4547766A (en) * | 1977-04-07 | 1985-10-15 | Analog Device, Incorporated | A-To-D converter of the successive-approximation type |
DE2805835C2 (de) * | 1978-02-11 | 1982-08-26 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Monolithisch integrierte Schaltung zur Umsetzung eines binärcodierten Signals in ein abgestuftes Analogsignal |
US4400690A (en) * | 1978-08-08 | 1983-08-23 | Analog Devices, Incorporated | A-to-D Converter of the successive-approximation type |
US4629998A (en) * | 1980-10-23 | 1986-12-16 | Victor Company Of Japan, Limited | Variable gain equalizer with a mirror circuit having opposite phase relationship between input and output currents |
JPS57153464A (en) * | 1981-03-18 | 1982-09-22 | Toshiba Corp | Injection type semiconductor integrated logic circuit |
JPS57178420A (en) * | 1981-04-25 | 1982-11-02 | Toshiba Corp | D/a converter |
FR2611331A1 (fr) * | 1987-02-20 | 1988-08-26 | Thomson Semiconducteurs | Circuit integre en technologie i2l |
US5361068A (en) * | 1993-04-02 | 1994-11-01 | National Semiconductor Corporation | Low-current digital-to-analog converter |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3978473A (en) * | 1973-05-01 | 1976-08-31 | Analog Devices, Inc. | Integrated-circuit digital-to-analog converter |
DE2356301C3 (de) * | 1973-11-10 | 1982-03-11 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithisch integrierte, logische Schaltung |
US4029974A (en) * | 1975-03-21 | 1977-06-14 | Analog Devices, Inc. | Apparatus for generating a current varying with temperature |
US4061959A (en) * | 1976-10-05 | 1977-12-06 | Rca Corporation | Voltage standard based on semiconductor junction offset potentials |
US4075508A (en) * | 1976-11-04 | 1978-02-21 | Motorola, Inc. | I2 L injector current source |
-
1978
- 1978-01-23 US US05/871,672 patent/US4178584A/en not_active Expired - Lifetime
- 1978-12-14 EP EP78300813A patent/EP0003260B1/en not_active Expired
- 1978-12-14 DE DE7878300813T patent/DE2861963D1/de not_active Expired
-
1979
- 1979-01-10 JP JP79279A patent/JPS54104294A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62274924A (ja) * | 1986-05-22 | 1987-11-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 集積注入論理出力回路 |
Also Published As
Publication number | Publication date |
---|---|
JPS621254B2 (en, 2012) | 1987-01-12 |
EP0003260A1 (en) | 1979-08-08 |
DE2861963D1 (en) | 1982-09-09 |
US4178584A (en) | 1979-12-11 |
EP0003260B1 (en) | 1982-07-21 |
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