JPS54101362A - All electronic type watch - Google Patents

All electronic type watch

Info

Publication number
JPS54101362A
JPS54101362A JP724678A JP724678A JPS54101362A JP S54101362 A JPS54101362 A JP S54101362A JP 724678 A JP724678 A JP 724678A JP 724678 A JP724678 A JP 724678A JP S54101362 A JPS54101362 A JP S54101362A
Authority
JP
Japan
Prior art keywords
time
alarm time
circuit
alarm
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP724678A
Other languages
Japanese (ja)
Inventor
Masayoshi Abe
Isao Yamaguchi
Kazuo Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP724678A priority Critical patent/JPS54101362A/en
Publication of JPS54101362A publication Critical patent/JPS54101362A/en
Pending legal-status Critical Current

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  • Electric Clocks (AREA)

Abstract

PURPOSE: To perform displaying of the future alarm time closest to the real time by comparing the memory times and the real time and subsequently changing the storage addresses of the alarm time.
CONSTITUTION: A digital comparator connected with a real time counter 7 and a number display device 8 are connected via latch circuit 3 to a memory circuit 1 which has a plurality of alarm time memory capacities. Then, if the plural alarm times are subsequently written in compliance with the day's schedule into the memory circuit 1 via program key input circuit 9 and a counter 6 is set at the initial value by a monitor key input circuit 10, then the alarm time is displayed by an acoustical or optical means each time when the alarm time reaches. At the same time, the counter 6 is advanced by 1 by the operation of the comparator 4 and one- shot pulse generating circuit 5 and the next alarm time is automatically read into the latch circuit 3, thus the displaying of the closest future alarm time is accomplished.
COPYRIGHT: (C)1979,JPO&Japio
JP724678A 1978-01-27 1978-01-27 All electronic type watch Pending JPS54101362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP724678A JPS54101362A (en) 1978-01-27 1978-01-27 All electronic type watch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP724678A JPS54101362A (en) 1978-01-27 1978-01-27 All electronic type watch

Publications (1)

Publication Number Publication Date
JPS54101362A true JPS54101362A (en) 1979-08-09

Family

ID=11660650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP724678A Pending JPS54101362A (en) 1978-01-27 1978-01-27 All electronic type watch

Country Status (1)

Country Link
JP (1) JPS54101362A (en)

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