JPS54101231A - Dynmic type rom - Google Patents

Dynmic type rom

Info

Publication number
JPS54101231A
JPS54101231A JP724078A JP724078A JPS54101231A JP S54101231 A JPS54101231 A JP S54101231A JP 724078 A JP724078 A JP 724078A JP 724078 A JP724078 A JP 724078A JP S54101231 A JPS54101231 A JP S54101231A
Authority
JP
Japan
Prior art keywords
logic block
output
inhibited
decrease
dynmic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP724078A
Other languages
Japanese (ja)
Other versions
JPS6022436B2 (en
Inventor
Shuichi Torii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53007240A priority Critical patent/JPS6022436B2/en
Publication of JPS54101231A publication Critical patent/JPS54101231A/en
Publication of JPS6022436B2 publication Critical patent/JPS6022436B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To prevent the malfunction due to leakage current, by providing the discharge time constant circuit having that for the logic block. CONSTITUTION:Although the load capacitance is interrupted from each logic block with the non-conduction of switching MISFET Q7 to Q7''' and the discharge of the logic block Ri selected is inhibited, since the discharge time constant is the same as the output R0 of the dummy logic block, then the storage level of the output Ri is regarded as low level logically. On the other hand, the output Rj of the logic block of non-selection is inhibited for the decrease in the hold level with the decrease in MISFET group even with more or less leakage current due to pattern deficiency.
JP53007240A 1978-01-27 1978-01-27 Dynamic ROM Expired JPS6022436B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53007240A JPS6022436B2 (en) 1978-01-27 1978-01-27 Dynamic ROM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53007240A JPS6022436B2 (en) 1978-01-27 1978-01-27 Dynamic ROM

Publications (2)

Publication Number Publication Date
JPS54101231A true JPS54101231A (en) 1979-08-09
JPS6022436B2 JPS6022436B2 (en) 1985-06-01

Family

ID=11660467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53007240A Expired JPS6022436B2 (en) 1978-01-27 1978-01-27 Dynamic ROM

Country Status (1)

Country Link
JP (1) JPS6022436B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733491A (en) * 1980-07-31 1982-02-23 Nippon Telegr & Teleph Corp <Ntt> Read-only semiconductor storage device
JPS59142797A (en) * 1983-01-24 1984-08-16 モトロ−ラ・インコ−ポレ−テツド Series fixed memory with capacitive bootstrap preliminary charging circuit
EP0488672A2 (en) * 1990-11-27 1992-06-03 Nec Corporation Memory device with current mirror type sense amplifiers
JPH04136065U (en) * 1991-06-10 1992-12-17 兄治郎 長谷川 twist lure

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733491A (en) * 1980-07-31 1982-02-23 Nippon Telegr & Teleph Corp <Ntt> Read-only semiconductor storage device
JPS6314436B2 (en) * 1980-07-31 1988-03-30 Nippon Telegraph & Telephone
JPS59142797A (en) * 1983-01-24 1984-08-16 モトロ−ラ・インコ−ポレ−テツド Series fixed memory with capacitive bootstrap preliminary charging circuit
EP0488672A2 (en) * 1990-11-27 1992-06-03 Nec Corporation Memory device with current mirror type sense amplifiers
US5297084A (en) * 1990-11-27 1994-03-22 Nec Corporation Memory device with current mirror type sense amplifiers for comparing units of reference cells and information cells
JPH04136065U (en) * 1991-06-10 1992-12-17 兄治郎 長谷川 twist lure

Also Published As

Publication number Publication date
JPS6022436B2 (en) 1985-06-01

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