JPS5389651A - Starttstop circuit of vfo - Google Patents

Starttstop circuit of vfo

Info

Publication number
JPS5389651A
JPS5389651A JP394577A JP394577A JPS5389651A JP S5389651 A JPS5389651 A JP S5389651A JP 394577 A JP394577 A JP 394577A JP 394577 A JP394577 A JP 394577A JP S5389651 A JPS5389651 A JP S5389651A
Authority
JP
Japan
Prior art keywords
vfo
starttstop
circuit
leading
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP394577A
Other languages
Japanese (ja)
Inventor
Toshifumi Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP394577A priority Critical patent/JPS5389651A/en
Publication of JPS5389651A publication Critical patent/JPS5389651A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/104—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional signal from outside the loop for setting or controlling a parameter in the loop

Abstract

PURPOSE:To prevent malfunctions of succeeding logical operation with keeping the leading-in time of VFO constant by stopping oscillation at a LOW level and starting oscillation simultaneously with the leading edge of the input signal in a symmetrical astable multivibrator.
JP394577A 1977-01-19 1977-01-19 Starttstop circuit of vfo Pending JPS5389651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP394577A JPS5389651A (en) 1977-01-19 1977-01-19 Starttstop circuit of vfo

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP394577A JPS5389651A (en) 1977-01-19 1977-01-19 Starttstop circuit of vfo

Publications (1)

Publication Number Publication Date
JPS5389651A true JPS5389651A (en) 1978-08-07

Family

ID=11571248

Family Applications (1)

Application Number Title Priority Date Filing Date
JP394577A Pending JPS5389651A (en) 1977-01-19 1977-01-19 Starttstop circuit of vfo

Country Status (1)

Country Link
JP (1) JPS5389651A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55112045A (en) * 1979-02-22 1980-08-29 Sony Corp Pll circuit
JPS6093825A (en) * 1983-09-29 1985-05-25 テクトロニツクス・インコーポレイテツド Method and circuit for initializing phase lock loop
WO1992002986A1 (en) * 1990-08-07 1992-02-20 Seiko Epson Corporation Phase synchronizing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55112045A (en) * 1979-02-22 1980-08-29 Sony Corp Pll circuit
JPS6093825A (en) * 1983-09-29 1985-05-25 テクトロニツクス・インコーポレイテツド Method and circuit for initializing phase lock loop
WO1992002986A1 (en) * 1990-08-07 1992-02-20 Seiko Epson Corporation Phase synchronizing circuit

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