JPS5381021A - Address input circuit - Google Patents

Address input circuit

Info

Publication number
JPS5381021A
JPS5381021A JP15777676A JP15777676A JPS5381021A JP S5381021 A JPS5381021 A JP S5381021A JP 15777676 A JP15777676 A JP 15777676A JP 15777676 A JP15777676 A JP 15777676A JP S5381021 A JPS5381021 A JP S5381021A
Authority
JP
Japan
Prior art keywords
input circuit
address input
circuits
input
common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15777676A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5551273B2 (enrdf_load_html_response
Inventor
Masahiro Akitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP15777676A priority Critical patent/JPS5381021A/ja
Publication of JPS5381021A publication Critical patent/JPS5381021A/ja
Publication of JPS5551273B2 publication Critical patent/JPS5551273B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
JP15777676A 1976-12-27 1976-12-27 Address input circuit Granted JPS5381021A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15777676A JPS5381021A (en) 1976-12-27 1976-12-27 Address input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15777676A JPS5381021A (en) 1976-12-27 1976-12-27 Address input circuit

Publications (2)

Publication Number Publication Date
JPS5381021A true JPS5381021A (en) 1978-07-18
JPS5551273B2 JPS5551273B2 (enrdf_load_html_response) 1980-12-23

Family

ID=15657034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15777676A Granted JPS5381021A (en) 1976-12-27 1976-12-27 Address input circuit

Country Status (1)

Country Link
JP (1) JPS5381021A (enrdf_load_html_response)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5954096A (ja) * 1982-09-22 1984-03-28 Hitachi Ltd ダイナミツク型ｍｏｓｒａｍ
JPS60167195A (ja) * 1985-01-11 1985-08-30 Hitachi Ltd メモリ回路
JPS6218897U (enrdf_load_html_response) * 1986-07-14 1987-02-04
JPS63247990A (ja) * 1987-10-21 1988-10-14 Hitachi Ltd 半導体装置
WO1992009084A1 (en) * 1990-11-16 1992-05-29 Fujitsu Limited Semiconductor memory having high-speed address decoder
JPH0935471A (ja) * 1995-07-21 1997-02-07 Nec Shizuoka Ltd メモリ素子
JPH1031885A (ja) * 1996-07-15 1998-02-03 Winbond Electron Corp アドレスピンを減少させた集積回路及びその集積回路への信号の入力方法
KR19990018181A (ko) * 1997-08-26 1999-03-15 윤종용 복합 반도체 장치의 어드레스 선택 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5191636A (en) * 1974-10-08 1976-08-11 Adoresushiteiho deetaseiseiho ronrijunikenshutsuho randamuakusesukiokusochi oyobi sonokokujishingohatsuseikairo oyobi sensuzofukuki

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5191636A (en) * 1974-10-08 1976-08-11 Adoresushiteiho deetaseiseiho ronrijunikenshutsuho randamuakusesukiokusochi oyobi sonokokujishingohatsuseikairo oyobi sensuzofukuki

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5954096A (ja) * 1982-09-22 1984-03-28 Hitachi Ltd ダイナミツク型ｍｏｓｒａｍ
JPS60167195A (ja) * 1985-01-11 1985-08-30 Hitachi Ltd メモリ回路
JPS6218897U (enrdf_load_html_response) * 1986-07-14 1987-02-04
JPS63247990A (ja) * 1987-10-21 1988-10-14 Hitachi Ltd 半導体装置
WO1992009084A1 (en) * 1990-11-16 1992-05-29 Fujitsu Limited Semiconductor memory having high-speed address decoder
JPH0935471A (ja) * 1995-07-21 1997-02-07 Nec Shizuoka Ltd メモリ素子
JPH1031885A (ja) * 1996-07-15 1998-02-03 Winbond Electron Corp アドレスピンを減少させた集積回路及びその集積回路への信号の入力方法
KR19990018181A (ko) * 1997-08-26 1999-03-15 윤종용 복합 반도체 장치의 어드레스 선택 방법

Also Published As

Publication number Publication date
JPS5551273B2 (enrdf_load_html_response) 1980-12-23

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