JPS5372547A - Computer system - Google Patents

Computer system

Info

Publication number
JPS5372547A
JPS5372547A JP14867377A JP14867377A JPS5372547A JP S5372547 A JPS5372547 A JP S5372547A JP 14867377 A JP14867377 A JP 14867377A JP 14867377 A JP14867377 A JP 14867377A JP S5372547 A JPS5372547 A JP S5372547A
Authority
JP
Japan
Prior art keywords
computer system
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14867377A
Other languages
English (en)
Inventor
Koobaa Ruudorufu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of JPS5372547A publication Critical patent/JPS5372547A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Dram (AREA)
JP14867377A 1976-12-10 1977-12-09 Computer system Pending JPS5372547A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2656086A DE2656086C2 (de) 1976-12-10 1976-12-10 Rechenanlage

Publications (1)

Publication Number Publication Date
JPS5372547A true JPS5372547A (en) 1978-06-28

Family

ID=5995235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14867377A Pending JPS5372547A (en) 1976-12-10 1977-12-09 Computer system

Country Status (7)

Country Link
US (1) US4172283A (ja)
JP (1) JPS5372547A (ja)
BE (1) BE861695A (ja)
DE (1) DE2656086C2 (ja)
FR (1) FR2373831A1 (ja)
GB (1) GB1593988A (ja)
IT (1) IT1088990B (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4315308A (en) * 1978-12-21 1982-02-09 Intel Corporation Interface between a microprocessor chip and peripheral subsystems
US4309754A (en) * 1979-07-30 1982-01-05 International Business Machines Corp. Data interface mechanism for interfacing bit-parallel data buses of different bit width
IT1121031B (it) * 1979-09-19 1986-03-26 Olivetti & Co Spa Sistema di elaborazione di dati multiprocessore
EP0050109B1 (en) * 1980-02-28 1984-10-31 Intel Corporation Microprocessor interface control apparatus
DE3104928C2 (de) * 1981-02-11 1985-09-05 Siemens AG, 1000 Berlin und 8000 München Multi-Mikrorechneranlage mit direktem Speicherzugriff
US4583167A (en) * 1981-06-24 1986-04-15 Elevator Gmbh Procedure and apparatus for conveying external and output data to a processor system
GB2117945A (en) * 1982-04-01 1983-10-19 Raytheon Co Memory data transfer
US4507731A (en) * 1982-11-01 1985-03-26 Raytheon Company Bidirectional data byte aligner
US4530053A (en) * 1983-04-14 1985-07-16 International Business Machines Corporation DMA multimode transfer controls
US6379998B1 (en) 1986-03-12 2002-04-30 Hitachi, Ltd. Semiconductor device and method for fabricating the same
US5297260A (en) * 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
AU6642290A (en) * 1989-10-17 1991-05-31 Maurice E. Mitchell A microcomputer with disconnected, open, independent, bimemory architecture
US5202035A (en) * 1990-07-16 1993-04-13 Nalco Chemical Company Liquid aluminum phosphate salt gelling agent
JP3524337B2 (ja) 1997-07-25 2004-05-10 キヤノン株式会社 バス管理装置及びそれを有する複合機器の制御装置
DE102007028802B4 (de) * 2007-06-22 2010-04-08 Qimonda Ag Integrierte Logikschaltung und Verfahren zum Herstellen einer integrierten Logikschaltung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3343135A (en) * 1964-08-13 1967-09-19 Ibm Compiling circuitry for a highly-parallel computing system
US3593300A (en) * 1967-11-13 1971-07-13 Ibm Arrangement for automatically selecting units for task executions in data processing systems
US3629854A (en) * 1969-07-22 1971-12-21 Burroughs Corp Modular multiprocessor system with recirculating priority
DE2361292A1 (de) * 1973-12-08 1975-06-12 Philips Patentverwaltung Schaltungsanordnung zur uebertragung von daten aus einem speicher in eine rechenanlage
GB1478363A (en) * 1974-07-30 1977-06-29 Mullard Ltd Data transmission systems
CH584488A5 (ja) * 1975-05-05 1977-01-31 Ibm

Also Published As

Publication number Publication date
FR2373831B1 (ja) 1980-09-19
GB1593988A (en) 1981-07-22
US4172283A (en) 1979-10-23
BE861695A (fr) 1978-03-31
FR2373831A1 (fr) 1978-07-07
DE2656086A1 (de) 1978-06-22
DE2656086C2 (de) 1986-08-28
IT1088990B (it) 1985-06-10

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