JPS5360525A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5360525A JPS5360525A JP13534676A JP13534676A JPS5360525A JP S5360525 A JPS5360525 A JP S5360525A JP 13534676 A JP13534676 A JP 13534676A JP 13534676 A JP13534676 A JP 13534676A JP S5360525 A JPS5360525 A JP S5360525A
- Authority
- JP
- Japan
- Prior art keywords
- write
- memory device
- semiconductor memory
- misfet
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Abstract
PURPOSE:A write signal is applied to write data transmitting MISFET via the MISFET driven by the output signal of a row selection decoder, thereby holding the normal write while performing the high-speed write.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13534676A JPS5360525A (en) | 1976-11-12 | 1976-11-12 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13534676A JPS5360525A (en) | 1976-11-12 | 1976-11-12 | Semiconductor memory device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5360525A true JPS5360525A (en) | 1978-05-31 |
JPS5721791B2 JPS5721791B2 (en) | 1982-05-10 |
Family
ID=15149615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13534676A Granted JPS5360525A (en) | 1976-11-12 | 1976-11-12 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5360525A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6099688U (en) * | 1983-12-14 | 1985-07-06 | 不二サッシ株式会社 | indoor fittings |
-
1976
- 1976-11-12 JP JP13534676A patent/JPS5360525A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5721791B2 (en) | 1982-05-10 |
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