JPS5315055A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5315055A
JPS5315055A JP8946376A JP8946376A JPS5315055A JP S5315055 A JPS5315055 A JP S5315055A JP 8946376 A JP8946376 A JP 8946376A JP 8946376 A JP8946376 A JP 8946376A JP S5315055 A JPS5315055 A JP S5315055A
Authority
JP
Japan
Prior art keywords
logic circuit
back gate
fets
fet
degradation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8946376A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5617856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Masataka Hirasawa
Akira Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8946376A priority Critical patent/JPS5315055A/ja
Publication of JPS5315055A publication Critical patent/JPS5315055A/ja
Publication of JPS5617856B2 publication Critical patent/JPS5617856B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP8946376A 1976-07-27 1976-07-27 Logic circuit Granted JPS5315055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8946376A JPS5315055A (en) 1976-07-27 1976-07-27 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8946376A JPS5315055A (en) 1976-07-27 1976-07-27 Logic circuit

Publications (2)

Publication Number Publication Date
JPS5315055A true JPS5315055A (en) 1978-02-10
JPS5617856B2 JPS5617856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-04-24

Family

ID=13971390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8946376A Granted JPS5315055A (en) 1976-07-27 1976-07-27 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5315055A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5059825A (en) * 1988-10-27 1991-10-22 Fujitsu Limited Nand gate circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03277147A (ja) * 1990-03-26 1991-12-09 Toshiba Corp 電機子巻線

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5059825A (en) * 1988-10-27 1991-10-22 Fujitsu Limited Nand gate circuit

Also Published As

Publication number Publication date
JPS5617856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-04-24

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