JPS5310936A - Memory and its applying method - Google Patents

Memory and its applying method

Info

Publication number
JPS5310936A
JPS5310936A JP8507376A JP8507376A JPS5310936A JP S5310936 A JPS5310936 A JP S5310936A JP 8507376 A JP8507376 A JP 8507376A JP 8507376 A JP8507376 A JP 8507376A JP S5310936 A JPS5310936 A JP S5310936A
Authority
JP
Japan
Prior art keywords
memory
applying method
circumference
memory array
deteriorating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8507376A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5631679B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Kiyoo Ito
Shigetake Hamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP8507376A priority Critical patent/JPS5310936A/ja
Publication of JPS5310936A publication Critical patent/JPS5310936A/ja
Publication of JPS5631679B2 publication Critical patent/JPS5631679B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Digital Computer Display Output (AREA)
JP8507376A 1976-07-19 1976-07-19 Memory and its applying method Granted JPS5310936A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8507376A JPS5310936A (en) 1976-07-19 1976-07-19 Memory and its applying method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8507376A JPS5310936A (en) 1976-07-19 1976-07-19 Memory and its applying method

Publications (2)

Publication Number Publication Date
JPS5310936A true JPS5310936A (en) 1978-01-31
JPS5631679B2 JPS5631679B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-07-22

Family

ID=13848434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8507376A Granted JPS5310936A (en) 1976-07-19 1976-07-19 Memory and its applying method

Country Status (1)

Country Link
JP (1) JPS5310936A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785676A (en) * 1980-11-14 1982-05-28 Hitachi Seiko Ltd Method and device for horizontal narrow groove mig welding
JPS6083293A (ja) * 1983-10-14 1985-05-11 Hitachi Micro Comput Eng Ltd ダイナミツク型ram
JPS62114224A (ja) * 1985-11-13 1987-05-26 Nec Corp 半導体装置
US4731642A (en) * 1984-02-24 1988-03-15 Hitachi, Ltd. Semiconductor memory device with means to prevent word line breakage
DE112017003807T5 (de) 2016-07-29 2019-05-09 Omron Corporation Elektromagnetisches relais

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785676A (en) * 1980-11-14 1982-05-28 Hitachi Seiko Ltd Method and device for horizontal narrow groove mig welding
JPS6083293A (ja) * 1983-10-14 1985-05-11 Hitachi Micro Comput Eng Ltd ダイナミツク型ram
US4731642A (en) * 1984-02-24 1988-03-15 Hitachi, Ltd. Semiconductor memory device with means to prevent word line breakage
US5416347A (en) * 1984-02-24 1995-05-16 Hitachi, Ltd. Semiconductor memory device with additional conductive line to prevent line breakage
JPS62114224A (ja) * 1985-11-13 1987-05-26 Nec Corp 半導体装置
DE112017003807T5 (de) 2016-07-29 2019-05-09 Omron Corporation Elektromagnetisches relais

Also Published As

Publication number Publication date
JPS5631679B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-07-22

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