JPS5268334A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5268334A
JPS5268334A JP50143908A JP14390875A JPS5268334A JP S5268334 A JPS5268334 A JP S5268334A JP 50143908 A JP50143908 A JP 50143908A JP 14390875 A JP14390875 A JP 14390875A JP S5268334 A JPS5268334 A JP S5268334A
Authority
JP
Japan
Prior art keywords
semiconductor memory
fet
minimization
complementary
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50143908A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5717317B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Yasoji Suzuki
Kiyobumi Ochii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50143908A priority Critical patent/JPS5268334A/ja
Priority to GB50347/76A priority patent/GB1505812A/en
Priority to US05/747,975 priority patent/US4086500A/en
Publication of JPS5268334A publication Critical patent/JPS5268334A/ja
Publication of JPS5717317B2 publication Critical patent/JPS5717317B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Logic Circuits (AREA)
JP50143908A 1975-12-05 1975-12-05 Semiconductor memory Granted JPS5268334A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP50143908A JPS5268334A (en) 1975-12-05 1975-12-05 Semiconductor memory
GB50347/76A GB1505812A (en) 1975-12-05 1976-12-02 Address decoder
US05/747,975 US4086500A (en) 1975-12-05 1976-12-06 Address decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50143908A JPS5268334A (en) 1975-12-05 1975-12-05 Semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5268334A true JPS5268334A (en) 1977-06-07
JPS5717317B2 JPS5717317B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1982-04-09

Family

ID=15349867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50143908A Granted JPS5268334A (en) 1975-12-05 1975-12-05 Semiconductor memory

Country Status (3)

Country Link
US (1) US4086500A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5268334A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB1505812A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122493A (ja) * 1984-07-11 1986-01-31 Hitachi Micro Comput Eng Ltd デコ−ダ回路

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53136977A (en) * 1977-05-04 1978-11-29 Seiko Instr & Electronics Ltd Driving circuit
JPS55142475A (en) * 1979-04-23 1980-11-07 Fujitsu Ltd Decoder circuit
JPS6052519B2 (ja) * 1981-12-28 1985-11-19 富士通株式会社 半導体記憶装置のデコ−ダ回路
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
US4581548A (en) * 1983-03-15 1986-04-08 Harris Corporation Address decoder
JP3024687B2 (ja) * 1990-06-05 2000-03-21 三菱電機株式会社 半導体記憶装置
US5291076A (en) * 1992-08-31 1994-03-01 Motorola, Inc. Decoder/comparator and method of operation
EP0587937B1 (de) * 1992-09-18 1996-11-20 Siemens Aktiengesellschaft Integrierte Pufferschaltung
ATE135510T1 (de) * 1992-09-18 1996-03-15 Siemens Ag Integrierte pufferschaltung
US5764589A (en) * 1997-03-28 1998-06-09 International Business Machines Corporation Array row and column decoder apparatus and method
US7848173B1 (en) 2006-10-17 2010-12-07 Marvell International Ltd. Address decoder
US9742408B1 (en) 2016-09-23 2017-08-22 International Business Machines Corporation Dynamic decode circuit with active glitch control
US10374604B1 (en) 2018-08-12 2019-08-06 International Business Machines Corporation Dynamic decode circuit low power application

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3644904A (en) * 1969-11-12 1972-02-22 Gen Instrument Corp Chip select circuit for multichip random access memory
US3721838A (en) * 1970-12-21 1973-03-20 Ibm Repairable semiconductor circuit element and method of manufacture
US3778782A (en) * 1971-07-12 1973-12-11 Texas Instruments Inc Igfet dynamic address decode circuit
US3778784A (en) * 1972-02-14 1973-12-11 Intel Corp Memory system incorporating a memory cell and timing means on a single semiconductor substrate
US3863230A (en) * 1973-07-18 1975-01-28 Intel Corp MOS memory decoder circuit
US3911428A (en) * 1973-10-18 1975-10-07 Ibm Decode circuit
US3906461A (en) * 1974-03-29 1975-09-16 Sperry Rand Corp Integrated MNOS memory with decoder
US3959781A (en) * 1974-11-04 1976-05-25 Intel Corporation Semiconductor random access memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122493A (ja) * 1984-07-11 1986-01-31 Hitachi Micro Comput Eng Ltd デコ−ダ回路

Also Published As

Publication number Publication date
US4086500A (en) 1978-04-25
JPS5717317B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1982-04-09
GB1505812A (en) 1978-03-30

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