JPS5263637A - Device for non-volatile semiconductor memory - Google Patents

Device for non-volatile semiconductor memory

Info

Publication number
JPS5263637A
JPS5263637A JP50139590A JP13959075A JPS5263637A JP S5263637 A JPS5263637 A JP S5263637A JP 50139590 A JP50139590 A JP 50139590A JP 13959075 A JP13959075 A JP 13959075A JP S5263637 A JPS5263637 A JP S5263637A
Authority
JP
Japan
Prior art keywords
semiconductor memory
volatile semiconductor
facilitate
screening
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50139590A
Other languages
English (en)
Japanese (ja)
Other versions
JPS576199B2 (enrdf_load_stackoverflow
Inventor
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50139590A priority Critical patent/JPS5263637A/ja
Publication of JPS5263637A publication Critical patent/JPS5263637A/ja
Publication of JPS576199B2 publication Critical patent/JPS576199B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Non-Volatile Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP50139590A 1975-11-20 1975-11-20 Device for non-volatile semiconductor memory Granted JPS5263637A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50139590A JPS5263637A (en) 1975-11-20 1975-11-20 Device for non-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50139590A JPS5263637A (en) 1975-11-20 1975-11-20 Device for non-volatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5263637A true JPS5263637A (en) 1977-05-26
JPS576199B2 JPS576199B2 (enrdf_load_stackoverflow) 1982-02-03

Family

ID=15248799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50139590A Granted JPS5263637A (en) 1975-11-20 1975-11-20 Device for non-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5263637A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671898A (en) * 1979-11-15 1981-06-15 Nippon Texas Instr Kk Nonvolatile semiconductor memory device and its testing method
JPS60111396A (ja) * 1983-11-18 1985-06-17 Matsushita Electronics Corp 半導体メモリ装置
JPS63302495A (ja) * 1987-04-03 1988-12-09 Toshiba Corp 半導体メモリ装置
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4874757A (enrdf_load_stackoverflow) * 1971-12-30 1973-10-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4874757A (enrdf_load_stackoverflow) * 1971-12-30 1973-10-08

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671898A (en) * 1979-11-15 1981-06-15 Nippon Texas Instr Kk Nonvolatile semiconductor memory device and its testing method
JPS60111396A (ja) * 1983-11-18 1985-06-17 Matsushita Electronics Corp 半導体メモリ装置
JPS63302495A (ja) * 1987-04-03 1988-12-09 Toshiba Corp 半導体メモリ装置
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Also Published As

Publication number Publication date
JPS576199B2 (enrdf_load_stackoverflow) 1982-02-03

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