JPS52117065A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS52117065A
JPS52117065A JP3475976A JP3475976A JPS52117065A JP S52117065 A JPS52117065 A JP S52117065A JP 3475976 A JP3475976 A JP 3475976A JP 3475976 A JP3475976 A JP 3475976A JP S52117065 A JPS52117065 A JP S52117065A
Authority
JP
Japan
Prior art keywords
semiconductor device
economically
arranging
copper foil
insulating resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3475976A
Other languages
Japanese (ja)
Inventor
Takeyumi Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3475976A priority Critical patent/JPS52117065A/en
Publication of JPS52117065A publication Critical patent/JPS52117065A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE: To form so economically a film carrier system semiconductor device by arranging a copper foil and an element on an insulating resin film.
COPYRIGHT: (C)1977,JPO&Japio
JP3475976A 1976-03-29 1976-03-29 Semiconductor device Pending JPS52117065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3475976A JPS52117065A (en) 1976-03-29 1976-03-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3475976A JPS52117065A (en) 1976-03-29 1976-03-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS52117065A true JPS52117065A (en) 1977-10-01

Family

ID=12423232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3475976A Pending JPS52117065A (en) 1976-03-29 1976-03-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS52117065A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188941A (en) * 1985-02-18 1986-08-22 Fujitsu Ltd Method of removing integrated circuit part package from test carrier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188941A (en) * 1985-02-18 1986-08-22 Fujitsu Ltd Method of removing integrated circuit part package from test carrier

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