JPS52107712A - Frame synchronization system - Google Patents

Frame synchronization system

Info

Publication number
JPS52107712A
JPS52107712A JP2479876A JP2479876A JPS52107712A JP S52107712 A JPS52107712 A JP S52107712A JP 2479876 A JP2479876 A JP 2479876A JP 2479876 A JP2479876 A JP 2479876A JP S52107712 A JPS52107712 A JP S52107712A
Authority
JP
Japan
Prior art keywords
frame synchronization
synchronization system
phase
oscillator
actuation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2479876A
Other languages
Japanese (ja)
Inventor
Hidehiko Yamamoto
Masatoshi Makino
Shogo Usuda
Kiyoji Yamauchi
Makoto Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP2479876A priority Critical patent/JPS52107712A/en
Publication of JPS52107712A publication Critical patent/JPS52107712A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To prevent unnecessary frame synchronization discrepancy which occurs at input instantaneous disconnection occurrence time, by holding the digit phase of reception clock using phase synchronism oscillator and then by giving actuation to frame synchronization circuit throug output clock.
JP2479876A 1976-03-08 1976-03-08 Frame synchronization system Pending JPS52107712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2479876A JPS52107712A (en) 1976-03-08 1976-03-08 Frame synchronization system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2479876A JPS52107712A (en) 1976-03-08 1976-03-08 Frame synchronization system

Publications (1)

Publication Number Publication Date
JPS52107712A true JPS52107712A (en) 1977-09-09

Family

ID=12148200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2479876A Pending JPS52107712A (en) 1976-03-08 1976-03-08 Frame synchronization system

Country Status (1)

Country Link
JP (1) JPS52107712A (en)

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