JPS5357732A - Phase lock circuit - Google Patents

Phase lock circuit

Info

Publication number
JPS5357732A
JPS5357732A JP13169276A JP13169276A JPS5357732A JP S5357732 A JPS5357732 A JP S5357732A JP 13169276 A JP13169276 A JP 13169276A JP 13169276 A JP13169276 A JP 13169276A JP S5357732 A JPS5357732 A JP S5357732A
Authority
JP
Japan
Prior art keywords
phase lock
lock circuit
phase
output
rationalnumber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13169276A
Other languages
Japanese (ja)
Inventor
Toshiki Aoi
Shiro Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP13169276A priority Critical patent/JPS5357732A/en
Publication of JPS5357732A publication Critical patent/JPS5357732A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To output the output frequency, being phase-synchronized, a-rationalnumber times as much as an input signal by using the phase lock loop of a double loop.
JP13169276A 1976-11-04 1976-11-04 Phase lock circuit Pending JPS5357732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13169276A JPS5357732A (en) 1976-11-04 1976-11-04 Phase lock circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13169276A JPS5357732A (en) 1976-11-04 1976-11-04 Phase lock circuit

Publications (1)

Publication Number Publication Date
JPS5357732A true JPS5357732A (en) 1978-05-25

Family

ID=15063967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13169276A Pending JPS5357732A (en) 1976-11-04 1976-11-04 Phase lock circuit

Country Status (1)

Country Link
JP (1) JPS5357732A (en)

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