JPS5173856A - Hyojisochito kiiboodo no sosashutsuryokunikanshi tasunokoodokumiawaseojusuru denshikeisanki aruiha deijitarushorikichitsupu - Google Patents
Hyojisochito kiiboodo no sosashutsuryokunikanshi tasunokoodokumiawaseojusuru denshikeisanki aruiha deijitarushorikichitsupuInfo
- Publication number
- JPS5173856A JPS5173856A JP50137851A JP13785175A JPS5173856A JP S5173856 A JPS5173856 A JP S5173856A JP 50137851 A JP50137851 A JP 50137851A JP 13785175 A JP13785175 A JP 13785175A JP S5173856 A JPS5173856 A JP S5173856A
- Authority
- JP
- Japan
- Prior art keywords
- tasunokoodokumiawaseojusuru
- sosashutsuryokunikanshi
- kiiboodo
- hyojisochito
- denshikeisanki
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/02—Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Calculators And Similar Devices (AREA)
- Tests Of Electronic Circuits (AREA)
- Input From Keyboards Or The Like (AREA)
- Digital Computer Display Output (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US52524674A | 1974-11-19 | 1974-11-19 | |
| US05/525,250 US3988604A (en) | 1974-11-19 | 1974-11-19 | Electronic calculator or digital processor chip having multiple function arithmetic unit output |
| US05/525,247 US4021656A (en) | 1974-11-19 | 1974-11-19 | Data input for electronic calculator or digital processor chip |
| US05/525,238 US4021781A (en) | 1974-11-19 | 1974-11-19 | Virtual ground read-only-memory for electronic calculator or digital processor |
| US05/525,237 US3989939A (en) | 1974-11-19 | 1974-11-19 | Electronic calculator or digital processor chip with combined functions for constant, keyboard and control bit |
| US05/525,236 US3991305A (en) | 1974-11-19 | 1974-11-19 | Electronic calculator or digital processor chip with multiple code combinations of display and keyboard scan outputs |
| US05/525,245 US3955181A (en) | 1974-11-19 | 1974-11-19 | Self-refreshing random access memory cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5173856A true JPS5173856A (en) | 1976-06-26 |
Family
ID=27569826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50137851A Pending JPS5173856A (en) | 1974-11-19 | 1975-11-18 | Hyojisochito kiiboodo no sosashutsuryokunikanshi tasunokoodokumiawaseojusuru denshikeisanki aruiha deijitarushorikichitsupu |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS5173856A (Direct) |
| DE (1) | DE2551852A1 (Direct) |
| FR (1) | FR2292286A1 (Direct) |
| NL (1) | NL7513516A (Direct) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54106128A (en) * | 1978-02-08 | 1979-08-20 | Nec Corp | Time-division display unit |
| JPS58115372A (ja) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | 半導体装置試験回路 |
| JPS6270993A (ja) * | 1977-08-26 | 1987-04-01 | ブル・エス・アー | デ−タを記憶し処理するための携帯可能なデ−タ担体 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| UST843614I4 (Direct) * | 1969-07-22 | |||
| GB1401265A (en) * | 1971-07-19 | 1975-07-16 | Texas Instruments Inc | Variable function programmed calculator |
| US3781852A (en) * | 1972-11-21 | 1973-12-25 | Bowmar Instrument Corp | Calculator display circuit |
| DK664473A (Direct) * | 1973-09-24 | 1975-05-12 | Texas Instruments Inc |
-
1975
- 1975-11-18 JP JP50137851A patent/JPS5173856A/ja active Pending
- 1975-11-19 NL NL7513516A patent/NL7513516A/xx not_active Application Discontinuation
- 1975-11-19 DE DE19752551852 patent/DE2551852A1/de active Granted
- 1975-11-19 FR FR7535355A patent/FR2292286A1/fr active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6270993A (ja) * | 1977-08-26 | 1987-04-01 | ブル・エス・アー | デ−タを記憶し処理するための携帯可能なデ−タ担体 |
| JPS54106128A (en) * | 1978-02-08 | 1979-08-20 | Nec Corp | Time-division display unit |
| JPS58115372A (ja) * | 1981-12-29 | 1983-07-09 | Fujitsu Ltd | 半導体装置試験回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2551852A1 (de) | 1976-05-20 |
| DE2551852C2 (Direct) | 1991-06-20 |
| FR2292286B1 (Direct) | 1983-01-21 |
| FR2292286A1 (fr) | 1976-06-18 |
| NL7513516A (nl) | 1976-05-21 |
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