JPS5120267B2 - - Google Patents

Info

Publication number
JPS5120267B2
JPS5120267B2 JP47047382A JP4738272A JPS5120267B2 JP S5120267 B2 JPS5120267 B2 JP S5120267B2 JP 47047382 A JP47047382 A JP 47047382A JP 4738272 A JP4738272 A JP 4738272A JP S5120267 B2 JPS5120267 B2 JP S5120267B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP47047382A
Other languages
Japanese (ja)
Other versions
JPS499985A (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP47047382A priority Critical patent/JPS5120267B2/ja
Priority to AU55362/73A priority patent/AU482820B2/en
Priority to US00358641A priority patent/US3858237A/en
Priority to US00358701A priority patent/US3826699A/en
Priority to GB2232173A priority patent/GB1430425A/en
Priority to CA171,164A priority patent/CA966585A/en
Priority to GB2232273A priority patent/GB1363223A/en
Priority to FR7317099A priority patent/FR2184716B1/fr
Priority to IT49912/73A priority patent/IT985023B/it
Priority to FR7317098A priority patent/FR2184715B1/fr
Priority to DE19732324384 priority patent/DE2324384C3/de
Priority to DE19732324385 priority patent/DE2324385C3/de
Publication of JPS499985A publication Critical patent/JPS499985A/ja
Publication of JPS5120267B2 publication Critical patent/JPS5120267B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
JP47047382A 1972-05-13 1972-05-13 Expired JPS5120267B2 (en:Method)

Priority Applications (12)

Application Number Priority Date Filing Date Title
JP47047382A JPS5120267B2 (en:Method) 1972-05-13 1972-05-13
AU55362/73A AU482820B2 (en) 1972-05-13 1973-05-07 A semiconductor integrated circuit isolated through dielectric material anda method for manufacturing thesame
US00358641A US3858237A (en) 1972-05-13 1973-05-09 Semiconductor integrated circuit isolated through dielectric material
US00358701A US3826699A (en) 1972-05-13 1973-05-09 Method for manufacturing a semiconductor integrated circuit isolated through dielectric material
GB2232173A GB1430425A (en) 1972-05-13 1973-05-10 Semiconductor integrated circuit isolated through dielectric material
CA171,164A CA966585A (en) 1972-05-13 1973-05-10 Semiconductor integrated circuit isolated through dielectric material and a method for manufacturing the same
GB2232273A GB1363223A (en) 1972-05-13 1973-05-10 Method for manufacturing a semiconductor integrated circuit isolated through dielectric material
FR7317099A FR2184716B1 (en:Method) 1972-05-13 1973-05-11
IT49912/73A IT985023B (it) 1972-05-13 1973-05-11 Circuito integrato a semiconduttori isolato mediante materiale dielet trico e metodo per la manifattura di esso
FR7317098A FR2184715B1 (en:Method) 1972-05-13 1973-05-11
DE19732324384 DE2324384C3 (de) 1972-05-13 1973-05-14 Integrierte Halbleiterschaltung
DE19732324385 DE2324385C3 (de) 1972-05-13 1973-05-14 Verfahren zur Herstellung einer integrierten Halbleiterschaltung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP47047382A JPS5120267B2 (en:Method) 1972-05-13 1972-05-13

Publications (2)

Publication Number Publication Date
JPS499985A JPS499985A (en:Method) 1974-01-29
JPS5120267B2 true JPS5120267B2 (en:Method) 1976-06-23

Family

ID=12773536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP47047382A Expired JPS5120267B2 (en:Method) 1972-05-13 1972-05-13

Country Status (6)

Country Link
US (2) US3826699A (en:Method)
JP (1) JPS5120267B2 (en:Method)
CA (1) CA966585A (en:Method)
FR (2) FR2184715B1 (en:Method)
GB (2) GB1363223A (en:Method)
IT (1) IT985023B (en:Method)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3956034A (en) * 1973-07-19 1976-05-11 Harris Corporation Isolated photodiode array
US3956033A (en) * 1974-01-03 1976-05-11 Motorola, Inc. Method of fabricating an integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector
US3913124A (en) * 1974-01-03 1975-10-14 Motorola Inc Integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector including fabrication method therefor
US3920482A (en) * 1974-03-13 1975-11-18 Signetics Corp Method for forming a semiconductor structure having islands isolated by adjacent moats
US4146905A (en) * 1974-06-18 1979-03-27 U.S. Philips Corporation Semiconductor device having complementary transistor structures and method of manufacturing same
US4173674A (en) * 1975-05-12 1979-11-06 Hitachi, Ltd. Dielectric insulator separated substrate for semiconductor integrated circuits
US3976511A (en) * 1975-06-30 1976-08-24 Ibm Corporation Method for fabricating integrated circuit structures with full dielectric isolation by ion bombardment
JPS5293285A (en) * 1976-02-02 1977-08-05 Hitachi Ltd Structure for semiconductor device
US4095330A (en) * 1976-08-30 1978-06-20 Raytheon Company Composite semiconductor integrated circuit and method of manufacture
US4228450A (en) * 1977-10-25 1980-10-14 International Business Machines Corporation Buried high sheet resistance structure for high density integrated circuits with reach through contacts
JPS5951743B2 (ja) * 1978-11-08 1984-12-15 株式会社日立製作所 半導体集積装置
US4269636A (en) * 1978-12-29 1981-05-26 Harris Corporation Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
JPS55138229A (en) * 1979-04-13 1980-10-28 Hitachi Ltd Manufacture of dielectric material for insulation- separation substrate
GB2060252B (en) * 1979-09-17 1984-02-22 Nippon Telegraph & Telephone Mutually isolated complementary semiconductor elements
US4255209A (en) * 1979-12-21 1981-03-10 Harris Corporation Process of fabricating an improved I2 L integrated circuit utilizing diffusion and epitaxial deposition
US4290831A (en) * 1980-04-18 1981-09-22 Harris Corporation Method of fabricating surface contacts for buried layer into dielectric isolated islands
US4510518A (en) * 1983-07-29 1985-04-09 Harris Corporation Dielectric isolation fabrication for laser trimming
US4468414A (en) * 1983-07-29 1984-08-28 Harris Corporation Dielectric isolation fabrication for laser trimming
JPS6081839A (ja) * 1983-10-12 1985-05-09 Fujitsu Ltd 半導体装置の製造方法
JPS6097659A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体集積回路
KR850004178A (ko) * 1983-11-30 1985-07-01 야마모도 다꾸마 유전체 분리형 집적회로 장치의 제조방법
US4879585A (en) * 1984-03-31 1989-11-07 Kabushiki Kaisha Toshiba Semiconductor device
JPS61121433A (ja) * 1984-11-19 1986-06-09 Sharp Corp 半導体基板
JPS62172671A (ja) * 1986-01-27 1987-07-29 松下電工株式会社 電話線接続用ジヤツク
US4994301A (en) * 1986-06-30 1991-02-19 Nihon Sinku Gijutsu Kabusiki Kaisha ACVD (chemical vapor deposition) method for selectively depositing metal on a substrate
US4849260A (en) * 1986-06-30 1989-07-18 Nihon Sinku Gijutsu Kabushiki Kaisha Method for selectively depositing metal on a substrate
US5246877A (en) * 1989-01-31 1993-09-21 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device having a polycrystalline electrode region
US5270569A (en) * 1990-01-24 1993-12-14 Harris Corporation Method and device in which bottoming of a well in a dielectrically isolated island is assured
US5306649A (en) * 1991-07-26 1994-04-26 Avantek, Inc. Method for producing a fully walled emitter-base structure in a bipolar transistor
DE4233773C2 (de) * 1992-10-07 1996-09-19 Daimler Benz Ag Halbleiterstruktur für Halbleiterbauelemente mit hoher Durchbruchspannung
US5318663A (en) * 1992-12-23 1994-06-07 International Business Machines Corporation Method for thinning SOI films having improved thickness uniformity
JP3748744B2 (ja) * 1999-10-18 2006-02-22 Ｎｅｃエレクトロニクス株式会社 半導体装置
US6498381B2 (en) * 2001-02-22 2002-12-24 Tru-Si Technologies, Inc. Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same
US12343830B2 (en) 2021-08-26 2025-07-01 Steven Lombardo Automatic seal applicator apparatus and methods of using the same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3381182A (en) * 1964-10-19 1968-04-30 Philco Ford Corp Microcircuits having buried conductive layers
US3440498A (en) * 1966-03-14 1969-04-22 Nat Semiconductor Corp Contacts for insulation isolated semiconductor integrated circuitry
US3432919A (en) * 1966-10-31 1969-03-18 Raytheon Co Method of making semiconductor diodes
DE1937755A1 (de) * 1968-07-26 1970-02-12 Signetics Corp Halbleiter-Baugruppe und -Vorrichtung mit ummanteltem Traegerleitungsaufbau und Verfahren zur Herstellung derselben
US3624463A (en) * 1969-10-17 1971-11-30 Motorola Inc Method of and apparatus for indicating semiconductor island thickness and for increasing isolation and decreasing capacity between islands
US3738877A (en) * 1970-08-24 1973-06-12 Motorola Inc Semiconductor devices

Also Published As

Publication number Publication date
DE2324385B2 (de) 1976-12-23
GB1430425A (en) 1976-03-31
FR2184715B1 (en:Method) 1978-02-10
FR2184716A1 (en:Method) 1973-12-28
DE2324384B2 (de) 1977-03-17
FR2184715A1 (en:Method) 1973-12-28
DE2324385A1 (de) 1973-11-22
US3858237A (en) 1974-12-31
CA966585A (en) 1975-04-22
DE2324384A1 (de) 1973-11-22
AU5536273A (en) 1975-07-03
US3826699A (en) 1974-07-30
IT985023B (it) 1974-11-30
GB1363223A (en) 1974-08-14
FR2184716B1 (en:Method) 1978-01-06
JPS499985A (en:Method) 1974-01-29

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