JPS50786A - - Google Patents

Info

Publication number
JPS50786A
JPS50786A JP48125576A JP12557673A JPS50786A JP S50786 A JPS50786 A JP S50786A JP 48125576 A JP48125576 A JP 48125576A JP 12557673 A JP12557673 A JP 12557673A JP S50786 A JPS50786 A JP S50786A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP48125576A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS50786A publication Critical patent/JPS50786A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline

Landscapes

  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Bipolar Integrated Circuits (AREA)
JP48125576A 1972-11-09 1973-11-09 Pending JPS50786A (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE14522/72A SE361232B (en:Method) 1972-11-09 1972-11-09

Publications (1)

Publication Number Publication Date
JPS50786A true JPS50786A (en:Method) 1975-01-07

Family

ID=20299252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP48125576A Pending JPS50786A (en:Method) 1972-11-09 1973-11-09

Country Status (6)

Country Link
US (1) US3892596A (en:Method)
JP (1) JPS50786A (en:Method)
DE (1) DE2355626A1 (en:Method)
FR (1) FR2206588B1 (en:Method)
GB (1) GB1384680A (en:Method)
SE (1) SE361232B (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52134471A (en) * 1976-05-03 1977-11-10 Ebauches Tavannes Sa Date calender clock movement

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3930893A (en) * 1975-03-03 1976-01-06 Honeywell Information Systems, Inc. Conductivity connected charge-coupled device fabrication process
JPS588588B2 (ja) * 1975-05-28 1983-02-16 株式会社日立製作所 半導体集積回路
US4001869A (en) * 1975-06-09 1977-01-04 Sprague Electric Company Mos-capacitor for integrated circuits
US4204131A (en) * 1977-10-11 1980-05-20 Mostek Corporation Depletion controlled switch
US4155778A (en) * 1977-12-30 1979-05-22 International Business Machines Corporation Forming semiconductor devices having ion implanted and diffused regions
US5504363A (en) * 1992-09-02 1996-04-02 Motorola Inc. Semiconductor device
US5702959A (en) * 1995-05-31 1997-12-30 Texas Instruments Incorporated Method for making an isolated vertical transistor
US6765290B2 (en) * 2002-04-02 2004-07-20 Intersil Americas Inc. Arrangement for back-biasing multiple integrated circuit substrates at maximum supply voltage among all circuits

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3341754A (en) * 1966-01-20 1967-09-12 Ion Physics Corp Semiconductor resistor containing interstitial and substitutional ions formed by an ion implantation method
US3548269A (en) * 1968-12-03 1970-12-15 Sprague Electric Co Resistive layer semiconductive device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3448344A (en) * 1966-03-15 1969-06-03 Westinghouse Electric Corp Mosaic of semiconductor elements interconnected in an xy matrix
FR1527898A (fr) * 1967-03-16 1968-06-07 Radiotechnique Coprim Rtc Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication
US3489963A (en) * 1967-06-16 1970-01-13 Ibm Integrated differential transistor
GB1233545A (en:Method) * 1967-08-18 1971-05-26
GB1226899A (en:Method) * 1968-07-17 1971-03-31
BE759667A (fr) * 1969-12-01 1971-06-01 Philips Nv Procede permettant la fabrication d'un dispositif semiconducteur, et dispositif semiconducteur obtenu par la mise en oeuvre de ce procede
GB1307546A (en) * 1970-05-22 1973-02-21 Mullard Ltd Methods of manufacturing semiconductor devices
AU464038B2 (en) * 1970-12-09 1975-08-14 Philips Nv Improvements in and relating to semiconductor devices
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3341754A (en) * 1966-01-20 1967-09-12 Ion Physics Corp Semiconductor resistor containing interstitial and substitutional ions formed by an ion implantation method
US3548269A (en) * 1968-12-03 1970-12-15 Sprague Electric Co Resistive layer semiconductive device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52134471A (en) * 1976-05-03 1977-11-10 Ebauches Tavannes Sa Date calender clock movement

Also Published As

Publication number Publication date
FR2206588A1 (en:Method) 1974-06-07
DE2355626A1 (de) 1974-05-30
US3892596A (en) 1975-07-01
FR2206588B1 (en:Method) 1977-06-03
AU6163873A (en) 1975-04-24
SE361232B (en:Method) 1973-10-22
GB1384680A (en) 1975-02-19

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