JPS50152629A - - Google Patents
Info
- Publication number
- JPS50152629A JPS50152629A JP49059569A JP5956974A JPS50152629A JP S50152629 A JPS50152629 A JP S50152629A JP 49059569 A JP49059569 A JP 49059569A JP 5956974 A JP5956974 A JP 5956974A JP S50152629 A JPS50152629 A JP S50152629A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49059569A JPS50152629A (en) | 1974-05-27 | 1974-05-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49059569A JPS50152629A (en) | 1974-05-27 | 1974-05-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS50152629A true JPS50152629A (en) | 1975-12-08 |
Family
ID=13116991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49059569A Pending JPS50152629A (en) | 1974-05-27 | 1974-05-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS50152629A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54151334U (en) * | 1978-04-13 | 1979-10-20 | ||
| JPS63106046A (en) * | 1986-10-22 | 1988-05-11 | Mitsubishi Electric Corp | Data processor |
| JPS63127337A (en) * | 1986-11-17 | 1988-05-31 | Fujitsu Ltd | Macroinstruction fetch system |
| JPS63149733A (en) * | 1986-12-15 | 1988-06-22 | Fujitsu Ltd | Instruction fetching system |
| JPS63149734A (en) * | 1986-12-15 | 1988-06-22 | Fujitsu Ltd | Instruction fetching system |
| WO1995016954A1 (en) * | 1993-12-15 | 1995-06-22 | Silicon Graphics Inc. | Apparatus for processing instruction in computer system |
| JPH10510146A (en) * | 1994-11-21 | 1998-10-06 | ザ ユニバーシティ オブ リーズ | Modified proteinase inhibitors |
-
1974
- 1974-05-27 JP JP49059569A patent/JPS50152629A/ja active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54151334U (en) * | 1978-04-13 | 1979-10-20 | ||
| JPS63106046A (en) * | 1986-10-22 | 1988-05-11 | Mitsubishi Electric Corp | Data processor |
| JPS63127337A (en) * | 1986-11-17 | 1988-05-31 | Fujitsu Ltd | Macroinstruction fetch system |
| JPS63149733A (en) * | 1986-12-15 | 1988-06-22 | Fujitsu Ltd | Instruction fetching system |
| JPS63149734A (en) * | 1986-12-15 | 1988-06-22 | Fujitsu Ltd | Instruction fetching system |
| JPH0464094B2 (en) * | 1986-12-15 | 1992-10-13 | Fujitsu Ltd | |
| WO1995016954A1 (en) * | 1993-12-15 | 1995-06-22 | Silicon Graphics Inc. | Apparatus for processing instruction in computer system |
| US5954815A (en) * | 1993-12-15 | 1999-09-21 | Silicon Graphics, Inc. | Invalidating instructions in fetched instruction blocks upon predicted two-step branch operations with second operation relative target address |
| US6247124B1 (en) | 1993-12-15 | 2001-06-12 | Mips Technologies, Inc. | Branch prediction entry with target line index calculated using relative position of second operation of two step branch operation in a line of instructions |
| US6691221B2 (en) | 1993-12-15 | 2004-02-10 | Mips Technologies, Inc. | Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel execution |
| JPH10510146A (en) * | 1994-11-21 | 1998-10-06 | ザ ユニバーシティ オブ リーズ | Modified proteinase inhibitors |