JPS4845185A - - Google Patents

Info

Publication number
JPS4845185A
JPS4845185A JP46080047A JP8004771A JPS4845185A JP S4845185 A JPS4845185 A JP S4845185A JP 46080047 A JP46080047 A JP 46080047A JP 8004771 A JP8004771 A JP 8004771A JP S4845185 A JPS4845185 A JP S4845185A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP46080047A
Other languages
Japanese (ja)
Other versions
JPS5232234B2 (enrdf_load_stackoverflow
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP46080047A priority Critical patent/JPS5232234B2/ja
Priority to GB4564772A priority patent/GB1413161A/en
Priority to US00295795A priority patent/US3849270A/en
Priority to DE2265257A priority patent/DE2265257C2/de
Priority to DE2249832A priority patent/DE2249832C3/de
Publication of JPS4845185A publication Critical patent/JPS4845185A/ja
Publication of JPS5232234B2 publication Critical patent/JPS5232234B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/969Simultaneous formation of monocrystalline and polycrystalline regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
JP46080047A 1971-10-11 1971-10-11 Expired JPS5232234B2 (enrdf_load_stackoverflow)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP46080047A JPS5232234B2 (enrdf_load_stackoverflow) 1971-10-11 1971-10-11
GB4564772A GB1413161A (en) 1971-10-11 1972-10-04 Process for manufacturing semiconductor devices
US00295795A US3849270A (en) 1971-10-11 1972-10-10 Process of manufacturing semiconductor devices
DE2265257A DE2265257C2 (de) 1971-10-11 1972-10-11 Verfahren zur Herstellung einer integrierten Halbleiterschaltung
DE2249832A DE2249832C3 (de) 1971-10-11 1972-10-11 Verfahren zum Herstellen einer Verdrahtungsschicht und Anwendung des Verfahrens zum Herstellen von Mehrschichtenverdrahtungen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP46080047A JPS5232234B2 (enrdf_load_stackoverflow) 1971-10-11 1971-10-11

Publications (2)

Publication Number Publication Date
JPS4845185A true JPS4845185A (enrdf_load_stackoverflow) 1973-06-28
JPS5232234B2 JPS5232234B2 (enrdf_load_stackoverflow) 1977-08-19

Family

ID=13707313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP46080047A Expired JPS5232234B2 (enrdf_load_stackoverflow) 1971-10-11 1971-10-11

Country Status (4)

Country Link
US (1) US3849270A (enrdf_load_stackoverflow)
JP (1) JPS5232234B2 (enrdf_load_stackoverflow)
DE (2) DE2265257C2 (enrdf_load_stackoverflow)
GB (1) GB1413161A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893261A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体装置の製造方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583380B2 (ja) * 1977-03-04 1983-01-21 株式会社日立製作所 半導体装置とその製造方法
WO1990000476A1 (en) * 1988-07-12 1990-01-25 The Regents Of The University Of California Planarized interconnect etchback
US5256565A (en) * 1989-05-08 1993-10-26 The United States Of America As Represented By The United States Department Of Energy Electrochemical planarization
US5096550A (en) * 1990-10-15 1992-03-17 The United States Of America As Represented By The United States Department Of Energy Method and apparatus for spatially uniform electropolishing and electrolytic etching
US7531079B1 (en) 1998-10-26 2009-05-12 Novellus Systems, Inc. Method and apparatus for uniform electropolishing of damascene IC structures by selective agitation
US6315883B1 (en) 1998-10-26 2001-11-13 Novellus Systems, Inc. Electroplanarization of large and small damascene features using diffusion barriers and electropolishing
US7449098B1 (en) 1999-10-05 2008-11-11 Novellus Systems, Inc. Method for planar electroplating
US6709565B2 (en) 1998-10-26 2004-03-23 Novellus Systems, Inc. Method and apparatus for uniform electropolishing of damascene ic structures by selective agitation
US6495442B1 (en) 2000-10-18 2002-12-17 Magic Corporation Post passivation interconnection schemes on top of the IC chips
US6653226B1 (en) 2001-01-09 2003-11-25 Novellus Systems, Inc. Method for electrochemical planarization of metal surfaces
WO2003088352A1 (en) * 2002-04-09 2003-10-23 Rensselaer Polytechnic Institute Electrochemical planarization of metal feature surfaces
US7799200B1 (en) 2002-07-29 2010-09-21 Novellus Systems, Inc. Selective electrochemical accelerator removal
US8530359B2 (en) 2003-10-20 2013-09-10 Novellus Systems, Inc. Modulated metal removal using localized wet etching
US8158532B2 (en) * 2003-10-20 2012-04-17 Novellus Systems, Inc. Topography reduction and control by selective accelerator removal
US8168540B1 (en) 2009-12-29 2012-05-01 Novellus Systems, Inc. Methods and apparatus for depositing copper on tungsten

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3169892A (en) * 1959-04-08 1965-02-16 Jerome H Lemelson Method of making a multi-layer electrical circuit
GB1048424A (en) * 1963-08-28 1966-11-16 Int Standard Electric Corp Improvements in or relating to semiconductor devices
US3372063A (en) * 1964-12-22 1968-03-05 Hitachi Ltd Method for manufacturing at least one electrically isolated region of a semiconductive material
US3409523A (en) * 1966-03-10 1968-11-05 Bell Telephone Labor Inc Electroetching an aluminum plated semiconductor in a tetraalkylammonium hydroxide electrolyte
FR96113E (fr) * 1967-12-06 1972-05-19 Ibm Dispositif semi-conducteur.
NL7101307A (enrdf_load_stackoverflow) * 1970-02-03 1971-08-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893261A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS5232234B2 (enrdf_load_stackoverflow) 1977-08-19
DE2249832B2 (de) 1977-06-02
DE2265257C2 (de) 1983-10-27
US3849270A (en) 1974-11-19
GB1413161A (en) 1975-11-05
DE2249832C3 (de) 1982-02-18
DE2265257A1 (de) 1977-02-10
DE2249832A1 (de) 1973-04-19

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