JPS4843805A - - Google Patents

Info

Publication number
JPS4843805A
JPS4843805A JP47097940A JP9794072A JPS4843805A JP S4843805 A JPS4843805 A JP S4843805A JP 47097940 A JP47097940 A JP 47097940A JP 9794072 A JP9794072 A JP 9794072A JP S4843805 A JPS4843805 A JP S4843805A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP47097940A
Other languages
Japanese (ja)
Other versions
JPS544561B2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4843805A publication Critical patent/JPS4843805A/ja
Publication of JPS544561B2 publication Critical patent/JPS544561B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06—Time-space-time switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
JP9794072A 1971-09-30 1972-09-29 Expired JPS544561B2 (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2148994A DE2148994C2 (de) 1971-09-30 1971-09-30 Verfahren zur Vermittlung von PCM Si gnalen eines PCM Zeitmultiplex Fernmeldenetzes

Publications (2)

Publication Number Publication Date
JPS4843805A true JPS4843805A (en:Method) 1973-06-25
JPS544561B2 JPS544561B2 (en:Method) 1979-03-08

Family

ID=5821150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9794072A Expired JPS544561B2 (en:Method) 1971-09-30 1972-09-29

Country Status (11)

Country Link
US (1) US3881064A (en:Method)
JP (1) JPS544561B2 (en:Method)
AT (1) AT328517B (en:Method)
BE (1) BE789515A (en:Method)
CH (1) CH562548A5 (en:Method)
DE (1) DE2148994C2 (en:Method)
FR (1) FR2155472A5 (en:Method)
GB (1) GB1400490A (en:Method)
IT (1) IT967994B (en:Method)
LU (1) LU66188A1 (en:Method)
NL (1) NL179532C (en:Method)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55157386U (en:Method) * 1979-04-25 1980-11-12
JPS5917596B2 (ja) * 1979-08-21 1984-04-21 ケイディディ株式会社 時分割通話路スイッチ回路
DE3104002C2 (de) * 1981-02-05 1984-01-26 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung für Fernmeldevermittlungsanlagen, insbesondere PCM-Fernsprechvermittlungsanlagen, mit einer Zeitmultiplexkoppelanordnung mit Zeitlagenvielfachen
JP2520585B2 (ja) * 1983-06-06 1996-07-31 日通工株式会社 時分割通話路における時間スイツチ
FR2574603B1 (fr) * 1984-12-07 1987-03-06 Delachaux Sa Element de barre conductrice a joint de dilatation
DE3509511A1 (de) * 1985-03-16 1986-09-18 Philips Patentverwaltung Gmbh, 2000 Hamburg Verfahren und schaltungsanordnung zur phasensprungfreien durchschaltung von breitbandigen digitalsignalen in einem synchronen breitbandkommunikationsnetz
ATE126953T1 (de) * 1989-06-16 1995-09-15 British Telecomm Datenvermittlungsknoten.
US5425022A (en) * 1989-06-16 1995-06-13 British Telecommunications Public Limited Company Data switching nodes
CN1237508C (zh) * 2001-10-03 2006-01-18 索尼株式会社 编码设备和方法,解码设备和方法,以及记录介质记录设备和方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7005143A (en:Method) * 1970-04-10 1971-10-12
US3678205A (en) * 1971-01-04 1972-07-18 Gerald Cohen Modular switching network
BE789402A (fr) * 1971-10-01 1973-01-15 Western Electric Co Systeme de commutation a repartition temporelle

Also Published As

Publication number Publication date
FR2155472A5 (en:Method) 1973-05-18
DE2148994A1 (en:Method) 1973-03-15
NL7213241A (en:Method) 1973-04-03
BE789515A (fr) 1973-03-29
NL179532C (nl) 1986-09-16
LU66188A1 (en:Method) 1973-01-17
US3881064A (en) 1975-04-29
AT328517B (de) 1976-03-25
JPS544561B2 (en:Method) 1979-03-08
CH562548A5 (en:Method) 1975-05-30
DE2148994C2 (de) 1973-09-27
IT967994B (it) 1974-03-11
ATA798572A (de) 1975-06-15
NL179532B (nl) 1986-04-16
GB1400490A (en) 1975-07-16
DE2148994B1 (de) 1973-03-15

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