JPH1187922A - Manufacture of multilayered wiring board - Google Patents

Manufacture of multilayered wiring board

Info

Publication number
JPH1187922A
JPH1187922A JP9246293A JP24629397A JPH1187922A JP H1187922 A JPH1187922 A JP H1187922A JP 9246293 A JP9246293 A JP 9246293A JP 24629397 A JP24629397 A JP 24629397A JP H1187922 A JPH1187922 A JP H1187922A
Authority
JP
Japan
Prior art keywords
metal foil
conductive metal
hole
insulating adhesive
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9246293A
Other languages
Japanese (ja)
Inventor
Kazuhisa Otsuka
和久 大塚
Shigeharu Ariga
茂晴 有家
Toyoki Ito
豊樹 伊藤
Naoyuki Urasaki
直之 浦崎
Daisuke Fujimoto
大輔 藤本
義之 ▲つる▼
Yoshiyuki Tsuru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP9246293A priority Critical patent/JPH1187922A/en
Publication of JPH1187922A publication Critical patent/JPH1187922A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a manufacture of a multilayered wiring board, capable of raising the density of wiring, without the use of a special insulation material and without the need of considerable equipment investment. SOLUTION: This manufacture is provided with processes for laminating an insulating adhesive layer 2 and a conductor metallic foil 1 in the order on the surface of an inner layer sheet 4, where an inner layer circuit 3 is formed, pressing, heating and integrating them, forming an opening part 5 by etching and removing the conductor metallic foil 1 at a part for forming an IVH(interstitial via hole) 9, jointing a film 81 for plating resist, irradiating the opening part 5 formed on the conductor metallic foil 1 and the periphery with a laser beam 6 from the above of the film 81 for the plating resist, opening a non-through hole 11 until the inner layer circuit 3 is exposed from the insulating adhesive layer 2, applying a catalyst 7 for plating at least to the insulating adhesive layer 2 on the inner wall of the non-through hole 11, performing plating 13 at the part without the film 81 for the plating resist, removing the film 81 for the plating resist, etching and removing the unwonted parts of the conductor metallic foil 1 and forming an outer layer wiring 10.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、隣接する層間のみ
を接続するための InterstitialVia
Hole(以下、IVHという。)を持つ多層配線板の
製造方法に関する。
The present invention relates to an interstitial via for connecting only adjacent layers.
The present invention relates to a method for manufacturing a multilayer wiring board having a hole (hereinafter, referred to as IVH).

【0002】[0002]

【従来の技術】多層配線板においては、従来から層間を
電気的に接続する方法としては、貫通穴をあけた後に金
属めっきする手法が主流であった。しかし、この方法で
は貫通穴による配線禁止領域が全層にあるため高密度化
の障害となっており、近年は、隣接する層間のみを接続
するためのIVHを使用する方式が実用化されてきてい
る。この製造方法としては、特開平4−148590号
公報に記載されているように、内層回路基板の表面に感
光性を有する絶縁層を形成し、層間接続を行う部分の基
板表面の絶縁層にフォトリソグラフ法で非貫通穴をあ
け、その穴及び基板表面を金属めっきした後、基板表面
の導体をエッチング法により回路形成する方法(フォト
ビア法)がある。
2. Description of the Related Art Conventionally, in a multilayer wiring board, as a method of electrically connecting layers, a method of metal plating after forming a through hole has been mainly used. However, in this method, a wiring prohibition region due to a through hole is present in all layers, which is an obstacle to high density. In recent years, a method using an IVH for connecting only adjacent layers has been put into practical use. I have. As described in Japanese Patent Application Laid-Open No. 148590/1992, a photosensitive insulating layer is formed on the surface of an inner circuit board, and a photoconductive insulating layer is formed on the insulating layer on the surface of the substrate where interlayer connection is to be performed. There is a method in which a non-through hole is formed by a lithographic method, the hole and the substrate surface are metal-plated, and a conductor on the substrate surface is formed by etching a circuit (photo via method).

【0003】また、特公平4−3637号公報に記載さ
れている様に、金属箔と絶縁性接着剤を、内層回路基板
の表面に重ねて積層接着し、層間接続を行う部分の基板
表面の金属層にエッチング法で穴をあけ、更にレーザー
等で非貫通穴をあけ、その穴及び基板表面を金属めっき
した後、基板表面の導体をエッチング法により回路形成
する方法(レーザー穴あけ法)もある。
Further, as described in Japanese Patent Publication No. 4-3637, a metal foil and an insulating adhesive are layered and adhered on the surface of an inner circuit board, and a portion of the substrate surface where the interlayer connection is to be performed is performed. There is also a method of forming a hole in a metal layer by an etching method, further making a non-through hole with a laser or the like, plating the hole and the substrate surface with a metal, and then forming a circuit on a conductor on the substrate surface by an etching method (laser drilling method). .

【0004】[0004]

【発明が解決しようとする課題】特開平4−14859
0号公報に記載された方法では、絶縁層にはフォトリソ
性、絶縁性、めっき金属との接着性、基板への塗膜形成
性等の多くの特性が求められることになるが、現在、全
てを満たすものは少なく、また、現在の設備だけで行う
こともできず、何らかの設備的な投資が必要となる。例
えば、絶縁性とフォトリソ性を両立するために、極性基
の少ない材料系を選択するとフォトリソ工程の現像にお
いては、溶剤現像を採用しなければならず、環境保護の
観点から塩素系溶剤が使えないため、可燃性溶剤を用い
て完全防爆型の装置が必要となる。また、特公平4−3
637号公報に記載された方法では、金属箔上に更に金
属めっきを付けるために導体回路となる金属層の厚みが
厚く、エッチング法で回路を形成する場合には、回路の
微細化に限界がある。
Problems to be Solved by the Invention Japanese Patent Laid-Open No. 4-14859
According to the method described in Japanese Patent Publication No. 0, the insulating layer is required to have many characteristics such as photolithography, insulation, adhesion to a plated metal, and ability to form a coating film on a substrate. Few satisfy the requirements, and cannot be performed only with the current equipment, and some capital investment is required. For example, in order to achieve both insulating properties and photolithographic properties, if a material system having a small number of polar groups is selected, in the photolithographic process development, solvent development must be adopted, and chlorine-based solvents cannot be used from the viewpoint of environmental protection. Therefore, a completely explosion-proof device using a flammable solvent is required. In addition, 4-3
In the method described in Japanese Patent No. 637, the thickness of a metal layer serving as a conductor circuit is large because metal plating is further performed on a metal foil. When a circuit is formed by an etching method, there is a limit to miniaturization of a circuit. is there.

【0005】本発明は、特殊な絶縁材料を用いず、多大
な設備投資を必要とせずに配線の高密度化が可能な多層
配線板の製造法を提供することを目的とする。
It is an object of the present invention to provide a method for manufacturing a multilayer wiring board capable of increasing the wiring density without using a special insulating material and without requiring a large capital investment.

【0006】[0006]

【課題を解決するための手段】本発明の多層配線板の製
造法は、隣接する層間のみを接続するためのIVH9を
持つ多層配線板の製造方法において、以下の工程を含む
ことを特徴とする。 a.図1(a)に示すように、内層回路3を形成した内
層基板4の表面に、絶縁性接着層2と導体金属箔1とを
この順に重ね、加圧加熱して一体化する工程、 b.図1(b)に示すように、導体金属箔1と内層回路
3の電気的接続を行うIVH9を形成する箇所の、導体
金属箔1をエッチング除去して開口部5を形成する工
程、 c.図1(c)に示すように、開口部5を形成した導体
金属箔1の表面に、めっきレジスト用フィルム81を貼
る工程、 d.図1(d)に示すように、導体金属箔1に形成した
開口部5とその周囲に、めっきレジスト用フィルム81
の上からレーザー光6を照射して、絶縁性接着層2に、
内層回路3が露出するまで非貫通穴11をあける工程、 e.図1(e)に示すように、少なくとも、非貫通穴1
1内壁の絶縁性接着層2に、めっき用触媒7を付与する
工程、 f.図1(f)に示すように、めっきレジスト用フィル
ム81のない箇所にめっき13を行う工程、 g.図1(g)に示すように、めっきレジスト用フィル
ム81を除去する工程、 h.図1(h)に示すように、導体金属箔1の不要な箇
所をエッチング除去して、外層配線10を形成する工
程。
A method of manufacturing a multilayer wiring board according to the present invention is characterized in that the method of manufacturing a multilayer wiring board having an IVH 9 for connecting only adjacent layers includes the following steps. . a. 1 (a), an insulating adhesive layer 2 and a conductive metal foil 1 are superposed in this order on a surface of an inner substrate 4 on which an inner circuit 3 is formed, and integrated by pressing and heating; b. . As shown in FIG. 1B, a step of forming an opening 5 by etching and removing the conductive metal foil 1 at a location where an IVH 9 for electrically connecting the conductive metal foil 1 and the inner layer circuit 3 is formed, c. As shown in FIG. 1C, a step of attaching a plating resist film 81 to the surface of the conductive metal foil 1 in which the openings 5 are formed, d. As shown in FIG. 1D, a plating resist film 81 is formed around the opening 5 formed in the conductive metal foil 1 and the periphery thereof.
Irradiate a laser beam 6 from above to the insulating adhesive layer 2,
Drilling a non-through hole 11 until the inner layer circuit 3 is exposed, e. As shown in FIG. 1E, at least the non-through hole 1
1 a step of applying a plating catalyst 7 to the insulating adhesive layer 2 on the inner wall; f. As shown in FIG. 1 (f), a step of performing plating 13 on a portion where there is no plating resist film 81, g. 1g, a step of removing the plating resist film 81, h. As shown in FIG. 1H, an unnecessary portion of the conductive metal foil 1 is removed by etching to form an outer wiring 10.

【0007】多層化するには、以下のようにすることに
よって可能である。 a.内層回路3を形成した内層基板4の表面に、絶縁性
接着層2と導体金属箔1とをこの順に重ね、加圧加熱し
て一体化する工程、 b.導体金属箔1と内層回路3の電気的接続を行うIV
H9を形成する箇所の、導体金属箔1をエッチング除去
して開口部5を形成する工程、 c.開口部5を形成した導体金属箔1の表面に、めっき
レジスト用フィルム81を貼る工程、 d.導体金属箔1に形成した開口部5とその周囲に、め
っきレジスト用フィルム81の上からレーザー光6を照
射して、絶縁性接着層2に、内層回路3が露出するまで
非貫通穴11をあける工程、 e.少なくとも、非貫通穴11内壁の絶縁性接着層2
に、めっき用触媒7を付与する工程、 f.めっきレジスト用フィルム81のない箇所にめっき
13を行う工程、 g.めっきレジスト用フィルム81を除去する工程、 h1.導体金属箔1の不要な箇所をエッチング除去し
て、第1の外層配線を形成する工程、 j.工程a〜工程h1を必要回数繰り返し、工程a〜工
程hを行う工程。
[0007] Multilayering is possible as follows. a. A step of laminating the insulating adhesive layer 2 and the conductive metal foil 1 on the surface of the inner layer substrate 4 on which the inner layer circuit 3 is formed in this order, and pressing and heating to integrate them; b. IV for electrically connecting conductive metal foil 1 and inner layer circuit 3
A step of etching and removing the conductive metal foil 1 at locations where H9 is to be formed to form openings 5; c. Attaching a plating resist film 81 to the surface of the conductive metal foil 1 in which the openings 5 are formed, d. The opening 5 formed in the conductive metal foil 1 and its surroundings are irradiated with a laser beam 6 from above the plating resist film 81 so that the non-through hole 11 is formed in the insulating adhesive layer 2 until the inner layer circuit 3 is exposed. Opening step, e. At least the insulating adhesive layer 2 on the inner wall of the non-through hole 11
Applying a plating catalyst 7 to the substrate, f. A step of performing plating 13 on a portion where there is no plating resist film 81; g. Removing the plating resist film 81, h1. Forming a first outer layer wiring by etching and removing unnecessary portions of the conductive metal foil 1; j. Step a to Step h1 are repeated a required number of times to perform Step a to Step h.

【0008】また、工程aにおいて、絶縁性接着層2と
導体金属箔1とを重ねることに代えて、これらが一体化
した導体金属箔付き絶縁性接着層12を用いることもで
きる。
In step a, instead of stacking the insulating adhesive layer 2 and the conductive metal foil 1 on each other, an insulating adhesive layer 12 with a conductive metal foil in which these are integrated can be used.

【0009】さらに、以下の工程を追加して、貫通穴1
4も同時に設けることができる。 ・工程cまたは工程dに貫通穴14をあける工程、 ・工程eにおいて、貫通穴14の内壁にもめっき用触媒
7を付与する工程、及び、 ・工程fにおいて、貫通穴14の内壁にもめっき13を
行う工程。 さらに、工程dにおいて、貫通穴14の周囲のめっきレ
ジスト用フィルム81を除去すれば、図2に示すよう
な、貫通穴14を有する多層配線板とすることもでき
る。
[0009] Further, the following steps are added, and
4 can also be provided at the same time. A step of drilling the through hole 14 in the step c or the step d; a step of applying the plating catalyst 7 to the inner wall of the through hole 14 in the step e; and a plating of the inner wall of the through hole 14 in the step f. Step 13. Further, in step d, if the plating resist film 81 around the through hole 14 is removed, a multilayer wiring board having the through hole 14 as shown in FIG. 2 can be obtained.

【0010】[0010]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

(工程a)本発明で使用する導体金属箔1は、エッチン
グ法で配線形成できるものであれば使用可能であり、一
般的には銅箔が好ましい。また、微細配線を形成するた
めに金属箔の厚みはできるだけ薄いものが好ましいが、
銅箔が単層の場合には、取扱性から考えると9μmから
18μmが良い。また、ライン/スペースが50μm/
50μm未満の極めて微細な配線を形成する場合には、
銅箔の厚さは更に薄いものが望ましく、このような場合
には3〜9μmの極薄銅箔とその極薄銅箔の強化層から
なる複合箔を使用する。この強化層は加圧加熱積層後
に、引き剥がしによって剥離するか、もしくはエッチン
グによって除去する。引き剥がし可能な複合箔の例とし
ては、70μm厚さの銅箔と9μmの極薄銅箔からなる
ピーラブル銅箔(古河サーキットホイル株式会社製、商
品名)がある。エッチングによって強化層が除去できる
ものとして、アルミニウム箔に5μmの極薄銅箔を複合
化したアルミニウム箔をエッチングで除去する複合箔
(三井金属工業株式会社製)等がある。
(Step a) The conductive metal foil 1 used in the present invention can be used as long as wiring can be formed by an etching method, and a copper foil is generally preferred. Further, the thickness of the metal foil is preferably as thin as possible to form fine wiring,
When the copper foil is a single layer, the thickness is preferably 9 μm to 18 μm from the viewpoint of handleability. Also, the line / space is 50 μm /
When forming an extremely fine wiring of less than 50 μm,
The thickness of the copper foil is desirably thinner. In such a case, a composite foil comprising an ultrathin copper foil of 3 to 9 μm and a reinforcing layer of the ultrathin copper foil is used. After the lamination under pressure and heat, the reinforcing layer is peeled off or removed by etching. An example of the peelable composite foil is a peelable copper foil (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) composed of a 70 μm thick copper foil and a 9 μm ultra-thin copper foil. As a material capable of removing the reinforcing layer by etching, there is a composite foil (manufactured by Mitsui Kinzoku Kogyo Co., Ltd.) which removes an aluminum foil obtained by combining an aluminum foil with a 5 μm ultra-thin copper foil by etching.

【0011】本発明で用いる、絶縁性接着層2の樹脂と
しては、フェノール樹脂、エポキシ樹脂、ポリイミド樹
脂などの樹脂が使用できる。この絶縁性接着層2は、内
層基板4に加圧加熱して積層後、レーザー光6を照射し
て層間接続のための穴をあけるので、層間接続の直径を
越える無機質繊維がこの絶縁性接着層2に含まれている
と、レーザー加工に要する時間が長くなり生産性が著し
く低くなるため、この絶縁性接着層2にはレーザー光6
であける穴の直径以上の長さの無機繊維を含まないこと
が望ましい。絶縁性接着層2としては、エポキシやポリ
イミド類を成分として含むものであり、例えば、分子量
10万以上の高分子量エポキシ重合体を主成分としたエ
ポキシ系接着フィルムとして、AS−3000E(日立
化成工業株式会社製、商品名)がある。変成ゴムを添加
したエポキシ系接着フィルムとしてGF−3500(日
立化成工業株式会社製、商品名)がある。ポリイミド系
接着フィルムとしてはAS−2500(日立化成工業株
式会社製、商品名)がある。直径が0.1〜6μmで長
さが約5〜100μmの繊維状物質をエポキシ系樹脂中
に分散させたエポキシ系接着剤フィルムとして、AS−
6000E(日立化成工業株式会社製、商品名)があ
る。これらの絶縁性接着層2は引き剥がし可能なフィル
ム上に、熱硬化性樹脂を溶剤に溶解したワニスを塗布し
た後、溶剤分を乾燥することによって得られる。この絶
縁性接着層2の厚さは内層回路3の厚さと関係してお
り、内層回路3の充填性の点から、少なくとも内層回路
3の厚さ以上であることが必要である。内層回路3の厚
さが12μmの場合には、25μm程度の厚さのものに
する。内層回路3の厚さが5μm程度の薄さであれば、
10μm程度でも内層回路3を充填することができる。
一般にはこの絶縁性接着層2の厚さは10〜500μm
の範囲である。
As the resin of the insulating adhesive layer 2 used in the present invention, a resin such as a phenol resin, an epoxy resin, and a polyimide resin can be used. The insulating adhesive layer 2 is laminated on the inner substrate 4 by applying pressure and heat, and then is irradiated with a laser beam 6 to form a hole for interlayer connection. When included in the layer 2, the time required for laser processing becomes long and the productivity becomes extremely low.
It is desirable not to include inorganic fibers having a length greater than the diameter of the hole to be drilled. The insulating adhesive layer 2 contains epoxy or polyimide as a component. For example, AS-3000E (Hitachi Chemical Industries, Ltd.) is used as an epoxy adhesive film containing a high-molecular-weight epoxy polymer having a molecular weight of 100,000 or more as a main component. Co., Ltd., trade name). There is GF-3500 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an epoxy-based adhesive film to which modified rubber is added. AS-2500 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is available as a polyimide-based adhesive film. As an epoxy-based adhesive film in which a fibrous substance having a diameter of 0.1 to 6 µm and a length of about 5 to 100 µm is dispersed in an epoxy-based resin, AS-
6000E (trade name, manufactured by Hitachi Chemical Co., Ltd.). These insulating adhesive layers 2 are obtained by applying a varnish obtained by dissolving a thermosetting resin in a solvent on a peelable film, and then drying the solvent. The thickness of the insulating adhesive layer 2 is related to the thickness of the inner circuit 3, and it is necessary that the thickness be at least equal to or greater than the thickness of the inner circuit 3 from the viewpoint of the filling property of the inner circuit 3. When the thickness of the inner layer circuit 3 is 12 μm, the thickness is about 25 μm. If the thickness of the inner layer circuit 3 is as thin as about 5 μm,
The inner layer circuit 3 can be filled even with about 10 μm.
Generally, the thickness of the insulating adhesive layer 2 is 10 to 500 μm.
Range.

【0012】導体金属箔1と絶縁性接着層2を重ねるこ
とに代えて用いることのできる、導体金属箔1と一体化
した導体金属箔付絶縁性接着層12は、導体金属箔1の
表面に上述した引き剥がし可能なフィルムに絶縁性接着
剤を塗布したものを貼り合わせ、その後フィルムを引き
剥がすことで得られる。引き剥がし可能なフィルムは、
有機フィルムが好適であり、接着剤を塗布する有機フィ
ルムとしては、塗布後に溶剤分を加熱乾燥除去するため
に、この加熱温度での耐熱性が必要である。このような
有機フィルムとしては、ポリエチレンテレフタレート、
ポリプロピレン、4メチルペンテン1ポリマー、ポリフ
ッ化エチレン等が使用できる。これらのフィルムの厚さ
は5μm以上であり、取り扱い性の点からはある程度の
厚さが必要である。このような点から望ましい厚さは1
0〜70μmである。
An insulating adhesive layer 12 with a conductive metal foil integrated with the conductive metal foil 1, which can be used instead of overlapping the conductive metal foil 1 and the insulating adhesive layer 2, is provided on the surface of the conductive metal foil 1. A film obtained by applying an insulating adhesive to the above-mentioned peelable film is attached, and then the film is peeled off. The peelable film is
An organic film is preferable, and the organic film to which the adhesive is applied needs to have heat resistance at this heating temperature in order to remove the solvent by drying after application. Such organic films include polyethylene terephthalate,
Polypropylene, 4-methylpentene 1 polymer, polyfluoroethylene, and the like can be used. The thickness of these films is 5 μm or more, and a certain thickness is required from the viewpoint of handleability. From this point, the desirable thickness is 1
0 to 70 μm.

【0013】また、この導体金属箔付絶縁性接着層12
は、絶縁性接着剤樹脂を溶剤に溶解したワニスを、直接
金属箔に塗布することでも得られる。このような材料と
しては、例えば、分子量10万以上の高分子量エポキシ
重合体を主成分とした銅箔付エポキシ系接着フィルムと
して、MCF−3000(日立化成工業株式会社製、商
品名)がある。また、直径が0.1〜6μmで長さが約
5〜100μmの繊維状物質をエポキシ系樹脂中に分散
させた銅箔付エポキシ系接着剤フィルムとして、MCF
−6000E(日立化成工業株式会社製、商品名)があ
る。
The insulating adhesive layer 12 with the conductive metal foil
Can also be obtained by directly applying a varnish obtained by dissolving an insulating adhesive resin in a solvent to a metal foil. As such a material, for example, there is MCF-3000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an epoxy-based adhesive film with a copper foil containing a high molecular weight epoxy polymer having a molecular weight of 100,000 or more as a main component. An epoxy adhesive film with a copper foil in which a fibrous substance having a diameter of 0.1 to 6 μm and a length of about 5 to 100 μm is dispersed in an epoxy resin, MCF
-6000E (trade name, manufactured by Hitachi Chemical Co., Ltd.).

【0014】本発明で使用する内層基板4としては、紙
基材やガラス基材を含むエポキシ系、フェノール系、ポ
リイミド系の片面銅張積層板が使用できる。また、これ
らの基材と樹脂からなる両面銅張積層板が使用される。
これらの基材を使用してエッチング法やめっきとエッチ
ングの両方を用いて内層回路3を形成する。また、紙基
材やガラス基材を含むエポキシ系、フェノール系、ポリ
イミド系基板にアディティブ法で導体パターンを形成し
たものも使用できる。また、金属基板やセラミック基板
等の表面に導体パターンを形成したものも使用できる。
内層基板4がその両面に回路を形成した両面回路基板の
場合には、層間接続穴は導電性ペーストまたは絶縁性樹
脂で充填した両面回路基板を使用する。
As the inner layer substrate 4 used in the present invention, an epoxy-based, phenol-based, or polyimide-based single-sided copper-clad laminate containing a paper base or a glass base can be used. In addition, a double-sided copper-clad laminate made of these base materials and resin is used.
Using these base materials, the inner layer circuit 3 is formed by using an etching method or both plating and etching. In addition, a substrate obtained by forming a conductive pattern on an epoxy-based, phenol-based, or polyimide-based substrate including a paper substrate or a glass substrate by an additive method can also be used. In addition, a metal substrate, a ceramic substrate, or the like having a conductive pattern formed on the surface thereof can also be used.
When the inner layer substrate 4 is a double-sided circuit board having a circuit formed on both sides thereof, a double-sided circuit board filled with a conductive paste or an insulating resin is used for the interlayer connection hole.

【0015】この内層基板4に絶縁性接着層2と導体金
属箔1をこの順に重ね、加圧加熱して一体化する条件
は、使用する樹脂に依存するが、一般には160〜28
0℃の加熱温度範囲で、圧力は一般に1〜50MPaの
範囲である。
The conditions for laminating the insulating adhesive layer 2 and the conductive metal foil 1 on the inner layer substrate 4 in this order and applying pressure and heat to the resin depend on the resin used.
At a heating temperature range of 0 ° C., the pressure is generally in the range of 1 to 50 MPa.

【0016】(工程b)導体金属箔1に設ける開口部5
の穴径は特に限定するものではなく、基板の高密度化の
観点から小さいほど良いが、エッチング法での工程能力
やめっき付まわり性等から考慮して、50μm以上が好
ましい。
(Step b) Opening 5 provided in conductive metal foil 1
The hole diameter is not particularly limited, and the smaller the hole diameter is, the better from the viewpoint of increasing the density of the substrate. However, the hole diameter is preferably 50 μm or more in consideration of the processability in the etching method, the plating coverage, and the like.

【0017】(工程c)このようにして開口部5を形成
した導体金属箔1の表面に、めっきレジスト用フィルム
81として、粘着剤付きのフィルムを貼り付ける。用い
るフィルムは後工程の酸やアルカリ溶液に侵されにく
い、ポリエチレンやポリプロピレン、ポリエステルのよ
うなフィルムが望ましい。フィルムには一例として、H
−5310フィルム(日立化成工業株式会社製、商品
名)があり、ホットロールラミネータを用いて貼り付け
ることが好ましい。
(Step c) A film with an adhesive is adhered as a plating resist film 81 to the surface of the conductive metal foil 1 in which the openings 5 are formed as described above. The film to be used is desirably a film such as polyethylene, polypropylene, or polyester which is not easily attacked by an acid or alkali solution in a later step. For film, for example, H
There is a -5310 film (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is preferably stuck using a hot roll laminator.

【0018】(工程d)開口部5に、めっきレジスト用
フィルム81の上から照射するレーザー光としては、エ
キシマレーザー、炭酸ガスレーザー等があるが、導体金
属箔1以外の樹脂層を選択的に加工しやすいこと、加工
速度が早くメンテナンスの容易な炭酸ガスレーザーが好
適である。レーザー穴あけでは、開口部5の直径より大
きなビーム径のレーザー光を照射することで、導体金属
箔1の開口部5と同一の場所の絶縁性接着層2に同一の
直径の穴をあけて、内層回路3が露出するまで非貫通穴
11をあけることができ、めっきレジスト用フィルム8
1に開口部5を含む周囲にまで穴をあけることができ
る。この時のレーザー加工条件は、絶縁性接着剤層の種
類により変化するため、予め実験的に最適条件を選択す
る。
(Step d) Examples of the laser light to be applied to the opening 5 from above the plating resist film 81 include an excimer laser and a carbon dioxide laser, but a resin layer other than the conductive metal foil 1 is selectively formed. A carbon dioxide laser that is easy to process, has a fast processing speed, and is easy to maintain is preferable. In laser drilling, by irradiating a laser beam having a beam diameter larger than the diameter of the opening 5, a hole having the same diameter is formed in the insulating adhesive layer 2 at the same place as the opening 5 of the conductive metal foil 1. The non-through hole 11 can be opened until the inner layer circuit 3 is exposed, and the plating resist film 8 is formed.
A hole can be drilled in the periphery including the opening 5 in 1. Since the laser processing conditions at this time vary depending on the type of the insulating adhesive layer, the optimum conditions are experimentally selected in advance.

【0019】(工程e)非貫通穴11の内壁の絶縁性接
着層2に、付与するめっき用触媒7は、一般にシーディ
ングと呼ばれている微細金属粒子を析出させる方法や、
導電性の皮膜を形成する方法、例えば、DE38068
84C1号公報に記載されているように、穴部分の樹脂
部分に対し、異原子として窒素又は硫黄を有する5又は
6員の複素環基からなるモノマーを吸着させた後、酸化
剤により重合させることで、導電性ポリマー層を形成す
る方法等がある。本発明においては、穴内壁と穴近傍の
みをめっきするため、短い工程で短時間に処理可能な電
気めっきを併用できる後者の方法が好ましい。また、め
っき用触媒7及び金属めっきと穴内部の樹脂層との密着
強度を上げて接続部分の信頼性を向上させるために、め
っき用触媒付与工程の前に穴内部の樹脂層表面を酸化処
理するデスミア工程を追加することができる。
(Step e) The plating catalyst 7 to be applied to the insulating adhesive layer 2 on the inner wall of the non-through hole 11 is formed by depositing fine metal particles generally called seeding,
A method for forming a conductive film, for example, DE 38068
As described in JP-A-84C1, after adsorbing a monomer consisting of a 5- or 6-membered heterocyclic group having nitrogen or sulfur as a heteroatom to a resin portion in a hole portion, polymerizing with a oxidizing agent. To form a conductive polymer layer. In the present invention, since only the inner wall of the hole and the vicinity of the hole are plated, the latter method that can use electroplating that can be processed in a short time in a short time is preferable. Also, in order to increase the adhesion strength between the plating catalyst 7 and the metal plating and the resin layer inside the hole and improve the reliability of the connection portion, the surface of the resin layer inside the hole is oxidized before the plating catalyst application step. A desmear process can be added.

【0020】(工程f)穴あけした部分にめっき13を
行い、内層回路3と導体金属箔1とを接続するIVH9
を形成する方法としては、特に限定するものではなく、
通常のプリント基板で行われる無電解めっき又は電気め
っき等が適用可能である。
(Step f) Plating 13 is applied to the drilled portion, and an IVH 9 for connecting the inner layer circuit 3 and the conductive metal foil 1 is formed.
The method for forming is not particularly limited,
Electroless plating or electroplating performed on a normal printed board can be applied.

【0021】[0021]

【実施例】【Example】

実施例1 導体金属箔付絶縁性接着層12として、銅箔厚さが12
μmで、樹脂層厚さが50μm、分子量10万以上の高
分子量エポキシ重合体を主成分としたエポキシ系接着フ
ィルムであるMCF−3000E(日立化成工業株式会
社製、商品名)、内層基板4として、厚さが0.2mm
で回路加工済のエポキシ系片面銅張積層板を準備した。
次に、これらを重ね合わせて、圧力2.5MPa、温度
170℃、60分間、加圧加熱して多層配線板を作製
し、エッチング法で表面の銅箔層に直径0.1mmの開
口部5を形成した。次に、この多層配線板の表面に粘着
剤付ポリエチレンフィルムH−5310(日立化成工業
株式会社製、商品名)をラミネータにより貼り付けた。
次に、炭酸ガスレーザーを開口部5の直径よりも0.1
mm広い範囲に照射して内層基板4の内層回路3まで届
く非貫通穴11をあけた。次に、めっき用触媒7とし
て、DMS−E処理液(ブラスベルク・オーベルフレヒ
エンテヒニーク・ゲー・エム・ベー・ハー社製、商品
名)によって、非貫通穴11の絶縁性接着層2に導電性
の皮膜を形成した。次に、非貫通穴11内部と周囲に1
2μmの厚さの電気めっきを行い、めっきレジスト用フ
ィルム81を剥離除去した。更に、新たにエッチングレ
ジストを形成して、外層配線10の形状にマスクパター
ンを用いて露光、現像し、エッチング法で最外層の回路
を形成し2層の基板を作製した。
Example 1 As the insulating adhesive layer 12 with a conductive metal foil, a copper foil having a thickness of 12
MCF-3000E (trade name, manufactured by Hitachi Chemical Co., Ltd.), an epoxy-based adhesive film having a resin layer thickness of 50 μm, a resin layer thickness of 50 μm, and a high molecular weight epoxy polymer having a molecular weight of 100,000 or more. 0.2mm thick
To prepare an epoxy-based single-sided copper-clad laminate having been subjected to circuit processing.
Next, these are superimposed and heated under pressure at a pressure of 2.5 MPa and a temperature of 170 ° C. for 60 minutes to produce a multilayer wiring board. The opening 5 having a diameter of 0.1 mm is formed in the copper foil layer on the surface by etching. Was formed. Next, a polyethylene film H-5310 with an adhesive (trade name, manufactured by Hitachi Chemical Co., Ltd.) was attached to the surface of the multilayer wiring board with a laminator.
Next, a carbon dioxide gas laser is set to a diameter of 0.1
A non-through hole 11 reaching the inner layer circuit 3 of the inner layer substrate 4 by irradiating a wide range of mm was formed. Next, as a plating catalyst 7, a DMS-E treatment solution (trade name, manufactured by Brassberg Oberflechentichnik GmbH) was applied to the insulating adhesive layer 2 of the non-through hole 11. A conductive film was formed. Next, 1 is placed inside and around the non-through hole 11.
Electroplating was performed at a thickness of 2 μm, and the plating resist film 81 was peeled off. Further, an etching resist was newly formed, exposed and developed using a mask pattern in the shape of the outer layer wiring 10, and an outermost layer circuit was formed by an etching method to produce a two-layer substrate.

【0022】実施例2 導体金属箔1として、強化層としての70μm厚さの銅
箔と9μmの極薄銅箔からなるピーラブル銅箔(古河サ
ーキットホイル株式会社製、商品名)、絶縁性接着層2
として、樹脂層が厚み70μmのエポキシ系接着剤フィ
ルムとしてAS−6000E(日立化成工業株式会社
製、商品名)、内層基板4として、厚さが0.2mmで
回路加工済のエポキシ系両面銅張積層板を準備した。次
に、内層基板4の両面にAS−6000E(日立化成工
業株式会社製、商品名)及びピーラブル銅箔(古河サー
キットホイル株式会社製、商品名)をこの順に重ね合わ
せて、圧力2.5MPa、温度170℃、60分間、加
圧加熱して多層配線板を作製した。次に、強化層である
70μm厚さの銅箔を引き剥がした後、エッチング法で
表面の銅箔層に直径0.1mmの開口部5を形成した。
次に、この多層配線板の表面に粘着剤付ポリエチレンフ
ィルムH−5310(日立化成工業株式会社製、商品
名)をラミネータにより貼り付けた。次に、炭酸ガスレ
ーザーを開口部5の直径より0.1mm広い範囲に照射
して内層基板の内層回路3まで届く非貫通穴11をあけ
た。次に、めっき用触媒として、DMS−E処理液(ブ
ラスベルク・オーベルフレヒエンテヒニーク・ゲー・エ
ム・ベー・ハー社製、商品名)によって、非貫通穴11
の絶縁性接着層2の部分に導電性の皮膜を形成した。次
に、非貫通穴11とその周囲に12μmの厚みの電気め
っきを行い、めっきレジスト用フィルム81を剥離除去
した。更に、新たにエッチングレジストを形成して、外
層配線10の形状にマスクパターンを用いて露光、現像
し、エッチング法で最外層の回路を形成し、4層の多層
基板を作製した。
Example 2 As a conductive metal foil 1, a peelable copper foil (made by Furukawa Circuit Foil Co., Ltd., trade name) composed of a 70 μm thick copper foil and a 9 μm ultra-thin copper foil as a reinforcing layer, an insulating adhesive layer 2
AS-6000E (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an epoxy-based adhesive film having a resin layer having a thickness of 70 μm, and as the inner substrate 4, a circuit-processed epoxy-based double-sided copper clad having a thickness of 0.2 mm. A laminate was prepared. Next, AS-6000E (trade name, manufactured by Hitachi Chemical Co., Ltd.) and peelable copper foil (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) are superimposed on both surfaces of the inner layer substrate 4 in this order, and a pressure of 2.5 MPa is applied. Pressure heating was performed at a temperature of 170 ° C. for 60 minutes to produce a multilayer wiring board. Next, a copper foil having a thickness of 70 μm as a reinforcing layer was peeled off, and an opening 5 having a diameter of 0.1 mm was formed in the copper foil layer on the surface by an etching method.
Next, a polyethylene film H-5310 with an adhesive (trade name, manufactured by Hitachi Chemical Co., Ltd.) was attached to the surface of the multilayer wiring board with a laminator. Next, a carbon dioxide laser was irradiated to a range 0.1 mm wider than the diameter of the opening 5 to form a non-through hole 11 reaching the inner circuit 3 of the inner substrate. Next, as a plating catalyst, a non-penetrating hole 11 was prepared using a DMS-E treatment solution (trade name, manufactured by Brassberg Oberflechentichnik GmbH).
A conductive film was formed on the portion of the insulating adhesive layer 2. Next, the non-through hole 11 and its surroundings were electroplated with a thickness of 12 μm, and the plating resist film 81 was peeled off. Further, a new etching resist was formed, exposed and developed by using a mask pattern in the shape of the outer wiring 10, and a circuit of the outermost layer was formed by an etching method, thereby producing a four-layer multilayer substrate.

【0023】実施例3 実施例2の基板を内層基板4として、更に両面に絶縁性
接着層2と銅箔層を積み上げて、その他の材料は同じも
のを用い、実施例2と同じ工程を繰り返し、6層の多層
基板を作製した。
Example 3 The substrate of Example 2 was used as the inner layer substrate 4, the insulating adhesive layer 2 and the copper foil layer were further stacked on both sides, and the same material was used for other materials, and the same steps as in Example 2 were repeated. And a six-layer multilayer substrate.

【0024】比較例1 実施例1において、開口部5を形成した後、めっきレジ
スト用フィルム81を形成せずにレーザー穴加工をし
た。その後、実施例1と同様の回路を形成した。
Comparative Example 1 In Example 1, after the opening 5 was formed, laser hole processing was performed without forming the plating resist film 81. Thereafter, a circuit similar to that of Example 1 was formed.

【0025】以上の実施例及び比較例で作製した基板を
比較評価した。各基板に設けた配線パターンで、配線ル
ールがライン/スペース=50μm/50μmの部分に
ついては、実施例1、2、3共に短絡、断線の不良がな
かったが、比較例1においては短絡と断線不良が多発し
た。なお、直列にIVHを100個接続した試験片で、
信頼性試験の一つであるホットオイル試験(260℃ホ
ットオイル10秒ディップと室温水中10秒ディップを
繰り返し行うサイクル試験)を50サイクル行ったとこ
ろ、何れの試験片も抵抗値の変化は、10%以内で良好
であった。
The substrates produced in the above Examples and Comparative Examples were comparatively evaluated. In the wiring pattern provided on each substrate, the wiring rule of line / space = 50 μm / 50 μm showed no short-circuit or disconnection failure in both Examples 1, 2, and 3; Many failures occurred. In addition, the test piece which connected 100 IVH in series,
When 50 cycles of a hot oil test (a cycle test in which 260 ° C. hot oil 10 seconds dipping and a 10 seconds dipping in water at room temperature were repeated), which is one of the reliability tests, were performed, the change in the resistance value of each test piece was 10%. %.

【0026】[0026]

【発明の効果】以上に説明したように、本発明によっ
て、高密度な微細配線が可能な多層配線板の製造が可能
になる。また、レーザーによって非貫通穴をあけるため
に直径が100μmレベルの微小径が加工できる。更
に、絶縁性接着剤層は多層プリント基板用に使用される
一般的な絶縁材料が使用できるため、用途に応じて絶縁
材料を使い分けることができる。
As described above, according to the present invention, it is possible to manufacture a multilayer wiring board capable of high-density fine wiring. Further, since a non-through hole is formed by a laser, a very small diameter of 100 μm level can be processed. Furthermore, since the insulating adhesive layer can use a general insulating material used for a multilayer printed circuit board, the insulating material can be used properly according to the application.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(h)は、本発明の一実施例を説明す
るための各工程における断面図であり、(a’)は、本
発明の他の実施例の一工程における断面図である。
FIGS. 1A to 1H are cross-sectional views in each step for explaining an embodiment of the present invention, and FIG. 1A is a cross-sectional view in one step of another embodiment of the present invention. FIG.

【図2】本発明のさらに他の実施例の方法によって製造
された多層配線板を示す断面図である。
FIG. 2 is a cross-sectional view illustrating a multilayer wiring board manufactured by a method according to still another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1.導体金属箔 2.絶縁性
接着層 3.内層回路 4.内層基
板 5.開口部 6.レーザ
光 7.めっき用触媒 81.めっ
きレジスト用フィルム 9.IVH 10.外層
配線 11.非貫通穴 12.導体
金属箔付絶縁性接着層 13.めっき 14.貫通
1. Conductor metal foil 2. 2. Insulating adhesive layer Inner layer circuit 4. Inner layer substrate 5. Opening 6. Laser light 7. Plating catalyst 81. 8. Film for plating resist IVH10. Outer layer wiring 11. Non-through hole 12. 12. Insulating adhesive layer with conductive metal foil Plating 14. Through hole

───────────────────────────────────────────────────── フロントページの続き (72)発明者 浦崎 直之 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 藤本 大輔 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 ▲つる▼ 義之 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Naoyuki Urasaki 1500 Oji Ogawa, Shimodate City, Ibaraki Pref.Hitachi Chemical Industry Co., Ltd. Inside Shimodate Research Laboratory (72) Inventor ▲ Tsuru ▼ Yoshiyuki Shimodate City, Ibaraki Prefecture 1500 Ogawa, Hitachi Chemical Co., Ltd.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】隣接する層間のみを接続するためのIVH
(9)を持つ多層配線板の製造方法において、以下の工
程を含むことを特徴とする多層配線板の製造法。 a.内層回路(3)を形成した内層基板(4)の表面
に、絶縁性接着層(2)と導体金属箔(1)とをこの順
に重ね、加圧加熱して一体化する工程、 b.導体金属箔(1)と内層回路(3)の電気的接続を
行うIVH(9)を形成する箇所の、導体金属箔(1)
をエッチング除去して開口部(5)を形成する工程、 c.開口部(5)を形成した導体金属箔(1)の表面
に、めっきレジスト用フィルム(81)を貼る工程、 d.導体金属箔(1)に形成した開口部(5)とその周
囲に、めっきレジスト用フィルム(81)の上からレー
ザー光(6)を照射して、絶縁性接着層(2)に、内層
回路(3)が露出するまで非貫通穴(11)をあける工
程、 e.少なくとも、非貫通穴(11)内壁の絶縁性接着層
(2)に、めっき用触媒(7)を付与する工程、 f.めっきレジスト用フィルム(81)のない箇所にめ
っき(13)を行う工程、 g.めっきレジスト用フィルム(81)を除去する工
程、 h.導体金属箔(1)の不要な箇所をエッチング除去し
て、外層配線(10)を形成する工程。
An IVH for connecting only adjacent layers.
A method for manufacturing a multilayer wiring board according to (9), comprising the following steps. a. A step of laminating an insulating adhesive layer (2) and a conductive metal foil (1) in this order on a surface of an inner layer substrate (4) on which an inner layer circuit (3) is formed, and pressing and heating to integrate them; b. The conductive metal foil (1) at a position where an IVH (9) for electrically connecting the conductive metal foil (1) and the inner layer circuit (3) is formed
Forming an opening (5) by etching away c. Affixing a plating resist film (81) to the surface of the conductive metal foil (1) having the openings (5) formed therein, d. The opening (5) formed in the conductive metal foil (1) and its surroundings are irradiated with a laser beam (6) from above the plating resist film (81) to apply the inner layer circuit to the insulating adhesive layer (2). Drilling a non-through hole (11) until (3) is exposed, e. Applying a plating catalyst (7) to at least the insulating adhesive layer (2) on the inner wall of the non-through hole (11); f. A step of performing plating (13) on a portion where there is no plating resist film (81); g. Removing the plating resist film (81), h. A step of forming an outer layer wiring (10) by etching and removing unnecessary portions of the conductive metal foil (1).
【請求項2】以下の工程を含むことを特徴とする請求項
1に記載の多層配線板の製造法。 a.内層回路(3)を形成した内層基板(4)の表面
に、絶縁性接着層(2)と導体金属箔(1)とをこの順
に重ね、加圧加熱して一体化する工程、 b.導体金属箔(1)と内層回路(3)の電気的接続を
行うIVH(9)を形成する箇所の、導体金属箔(1)
をエッチング除去して開口部(5)を形成する工程、 c.開口部(5)を形成した導体金属箔(1)の表面
に、めっきレジスト用フィルム(81)を貼る工程、 d.導体金属箔(1)に形成した開口部(5)とその周
囲に、めっきレジスト用フィルム(81)の上からレー
ザー光(6)を照射して、絶縁性接着層(2)に、内層
回路(3)が露出するまで非貫通穴(11)をあける工
程、 e.少なくとも、非貫通穴(11)内壁の絶縁性接着層
(2)に、めっき用触媒(7)を付与する工程、 f.めっきレジスト用フィルム(81)のない箇所にめ
っき(13)を行う工程、 g.めっきレジスト用フィルム(81)を除去する工
程、 h1.導体金属箔(1)の不要な箇所をエッチング除去
して、第1の外層配線を形成する工程、 j.工程a〜工程h1を必要回数繰り返し、工程a〜工
程hを行う工程。
2. The method for producing a multilayer wiring board according to claim 1, comprising the following steps. a. A step of laminating an insulating adhesive layer (2) and a conductive metal foil (1) in this order on a surface of an inner layer substrate (4) on which an inner layer circuit (3) is formed, and pressing and heating to integrate them; b. The conductive metal foil (1) at a position where an IVH (9) for electrically connecting the conductive metal foil (1) and the inner layer circuit (3) is formed
Forming an opening (5) by etching away c. Affixing a plating resist film (81) to the surface of the conductive metal foil (1) having the openings (5) formed therein, d. The opening (5) formed in the conductive metal foil (1) and the periphery thereof are irradiated with a laser beam (6) from above the plating resist film (81) to form an inner circuit on the insulating adhesive layer (2). Drilling a non-through hole (11) until (3) is exposed, e. Applying a plating catalyst (7) to at least the insulating adhesive layer (2) on the inner wall of the non-through hole (11); f. A step of performing plating (13) on a portion where there is no plating resist film (81); g. Removing the film for plating resist (81), h1. A step of removing unnecessary portions of the conductive metal foil (1) by etching to form a first outer wiring; j. Step a to Step h1 are repeated a required number of times to perform Step a to Step h.
【請求項3】工程aにおいて、絶縁性接着層(2)と導
体金属箔(1)とを重ねることに代えて、これらが一体
化した導体金属箔付き絶縁性接着層(12)を用いるこ
とを特徴とする請求項1または2に記載の多層配線板の
製造法。
3. In the step (a), an insulating adhesive layer (12) with a conductive metal foil is used instead of overlapping the insulating adhesive layer (2) and the conductive metal foil (1). The method for producing a multilayer wiring board according to claim 1 or 2, wherein:
【請求項4】以下の工程を追加して貫通穴(14)も同
時に設けることを特徴とする請求項1〜3のうちいずれ
かに記載の多層配線板の製造法。 ・工程cまたは工程dに貫通穴(14)をあける工程、 ・工程eにおいて、貫通穴(14)の内壁にもめっき用
触媒を付与する工程、及び、 ・工程fにおいて、貫通穴(14)の内壁にもめっき
(13)を行う工程。
4. The method for manufacturing a multilayer wiring board according to claim 1, wherein the following steps are additionally provided, and a through hole is provided at the same time. A step of forming a through hole (14) in step c or step d; a step of applying a plating catalyst also to the inner wall of the through hole (14) in step e; and a through hole (14) in step f. A step of plating (13) also on the inner wall.
JP9246293A 1997-09-11 1997-09-11 Manufacture of multilayered wiring board Pending JPH1187922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9246293A JPH1187922A (en) 1997-09-11 1997-09-11 Manufacture of multilayered wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9246293A JPH1187922A (en) 1997-09-11 1997-09-11 Manufacture of multilayered wiring board

Publications (1)

Publication Number Publication Date
JPH1187922A true JPH1187922A (en) 1999-03-30

Family

ID=17146404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9246293A Pending JPH1187922A (en) 1997-09-11 1997-09-11 Manufacture of multilayered wiring board

Country Status (1)

Country Link
JP (1) JPH1187922A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6373063B1 (en) 1999-07-08 2002-04-16 Fuji Photo Film Co., Ltd. Method and apparatus for reading and recording image information
US6518575B1 (en) 1999-03-30 2003-02-11 Fuji Photo Film Co., Ltd. Solid-state radiation detectors
US6566676B1 (en) 1999-09-21 2003-05-20 Fuji Photo Film Co., Ltd. Image detector
US6573525B1 (en) 1999-08-30 2003-06-03 Fuji Photo Film Co., Ltd. Method and apparatus for recording and reading out images
US6614045B2 (en) 2000-04-14 2003-09-02 Fuji Photo Film Co., Ltd. Imaging apparatus
US6707059B1 (en) 1999-07-22 2004-03-16 Fuji Photo Film Co., Ltd. Solid state radiation detector
US6787790B2 (en) 2000-04-24 2004-09-07 Fuji Photo Film Co., Ltd. Image information read-out apparatus
US7278205B2 (en) * 2002-08-19 2007-10-09 Taiyo Yuden Co., Ltd. Multilayer printed wiring board and production method therefor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6518575B1 (en) 1999-03-30 2003-02-11 Fuji Photo Film Co., Ltd. Solid-state radiation detectors
US6373063B1 (en) 1999-07-08 2002-04-16 Fuji Photo Film Co., Ltd. Method and apparatus for reading and recording image information
US6707059B1 (en) 1999-07-22 2004-03-16 Fuji Photo Film Co., Ltd. Solid state radiation detector
US6573525B1 (en) 1999-08-30 2003-06-03 Fuji Photo Film Co., Ltd. Method and apparatus for recording and reading out images
US6566676B1 (en) 1999-09-21 2003-05-20 Fuji Photo Film Co., Ltd. Image detector
US6614045B2 (en) 2000-04-14 2003-09-02 Fuji Photo Film Co., Ltd. Imaging apparatus
US6787790B2 (en) 2000-04-24 2004-09-07 Fuji Photo Film Co., Ltd. Image information read-out apparatus
US7278205B2 (en) * 2002-08-19 2007-10-09 Taiyo Yuden Co., Ltd. Multilayer printed wiring board and production method therefor

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