JPH1187523A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device of a specific structure for containing resistors and capacitors without complicating manufacturing steps by utilizing conventional manufacturing steps, while incorporating the characteristics of short turning-on time adapted to a predetermined circuit. SOLUTION: A first conductor layer 4, an insulating film 5 and a second conductor layer 6 are sequentially laminated on a surface of a base region 2 of a transistor formed on a semiconductor substrate to form a capacitor. Then, the layer 4 is connected to the layer 6 at the one end. A base electrode 7 is formed at the other end of the layer 6 and formed with a narrow part 6a on the way of a current path to the first conductor, layer, thereby forming a resistance component R. As a result, a resistor and a capacitor are connected in parallel between the region 2 and the electrode 7 of the transistor for quickening the turning-on time of the transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a reduced turn-on time when a transistor is turned on from off. More specifically, the present invention relates to a semiconductor device having a built-in parallel circuit of a capacitor and a resistor on the base side of a transistor and having a short turn-on time.

[0002]

2. Description of the Related Art Conventionally, a turn-on time represented by a sum of a delay time td (on) and a rise time tr cannot be avoided due to the structure of the transistor. When a high switching speed is required, as shown in FIG. 5, by connecting a resistor R1 and a capacitor C1 in parallel to the base side externally to a circuit in which a transistor is incorporated,
The turn-on time is shortened by supplying a charging current at the rise of the base current (when turned on). That is, in FIG. 5, the resistor R1 and the capacitor C are connected to the base B of the transistor Q1.
1 are connected in parallel. The switching time differs depending on the transistor and the circuit configuration, and the resistor R1 and the capacitor C1 are set so as to have an appropriate combination according to the circuit in which the transistor is incorporated. C indicates a collector and E indicates an emitter.

[0003]

In order to shorten the turn-on time of a transistor, if a resistor and a capacitor are incorporated in an external circuit in which the transistor is incorporated, a space for incorporating the resistor and the capacitor and a wiring thereof are secured on a circuit board or the like. This necessitates a reduction in the size of the electronic device, and increases costs due to an increase in the number of parts and assembly steps.

On the other hand, the turn-on time of a transistor is a problem particularly in the case of a special use requiring a high switching time, and also depends on the circuit in which the transistor is incorporated. Incorporating a capacitor and a capacitor requires a new process for manufacturing the resistor and capacitor, which complicates the transistor manufacturing process and increases the cost. Not.

However, if the transistors manufactured in the same manufacturing process have uniform characteristics, and if the circuit in which the transistor is incorporated is constant, it is necessary to set the resistance value and the capacitor once so as to apply to the circuit. In that circuit, a transistor having a substantially constant switching speed can be obtained.

The present invention has been made on the basis of such knowledge, and has a characteristic that the turn-on time is suitable for a certain circuit and that the manufacturing process is complicated by using a conventional manufacturing process. It is another object of the present invention to provide a semiconductor device having a specific structure incorporating a resistor and a capacitor.

[0007]

According to the present invention, there is provided a semiconductor device having a specific structure in which the turn-on time is reduced.
A collector region formed of a semiconductor layer of a first conductivity type, a base region of a second conductivity type formed from a surface in the collector region, and an emitter region of a first conductivity type formed from a surface in the base region; A first conductive layer provided by being deposited on the surface of the base region; a second conductive layer provided on the surface of the first conductive layer via an insulating film; Consisting of a base electrode connected to the body layer,
A part of the insulating film interposed between the first and second conductor layers is removed to connect the first and second conductor layers, and the second conductor layer or the first conductor layer is removed. The resistance portion is provided by removing a part of the conductive layer and forming a narrow portion in a current path from the base electrode to the first conductive layer.

[0008] With this structure, the turn-on time can be reduced by the same manufacturing process as the conventional one except that an insulating film and another base conductive layer are merely laminated on the conventional base conductive layer. , A semiconductor device having a built-in parallel connection of a resistor and a capacitor that can reduce the length of the resistor is obtained.

A capacitor formed by the first and second conductor layers and an insulating film interposed therebetween and a resistor formed by the narrow portion are formed by the collector region, the base region, and the emitter. It is set so as to shorten the turn-on time of the transistor composed of the region.

It is preferable that the first and second conductor layers are formed of a polysilicon film because the resistance value can be easily controlled.

A plurality of the emitter regions are provided in the base region, and an emitter electrode is provided on the second conductor layer via an insulating film so as to be electrically connected to each of the plurality of emitter regions. Multi-emitter type transistor having a structure in which a metal film is formed.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a semiconductor device of the present invention having an improved turn-on time will be described with reference to the drawings.

The semiconductor device of the present invention comprises a collector region 1 made of a first conductivity type, for example, an n-type semiconductor substrate, as shown in FIG. 1 showing a cross-sectional view and a plan view of a multi-emitter type transistor. A second conductivity type, for example, a p-type base region 2 formed from the surface in collector region 1 and a first conductivity type, for example, the n-type emitter region 3 formed from the surface in base region 2 are used to form the transistor. Each semiconductor region is formed. A first conductor layer 4 made of, for example, a polysilicon film is deposited and provided on the surface of base region 2, and an insulating film 5 made of silicon nitride or silicon oxide is provided on the surface thereof. And a second conductor layer 6 made of a polysilicon film or the like is further laminated. As a result, the first conductor layer 4 and the second conductor layer 6 are electrically connected at the portion where the insulating film 5 is removed, and as shown in FIG. Is provided. Note that I indicates a region where the insulating film 5 is provided between the two conductor layers 4 and 6.

In the second conductor layer 6, the portion where the second conductor layer 6 exists is shown by oblique lines in FIG. 1B (only the left part in FIG. 1B). And the other parts are omitted), there is an isolation portion F partially removed separately from the formation of the emitter electrode, and the connection portion S is separated from the second conductor layer 6. A narrow portion 6a in which a path to the first conductor layer 4 is narrowed through the narrow portion 6a is formed, and a resistance portion R is provided. Further, a base electrode 7 is provided so as to be electrically connected to the second conductor layer 6. An emitter electrode 9 made of Al or the like is formed on almost the entire surface of the second conductor layer 6 with a second insulating film 8 interposed therebetween, and a collector electrode 10 is formed on the back surface of the semiconductor substrate to be the collector region 1. ing.

A specific structure will be described in detail along an example of the manufacturing method with reference to manufacturing process diagrams of FIGS.

First, as shown in FIG. 2A, a p-type impurity is diffused from the surface of a collector region 1 made of, for example, an n-type semiconductor substrate to form a base region 2 made of a p-type diffusion region. Next, as shown in FIG.
A not-shown resist mask is formed on the surface of the semiconductor substrate, and an n-type impurity is diffused to form an emitter region 3 composed of an n-type region. After that, a polysilicon film is deposited on the entire surface by CVD.
A first conductive layer 4 is formed as shown in FIG. 2C by forming a film by a method or the like and performing patterning to remove the upper part of the emitter region 3. Polysilicon film is 0.1-1μ
m and a specific resistance of, for example, 10 to 50 Ω · cm
The film is formed so that The resistance value of the polysilicon film can be arbitrarily set depending on the impurity concentration to be introduced and the thickness to be deposited. Further, an insulating film 5 such as SiO ₂ or Si ₃ N ₄ is formed on the entire surface by a CVD method or the like. Then, a resist film is formed thereon, and patterning is performed so that the resist film remains only on the first conductive layer 4 to form a resist mask 11. At this time, the connection portion S of the conductor layer on the end portion is patterned so that the resist film is also removed from the surface of the first conductor layer 4.

Then, by etching the insulating film 5a which is not covered with the resist mask 11 and is exposed, as shown in FIG. 2D, the insulating film 5a is formed only on the first conductor layer 4. 5 is left, and the first conductor layer 4 is exposed at the connection portion S on the end side. Then, a polysilicon film is further formed in the same manner as described above, a resist film is formed thereon, and patterning is performed so that the polysilicon film remains only on the first conductive layer 4, thereby forming a resist film 12. At this time, in the separation portion F adjacent to the connection portion S, the polysilicon film is removed.
Patterning is performed so that the resist film does not remain (remains in the narrow portion 6a shown in FIG. 1B).

Thereafter, as shown in FIG.
On the surface of SiO by CVD method etc. _Two, Si_ThreeN_FourSuch
Is formed on the entire surface. And resist on it
A film is formed and the emitter region 3 and the second conductor layer 6 are
Pattern for forming ohmic contact hole with part
The patterned resist mask 13 is formed.

Then, using the resist mask 13 as a mask, the insulating film 8 is etched to expose the emitter region 3 and the contact portion of the second conductor layer 6, and as shown in FIG. The emitter electrode 9 and the base electrode 7 are formed by vapor-depositing and separating the periphery of the base electrode 7 by etching. Further, by forming a metal film such as Al on the back surface of the semiconductor substrate (collector region 1) and forming the collector electrode 10, a semiconductor device in which the switching time of the transistor of the present invention is improved can be obtained.

According to the semiconductor device of the present invention, since the first conductor layer 4 and the second conductor layer 6 face each other with the insulating film 5 interposed therebetween, a capacitor is formed therebetween. This capacitor has a larger capacitance (capacitance) as its area is larger, and a thin insulating film intervenes.
The larger the dielectric constant, the larger the capacitance. Therefore, the entire area cannot be made much larger than the entire area of the transistor, but can be adjusted to a desired value to some extent by adjusting the insulating film. When it is necessary to increase the area, as shown in FIG. 4, a concave portion is formed in the base region 2, and the first conductor layer 4, the insulating film 5, and the second conductive layer 5 are formed in the concave portion. By forming a trench structure in which the body layers 6 are sequentially stacked, the area is increased, and the capacitance value can be increased. Therefore, a desired capacitance value can be obtained. In FIG. 4, the same parts as those in FIGS.

As shown in the plan view of FIG. 1B, the separation portion F has a narrow portion 6a which is mostly separated and only partially connected to the second conductor layer 6. Is formed. Therefore, the current introduced from the base electrode 7 flows from the second conductor layer 6 to the first conductor layer 4 via the narrow portion 6a and the connection portion S, and a resistance component R is generated in the narrow portion 6a. . This resistance component increases when the width of the narrow portion 6a is reduced during etching, increases when the thickness of the polysilicon film is reduced, and increases when the impurity concentration to be introduced is reduced. , The value of which can be adjusted. The resistance component R and the above-mentioned capacitance C are connected in parallel between the base electrode 7 and the base region 2. By adjusting the resistance component R and the capacitance C, they are incorporated into a specific circuit. Turn-on time can be shortened. In this adjustment, the insulating film and the conductor layer can be adjusted by measuring the switching time of the semiconductor device in which the resistance component and the capacitance of the first and second conductor layers are formed in advance. By mass-producing with the designed values, a semiconductor device having an optimal turn-on time for a specific circuit is obtained.

In the above-described example, the separation portion F (the narrow portion 6)
a) is provided in the second conductor layer 6, but may be provided in the current path from the base electrode 7 to the first conductor layer 4, and is provided in the first conductor layer 4. Is also good. In this case, it is preferable that the resistor portion is provided in the vicinity including the connection portion S, because it always serves as a current passage, so that the resistance portion can be surely formed. In the above-described example, the transistor is a multi-emitter type transistor. However, even in the case of a normal transistor having one emitter region, a conductive layer is provided on a base region via an insulating film to similarly incorporate a resistor and a capacitor. can do.

[0023]

According to the present invention, it is possible to obtain a semiconductor device having a transistor and a built-in resistor and capacitor for shortening the turn-on time without increasing the outer shape and extremely increasing the manufacturing process. As a result, there is no need to externally connect a resistor or a capacitor in the use stage, so that the circuit board can be downsized and the number of assembling steps can be reduced.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a cross section and a plane of an embodiment of a semiconductor device of the present invention.

FIG. 2 is a view illustrating a manufacturing process of the semiconductor device of FIG. 1;

FIG. 3 is a view showing a manufacturing process of the semiconductor device of FIG. 1;

FIG. 4 is an explanatory diagram of a structure of an example in which a capacitor of a semiconductor device of the present invention is enlarged.

FIG. 5 is a circuit diagram in which a resistor and a capacitor are externally connected to the transistor in order to shorten the turn-on time of the transistor.

[Explanation of symbols]

 Reference Signs List 1 collector region 2 base region 3 emitter region 4 first conductor layer 5 insulating film 6 second conductor layer 6a narrow portion 7 base electrode

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 29/73

Claims (4)

[Claims] 1. A collector region comprising a semiconductor layer of a first conductivity type, a base region of a second conductivity type formed from a surface in the collector region, and a first conductivity formed from a surface in the base region. A first conductive layer provided on the surface of the base region, and a second conductive layer provided on the surface of the first conductive layer via an insulating film; A base electrode provided in connection with the second conductor layer, a part of an insulating film interposed between the first and second conductor layers is removed, and the first and second conductor layers are removed. The conductor layer is connected and a part of the second conductor layer or the first conductor layer is removed to form a narrow portion in a current path from the base electrode to the first conductor layer. A semiconductor device provided with a resistance portion. A capacitor formed by the first and second conductor layers and an insulating film interposed therebetween; and a resistor formed by the narrow portion, wherein the collector region, the base region, 2. The semiconductor device according to claim 1, wherein a turn-on time of the transistor including the transistor and the emitter region is set to be short. 3. The semiconductor device according to claim 1, wherein said first and second conductor layers are made of a polysilicon film. 4. A plurality of emitter regions are provided in the base region, and an insulating film is provided on the second conductor layer so as to be electrically connected to each of the plurality of emitter regions. 4. The semiconductor device according to claim 1, wherein a metal film for an emitter electrode is formed.