JP3934752B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a turn-on time when a transistor is turned on is shortened. More specifically, the present invention relates to a semiconductor device in which a parallel circuit of a capacitor and a resistor is built in the base side of a transistor and the turn-on time is shortened.
[0002]
[Prior art]
Conventionally, the turn-on time represented by the sum of the delay time td (on) and the rise time tr, which is substantially the time when the transistor is turned on, is unavoidable due to the structure of the transistor. If necessary, as shown in FIG. 5, a resistor R1 and a capacitor C1 are connected to the base side in parallel with a circuit in which a transistor is incorporated, and charged at the rise of the base current (when on). Current is passed to shorten the turn-on time. That is, in FIG. 5, the resistor R1 and the capacitor C1 are connected in parallel to the base B of the transistor Q1. The switching time differs depending on the transistor and the circuit configuration, and the resistor R1 and the capacitor C1 are set to be an appropriate combination according to the circuit in which the transistor is incorporated. C represents a collector, and E represents an emitter.
[0003]
[Problems to be solved by the invention]
In order to shorten the turn-on time of a transistor, if a resistor and a capacitor are incorporated in an external circuit in which the transistor is incorporated, the space for installing the resistor and capacitor and its wiring must be secured on the circuit board, etc. As well as increased costs due to increased parts and assembly man-hours.
[0004]
On the other hand, the transistor turn-on time becomes a problem especially in the case of special use that requires a high switching time and depends on the circuit in which the transistor is incorporated. The built-in resistor necessitates a process for manufacturing the resistor and the capacitor, which complicates the transistor manufacturing process and increases the cost. For this reason, the transistor including the resistor and the capacitor is not manufactured.
[0005]
However, if the transistors manufactured in the same manufacturing process have uniform characteristics, and the circuit in which the transistor is incorporated is also constant, the resistance value and capacitor are set once to be applied to the circuit. Thus, a transistor having a substantially constant switching speed can be obtained.
[0006]
The present invention has been made on the basis of such knowledge, and has a short turn-on time characteristic suitable for a certain circuit, and without using a conventional manufacturing process to complicate the manufacturing process. It is another object of the present invention to provide a semiconductor device having a specific structure including a capacitor.
[0007]
[Means for Solving the Problems]
A semiconductor device having a specific structure in which the turn-on time is shortened according to the present invention includes a collector region formed of a semiconductor layer of a first conductivity type provided on a quadrangular substrate , and a surface in the collector region. A multi-emitter semiconductor device having a plurality of first conductivity type base regions formed in a matrix and a plurality of first conductivity type emitter regions formed in a matrix in the base region. substantially the entire first conductive layer is provided, the second conductive layer is provided over the surface insulating film of the first conductive layer, the conductive of the second deposition to the base region It is base over the source electrode and connected to form the body layer, wherein the first and second conductor layers wherein the first and part of the intervening insulating film is removed along the rectangular side between the A second conductor layer is connected and the second conductor layer is connected; Narrow section to the first or second conductive layer part along the one side by Rukoto are removed leaving a portion of one side the conductive layer or the first conductive layer is formed of the more resistive portion to the narrow portion in a current path from the base electrode to the first conductive layer is formed, and said first and second conductive layers and the dielectric layer sandwiched therebetween and As a result of forming the capacitor, a parallel circuit of the resistor and the capacitor is connected to the base electrode .
[0008]
With this structure, the turn-on time can be shortened by the same manufacturing process as in the prior art by simply laminating an insulating film and another base conductor layer on the conventional base conductor layer. A semiconductor device incorporating a parallel connection of a resistor and a capacitor that can be obtained is obtained.
[0009]
A capacitor formed by the first and second conductor layers and an insulating film interposed therebetween, and a resistance portion formed by the narrow portion are composed of the collector region, the base region, and the emitter region. It is set to shorten the turn-on time of the transistor.
[0010]
It is preferable that the first and second conductor layers are formed of a polysilicon film because the resistance value can be easily controlled.
[0011]
Respectively electrically connected to as the second conductive layer for metal films emitter electrode through an insulating film on the front Kifuku several emitter region Ru is formed.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Next, a semiconductor device with improved turn-on time according to the present invention will be described with reference to the drawings.
[0013]
The semiconductor device of the present invention includes a collector region 1 made of a first conductivity type, for example, an n-type semiconductor substrate, and a collector region 1 as shown in FIG. Each of the semiconductor regions of the transistor from a second conductivity type, for example, p-type base region 2 formed from the surface therein, and a first conductivity type, for example, n-type emitter region 3 formed from the surface in base region 2 Is formed. A first conductor layer 4 made of, for example, a polysilicon film is deposited on the surface of the base region 2, and an insulating film 5 made of silicon nitride, silicon oxide, or the like is provided on the surface, and the insulating film 5 A second conductor layer 6 made of a polysilicon film or the like is further laminated by removing a part of the film. As a result, the first conductor layer 4 and the second conductor layer 6 are electrically connected at the portion where the insulating film 5 has been removed, and as shown in FIG. Is provided. Here, I indicates a region where the insulating film 5 is provided between the two conductor layers 4 and 6.
[0014]
In this second conductor layer 6, the portion where the second conductor layer 6 exists is shown by hatching in FIG. 1 (b) (shown only in a part on the left side in FIG. 1 (b)). As is the case with the other, the separation portion F is partially removed apart from the formation of the emitter electrode, and the first conductive layer 6 is connected to the first conductor via the connection portion S. A narrow portion 6a in which a passage to the conductive layer 4 is narrowed is formed, and a resistance portion R is provided. A base electrode 7 is provided in electrical connection with the second conductor layer 6. An emitter electrode 9 made of Al or the like is formed almost entirely on the surface of the second conductor layer 6 via the second insulating film 8, and a collector electrode 10 is formed on the back surface of the semiconductor substrate that becomes the collector region 1. ing.
[0015]
A specific structure will be described in detail along with an example of the manufacturing method with reference to the manufacturing process diagrams of FIGS.
[0016]
First, as shown in FIG. 2A, for example, a p-type impurity is diffused from the surface of a collector region 1 made of an n-type semiconductor substrate to form a base region 2 made of a p-type diffusion region. Next, as shown in FIG. 2B, a resist mask (not shown) is formed on the surface of the semiconductor substrate, and n-type impurities are diffused to form an emitter region 3 composed of an n-type region. Thereafter, a polysilicon film is formed on the entire surface by a CVD method or the like, and is patterned to remove the emitter region 3 to form a first conductor layer 4 as shown in FIG. The polysilicon film is formed to have a thickness of about 0.1 to 1 μm and a specific resistance of, for example, 10 to 50 Ω · cm. The resistance value of the polysilicon film can be arbitrarily set depending on the impurity concentration and the deposited thickness. Further, an insulating film 5 such as SiO ₂ or Si ₃ N ₄ is formed on the entire surface by CVD or the like. Then, a resist film is formed thereon, and is patterned so as to remain only on the first conductor layer 4 to form a resist mask 11. At this time, the connection portion S of the conductor layer on the end portion side is patterned so that the resist film is also removed from the surface of the first conductor layer 4.
[0017]
Then, the insulating film 5a exposed without being covered with the resist mask 11 is etched, so that the insulating film 5 remains only on the first conductor layer 4 as shown in FIG. Then, the first conductor layer 4 is exposed at the connection portion S on the end side. Then, a polysilicon film is further formed in the same manner as described above, a resist film is formed thereon, and is patterned so as to remain only on the first conductor layer 4, thereby forming a resist film 12. At this time, in order to remove the polysilicon film in the separation portion F adjacent to the connection portion S, patterning is performed so that the resist film does not remain (remain in the narrow portion 6a shown in FIG. 1B).
[0018]
Thereafter, as shown in FIG. 3E, an insulating film 8 such as SiO ₂ or Si ₃ N ₄ is formed on the entire surface by CVD or the like. Then, a resist film is formed thereon, and a resist mask 13 patterned to form ohmic contact holes with the emitter region 3 and part of the second conductor layer 6 is formed.
[0019]
Then, using the resist mask 13 as a mask, the insulating film 8 is etched to expose the contact portions of the emitter region 3 and the second conductor layer 6, and as shown in FIG. Thus, the emitter electrode 9 and the base electrode 7 are formed by separating the periphery of the base electrode 7 by etching. Further, by forming a metal film such as Al on the back surface of the semiconductor substrate (collector region 1) to form the collector electrode 10, a semiconductor device with improved switching time of the transistor of the present invention can be obtained.
[0020]
According to the semiconductor device of the present invention, since the first conductor layer 4 and the second conductor layer 6 are opposed to each other with the insulating film 5 interposed therebetween, a capacitor is formed therebetween. The capacity of the capacitor increases as the area increases, and the capacity increases as the intervening insulating film is thin or the dielectric constant increases. Therefore, the total area cannot be increased by the total area of the transistor, but can be adjusted to a desired value to some extent by adjusting the insulating film. When it is necessary to increase the area, as shown in FIG. 4, a recess is formed in the base region 2, and the first conductor layer 4, the insulating film 5, and the second conductive layer are formed in the recess. By using a trench structure in which the body layers 6 are sequentially stacked, the area is increased and the capacitance value can be increased. Therefore, a desired capacitance value can be obtained. In FIG. 4, the same parts as those in FIGS.
[0021]
Further, in the separating portion F, as shown in the plan view of FIG. 1B, a narrow portion 6a, which is mostly separated and only partly connected, is formed in the second conductor layer 6. Yes. Therefore, the current introduced from the base electrode 7 flows from the second conductor layer 6 to the first conductor layer 4 through the narrow portion 6a and the connection portion S, and a resistance component R is generated in the narrow portion 6a. . This resistance component increases in resistance when the width of the narrow portion 6a is reduced during etching, increases in resistance when the thickness of the polysilicon film is reduced, and increases in resistance when the impurity concentration to be introduced is decreased. The values can be adjusted by these. The resistance component R and the capacitance C described above are connected in parallel between the base electrode 7 and the base region 2, and are incorporated into a specific circuit by adjusting the resistance component R and the capacitance C. The turn-on time can be shortened. In this adjustment, the insulating film and the conductor layer can be adjusted by measuring the switching time of the semiconductor device in which the resistance component and the capacitance by the first and second conductor layers are previously formed. By mass-production with the designed value, a semiconductor device having an optimum turn-on time for a specific circuit is obtained.
[0022]
In the above-described example, the separation portion F (the resistance portion formed by the narrow portion 6a) is provided in the second conductor layer 6, but is provided in the current path from the base electrode 7 to the first conductor layer 4. What is necessary is just to be provided in the 1st conductor layer 4. In this case, it is preferable to be provided in the vicinity of the connection portion S including the connection portion S, so that a resistance portion can be surely formed easily. In the above example, a multi-emitter type transistor is used. However, even if a normal transistor has one emitter region, a resistor and a capacitor are similarly built in by providing a conductive layer on the base region via an insulating film. can do.
[0023]
【The invention's effect】
According to the present invention, it is possible to obtain a semiconductor device in which a transistor and a resistor and a capacitor for shortening the turn-on time are incorporated without increasing the outer shape or increasing the number of manufacturing processes. As a result, it is not necessary to externally connect resistors and capacitors at the stage of use, and the circuit board can be miniaturized and the number of assembly steps can be reduced.
[Brief description of the drawings]
FIG. 1 is an explanatory view of a cross section and a plan view of an embodiment of a semiconductor device of the present invention.
2 is a view showing a manufacturing process of the semiconductor device of FIG. 1; FIG.
3 is a view showing a manufacturing process of the semiconductor device of FIG. 1; FIG.
FIG. 4 is an explanatory diagram of a structure of an example in which a capacitor of a semiconductor device of the present invention is enlarged.
FIG. 5 is a circuit diagram in which a resistor and a capacitor are externally attached to a transistor in order to shorten the turn-on time of the transistor.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Collector area | region 2 Base area | region 3 Emitter area | region 4 1st conductor layer 5 Insulating film 6 2nd conductor layer 6a Narrow part 7 Base electrode

Claims (4)

A collector region made of a first conductivity type semiconductor layer provided on a quadrangular substrate, a second conductivity type base region formed from the surface in the collector region, and a plurality of matrix regions in the base region A semiconductor device having a multi-emitter structure having an emitter region of a first conductivity type formed, wherein the first conductor layer is provided on substantially the entire surface of the base region by being deposited on the surface of the base region ; second conductive layer is provided over the first conductive layer surface in an insulating film, base over the source electrode is formed by connecting to the second conductive layer, wherein the first and second A part of the insulating film interposed between the conductor layers is removed along one side of the rectangular shape to connect the first and second conductor layers, and the second conductor layer or the second conductor layer remaining part of the one side the along part of the one side of the first conductor layer Removed Te narrow portion is formed in the first or second conductive layer by Rukoto, more resistance portion is formed on the narrow portion in a current path from the base electrode to the first conductive layer In addition, a capacitor is formed by the first and second conductor layers and the dielectric layer sandwiched therebetween, so that a parallel circuit of the resistor and the capacitor is connected to the base electrode. A semiconductor device.   A capacitor formed by the first and second conductor layers and an insulating film interposed therebetween, and a resistance portion formed by the narrow portion include the collector region, the base region, and the emitter region. 2. The semiconductor device according to claim 1, wherein the semiconductor device is set to shorten a turn-on time of the transistor.   3. The semiconductor device according to claim 1, wherein the first and second conductor layers are made of a polysilicon film. Claim 1, 2 or 3 respectively electrically connected to as the second conductive layer for metal films emitter electrode through an insulating film on the front Kifuku several emitter region is formed The semiconductor device described.

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