JPH117434A - 複数ノードの非同期データ通信システム内で早期到達メッセージを処理するシステム - Google Patents

複数ノードの非同期データ通信システム内で早期到達メッセージを処理するシステム

Info

Publication number
JPH117434A
JPH117434A JP12505998A JP12505998A JPH117434A JP H117434 A JPH117434 A JP H117434A JP 12505998 A JP12505998 A JP 12505998A JP 12505998 A JP12505998 A JP 12505998A JP H117434 A JPH117434 A JP H117434A
Authority
JP
Japan
Prior art keywords
message
computer
buffer
receiving device
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12505998A
Other languages
English (en)
Japanese (ja)
Other versions
JPH117434A5 (enExample
Inventor
F Bener Alan
アラン・エフ・ベナー
Grassi Michael
マイケル・グラッシ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPH117434A publication Critical patent/JPH117434A/ja
Publication of JPH117434A5 publication Critical patent/JPH117434A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)
JP12505998A 1997-05-13 1998-05-07 複数ノードの非同期データ通信システム内で早期到達メッセージを処理するシステム Pending JPH117434A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/853701 1997-05-13
US08/853,701 US5878226A (en) 1997-05-13 1997-05-13 System for processing early arrival messages within a multinode asynchronous data communications system

Publications (2)

Publication Number Publication Date
JPH117434A true JPH117434A (ja) 1999-01-12
JPH117434A5 JPH117434A5 (enExample) 2005-04-07

Family

ID=25316692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12505998A Pending JPH117434A (ja) 1997-05-13 1998-05-07 複数ノードの非同期データ通信システム内で早期到達メッセージを処理するシステム

Country Status (4)

Country Link
US (1) US5878226A (enExample)
JP (1) JPH117434A (enExample)
KR (1) KR100284791B1 (enExample)
TW (1) TW364095B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007257479A (ja) * 2006-03-24 2007-10-04 Fujitsu Ltd 通信装置、方法及びプログラム

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6035335A (en) * 1997-08-26 2000-03-07 International Business Machines Corporation Optimistic, eager rendezvous transmission system and combined rendezvous system for message processing, and related data structures
US6178174B1 (en) 1997-08-26 2001-01-23 International Business Machines Corporation Optimistic, eager rendezvous transmission mode and combined rendezvous modes for message processing systems
US6700871B1 (en) * 1999-05-04 2004-03-02 3Com Corporation Increased throughput across data network interface by dropping redundant packets
US6799200B1 (en) * 2000-07-18 2004-09-28 International Business Machines Corporaiton Mechanisms for efficient message passing with copy avoidance in a distributed system
US6735620B1 (en) 2000-07-18 2004-05-11 International Business Machines Corporation Efficient protocol for retransmit logic in reliable zero copy message transport
US7089289B1 (en) 2000-07-18 2006-08-08 International Business Machines Corporation Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices
US20030014516A1 (en) * 2001-07-13 2003-01-16 International Business Machines Corporation Recovery support for reliable messaging
US20030023775A1 (en) * 2001-07-13 2003-01-30 International Business Machines Corporation Efficient notification of multiple message completions in message passing multi-node data processing systems
US8170041B1 (en) * 2005-09-14 2012-05-01 Sandia Corporation Message passing with parallel queue traversal
RU2416121C2 (ru) * 2009-03-10 2011-04-10 Государственное образовательное учреждение высшего профессионального образования "Юго-Западный государственный университет" (ЮЗГУ) Устройство адаптивной коммутации сообщений
CN107992445B (zh) * 2017-11-27 2022-01-25 上海兆芯集成电路有限公司 通信控制器、通信方法与系统单芯片

Family Cites Families (12)

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US4494194A (en) * 1982-09-30 1985-01-15 Burroughs Corporation Line support processor for data transfer system
US5047917A (en) * 1985-07-12 1991-09-10 The California Institute Of Technology Apparatus for intrasystem communications within a binary n-cube including buffer lock bit
US4748617A (en) * 1985-12-20 1988-05-31 Network Systems Corporation Very high-speed digital data bus
DE3786080D1 (de) * 1987-08-20 1993-07-08 Ibm Speicherzugriffssteuerungsvorrichtung in einem gemischtdatenformatsystem.
US5036459A (en) * 1989-03-09 1991-07-30 U.S. Philips Corporation Multi-processor computer system with distributed memory and an interprocessor communication mechanism, and method for operating such mechanism
US5208914A (en) * 1989-12-29 1993-05-04 Superconductor Systems Limited Partnership Method and apparatus for non-sequential resource access
US5444860A (en) * 1992-02-14 1995-08-22 Unisys Corporation Translator system for message transfers between digital units operating on different message protocols and different clock rates
FR2691559B1 (fr) * 1992-05-25 1997-01-03 Cegelec Systeme logiciel a objets repliques exploitant une messagerie dynamique, notamment pour installation de controle/commande a architecture redondante.
GB2282474B (en) * 1993-09-30 1998-02-25 Intel Corp Buffer memory management for a computer network node
JP3544390B2 (ja) * 1994-06-29 2004-07-21 富士通株式会社 並列計算機で用いられるメッセージ通信方法
US5764641A (en) * 1995-09-08 1998-06-09 Cisco Systems, Inc. Early and integrated tail packet discard system
US5724358A (en) * 1996-02-23 1998-03-03 Zeitnet, Inc. High speed packet-switched digital switch and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007257479A (ja) * 2006-03-24 2007-10-04 Fujitsu Ltd 通信装置、方法及びプログラム

Also Published As

Publication number Publication date
TW364095B (en) 1999-07-11
KR100284791B1 (ko) 2001-03-15
US5878226A (en) 1999-03-02
KR19980086582A (ko) 1998-12-05

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Legal Events

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Effective date: 20040517