JPH1167903A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To properly maintain connection characteristic between wiring layers, even when a high current is applied at a high temperature, by decreasing the contact resistance between a wiring plug and a wiring layer. SOLUTION: After a tungsten plug 51 is formed on a lower-layer wiring 10, the surface of the tungsten plug 51 is cleaned by sputtering etching. Then, a wafer if moved to the sputtering part to be used for formation of a titanium film in a vacuum-retained state, and a titanium film 9 is formed on the tungsten plug 51 using a sputtering method. Then, the vacuum-retained wafer is moved to the sputtering part to be used for the formation of an aluminum alloy film, and an aluminum alloy film 6 is formed on the titanium film 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wiring forming step in a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art With the recent increase in the density of semiconductor integrated circuits, finer wiring and multi-layer wiring have been developed. In a conventional method for manufacturing a semiconductor device having a multilayer wiring structure,
After forming an insulating film on the lower wiring layer and forming a contact hole in the insulating film by a photolithography process and a dry etching process, a film made of an aluminum (Al) alloy forming an upper wiring layer is deposited by a sputtering method. As a result, an aluminum alloy is embedded in the contact hole simultaneously with the formation of the thin film on the insulating film.

However, when the size of the contact hole becomes extremely small due to the progress of miniaturization, the method of forming a thin film on the insulating film by the ordinary sputtering method and filling the contact hole with an aluminum alloy at the same time causes poor connection between wiring layers. There is a problem that it is easy to occur. Therefore, in recent years, after performing a step of forming tungsten (W) as a “wiring plug” in a contact hole of an insulating film (wiring plug forming step), an aluminum alloy thin film is formed thereon. I have.

Here, a wiring plug forming step is performed, for example, as follows. That is, first, an adhesion layer for improving the adhesion between tungsten and an insulating film is formed on the insulating film on which the contact hole is formed and on the wall surface and bottom surface of the contact hole, and then a tungsten film is formed thereon by a CVD method. accumulate. Thereafter, the tungsten film on the insulating film is removed by a plasma etching method, leaving tungsten only in the contact hole to form a tungsten plug.

The wafer on which the tungsten plug is formed is taken out of the plasma etching apparatus and put into a sputtering apparatus. An aluminum alloy film and an anti-reflection film (such as titanium nitride) are formed on the surface of the wafer including the tungsten plug. A wiring layer is formed by sequentially forming and patterning by photolithography and etching.

[0006]

However, in such a conventional technique, since the contact resistance between the tungsten plug and the wiring layer is high, when a large current is applied at a high temperature, heat is generated by electromigration. Is accelerated, and the connection characteristics between the wiring layers deteriorate.

The present invention has been made in view of such a problem of the prior art. In a method of manufacturing a semiconductor device in which a wiring layer is formed after the wiring plug forming step as described above, a wiring plug is provided. It is an object to reduce the contact resistance between the wiring layer and the wiring layer so that the connection characteristics between the wiring layers can be maintained well even when a large current is applied at a high temperature.

[0008]

The inventors of the present invention have made intensive studies to solve the above-mentioned problems. As a result, the fact that the contact resistance between the tungsten plug and the wiring layer was high was determined by the wiring plug forming step. The present invention was found to be due to the presence of etching residues generated when the conductive material on the insulating film is removed by etching on the surface of the wiring plug and oxides of the conductive material forming the wiring plug. Completed.

That is, according to the present invention, a contact hole is formed in an insulating film on which a wiring layer is formed, and a conductive material is deposited in the contact hole and on the insulating film.
By removing the conductive material on the insulating film, a wiring plug forming step in which a conductive material forming a wiring plug is present in the contact hole, and forming a thin film made of the wiring material on the wafer after the wiring plug forming step Then, in a method of manufacturing a semiconductor device including a wiring layer forming step of forming a wiring pattern on the thin film by photolithography and etching, at least the surface of the wiring plug of the wafer after the wiring plug forming step is cleaned by sputter etching. Thereafter, there is provided a method of manufacturing a semiconductor device, wherein the method proceeds to a thin film forming step of a wiring layer forming step while maintaining a vacuum or an inert gas atmosphere.

According to the method of the present invention, a thin film is formed in a wiring layer forming step after etching residues, oxides and the like existing on the surface of the wiring plug are cleaned by sputter etching. Further, after this sputter etching step, the process proceeds to the thin film forming step of the wiring layer forming step while maintaining a vacuum or an inert gas atmosphere, so that the surface of the cleaned wiring plug is not exposed to another atmosphere, A thin film forming a wiring layer is formed thereon. For these reasons, it is difficult for an interposed object to exist between the wiring plug and the wiring layer.

After the sputter etching step, the process proceeds to a titanium film forming step while maintaining a vacuum or an inert gas atmosphere. In this titanium film forming step, a titanium film is formed on at least the surface of the wiring plug on the wafer surface sputter-etched. It is preferable that the process proceeds to the thin film forming step of the wiring layer forming step after maintaining the vacuum or the inert gas atmosphere after the formation.

The main conductive material forming the wiring plug includes tungsten, polycrystalline silicon, aluminum and the like, and tungsten is particularly preferable.

[0013]

Embodiments of the present invention will be described below. 1 to 4 are partial cross-sectional views of a wafer for describing the method of the first embodiment of the present invention in the order of steps.

First, by subjecting a silicon substrate to a predetermined process, a wafer 1 having a lower wiring 10 on its surface is obtained.
Is formed, and a silicon oxide film (insulating film) 2 is formed on the surface of the wafer 1.

The lower wiring 10 is made of a titanium (Ti) film 11 having a thickness of 300 、, a titanium nitride (TiN) film 12 having a thickness of 1000 、, a titanium film 13 having a thickness of 200 、, and an aluminum alloy film having a thickness of 4000 Å. Si content: 1wt
%, Cu content: 0.5 wt%) 14, a titanium film 15 having a thickness of 300Å, and a titanium nitride film 16 having a thickness of 300Å
Are sequentially formed by a sputtering method, and then the stacked films are formed by performing dry etching using a photoresist as a mask.

The silicon oxide film 2 is formed so as to have a flat surface by using both the CVD method and the spin-on-glass method. The thickness of the silicon oxide film 2 is set to 10000 ° above the lower wiring 10.

Next, the silicon oxide film 2 is subjected to dry etching using a photoresist as a mask to form a contact hole (via hole) 21 for connecting upper and lower wirings.

Next, the titanium film 3 is formed on the entire surface of the wafer including the wall surface and the bottom surface of the contact hole 21 (the surface of the titanium nitride film 16 forming the lower wiring 10) by the sputtering method.
Is formed to a thickness of 300 °, and the titanium nitride film 4 is
It is formed with a thickness of 00 °.

Next, WF ₆ and H are formed on the titanium nitride film 4.
By CVD method using ₂ and SiH ₄ as main source gases,
Tungsten film 5 is formed such that the film thickness on silicon oxide film 2 becomes 6000 °. Thereby, tungsten is deposited in the contact hole 21 and on the silicon oxide film 2 via the adhesion layer (the titanium film 3 and the titanium nitride film 4). FIG. 1 shows this state.

Next, the tungsten film 5 is etched back by reactive ion etching using SF ₆ and Ar as main etching gases. Thereby, tungsten is buried only in the contact hole 21 to form a tungsten plug 51. FIG. 2 shows this state.

The above is the wiring plug forming step. next,
An aluminum alloy (Si content: 1 wt%, Cu content: 0.5 w
t%), and a Ti sputtering unit on which titanium is installed as a target, and a film forming apparatus capable of moving a wafer between each unit while maintaining a vacuum. The following steps were performed.

That is, first, the wafer after the wiring plug forming step is set on the cathode side in the sputter etching section of the film forming apparatus, and argon gas is introduced in vacuum without setting the target on the anode side. By applying a voltage between the electrodes, sputter etching is performed on the entire wafer surface. This sputter etching is performed under the condition that the silicon thermal oxide film is etched by 15 nm. Thereby, the entire wafer surface including the surface of the tungsten plug 51 is cleaned.

Next, the wafer is moved from the sputter etching section to the Al sputtering section while maintaining a vacuum, and argon gas is introduced into the Al sputtering section to apply a voltage between the electrodes, so that normal sputtering is performed. An aluminum alloy film 6 having a thickness of 7000 ° is formed on a wafer by a method.

Next, the wafer is moved from the Al sputtering section to the Ti sputtering section while maintaining a vacuum, and reactive sputtering using nitrogen gas is performed in the Ti sputtering section, so that the upper surface of the aluminum alloy film 6 is formed. A titanium nitride film 7 having a thickness of 300.degree. FIG. 3 shows this state.

Next, the titanium nitride film 7 and the aluminum alloy film 6 are subjected to dry etching using a photoresist as a mask to form an upper wiring 8, and the lower wiring 10 and the upper wiring 8 are separated from each other. They are connected by a tungsten plug 51. FIG. 4 shows this state.

Thereafter, a MOS type LSI (semiconductor device) having a two-layer wiring structure is obtained by forming a protective film, forming an opening in a bonding pad portion, and the like. As a second embodiment, a titanium film 9 is formed on the wafer surface after the above-described sputter etching and before the aluminum alloy film 6 is formed, and a titanium film 9 including the titanium film 9 is used as an upper wiring 8A. A MOS LSI is manufactured in the same manner as in the first embodiment.

That is, after the same sputter etching as in the first embodiment, first, the wafer is moved from the sputter etching section to the Ti sputtering section while maintaining a vacuum, and titanium is deposited on the wafer in the Ti sputtering section by a normal sputtering method. A film 9 is formed at 200 °.
Next, the wafer is moved from the Ti sputtering section to the Al sputtering section while maintaining a vacuum, and the A
An aluminum alloy film 6 having a film thickness of 7000 ° is formed on the titanium film 9 in the sputtering section in the same manner as in the first embodiment.

Next, the wafer is moved from the Al sputtering section to the Ti sputtering section while maintaining a vacuum, and a 300 .mu.m thick film is formed on the aluminum alloy film 6 in the Ti sputtering section as in the first embodiment. Is formed. FIG. 5 shows this state.

Next, the titanium film 9, the aluminum alloy film 6, and the titanium nitride film 7 are subjected to dry etching using a photoresist as a mask, thereby forming an upper wiring 8A. Upper layer wiring 8A
Are connected by a tungsten plug 51. FIG. 6 shows this state.

The MOS LSIs of the first and second embodiments obtained in this way and the MOS LSIs formed by the same method as the first embodiment except that sputter etching is not performed (conventional example) ), The resistance values of via chains of the same structure (two-layer wiring connected at 20 locations by tungsten plugs) were measured for each of 40 samples or more, and the average resistance value in each case was measured.
The standard deviation and maximum resistance were derived.

The results are shown in Table 1 below.

[0032]

[Table 1]

As shown in Table 1, in the first embodiment, both the average resistance value and the maximum resistance value are lower than those of the conventional example. Therefore, a vacuum state was maintained after the surface of the tungsten plug was sputter-etched. It can be seen that the contact resistance between the tungsten plug and the upper layer wiring can be reduced by forming the wiring layer as it is. Further, since the standard deviation is low, it can be seen that the contact state between the tungsten plug and the upper wiring can be stabilized.

Further, since the values of the second embodiment are lower than those of the first embodiment, the titanium film and the wiring layer are sequentially formed while maintaining the vacuum state after the surface of the tungsten plug is sputter-etched. By doing
It can be seen that the contact characteristics between the tungsten plug and the upper wiring can be further improved.

In the same via chain, the temperature: 24
A stress was applied under the conditions of 0 ° C. and a current of 4 mA, a resistance value after a predetermined time had elapsed was measured, and a rate of change from the resistance value before the stress load was calculated. FIG. 7 is a graph showing the results, and shows the relationship between the resistance value change rate and the stress load time.

From this graph, it can be seen that the rate of change in the resistance value with the increase in the stress load time is smaller in the first embodiment than in the conventional example and in the second embodiment than in the first embodiment. You can see that there is. That is, it can be seen that by forming the wiring layer while maintaining the vacuum state after the sputter etching of the surface of the tungsten plug, a highly reliable wiring structure in which electromigration hardly occurs is obtained. Further, it can be seen that a more reliable wiring structure can be obtained by sequentially forming the titanium film and the wiring layer while maintaining the vacuum state after sputter etching the surface of the tungsten plug.

In each of the above embodiments, a film forming apparatus including a sputter etching unit, an Al sputtering unit, and a Ti sputtering unit, and capable of moving a wafer between the units while maintaining a vacuum, Although the sputter etching and the formation of the wiring thin film are performed in the same apparatus, the method of the present invention can be performed without using such a film forming apparatus.

That is, for example, the transition from the sputter etching step to the film forming step may be performed by using one sputtering apparatus having a pair of electrodes and switching between the sputter etching mode and the sputtering film forming mode. However, in that case, a mechanism for attaching and detaching the wafer and the target while maintaining a vacuum or an inert gas atmosphere is required.

In addition, even if the sputter etching apparatus and the film forming apparatus for forming the wiring layer are separate apparatuses, if the means for moving the wafer between the apparatuses in a vacuum or an inert gas atmosphere is provided, The method of the invention can be practiced.

The method for forming a thin film in the wiring layer forming step is not limited to the sputtering method. In each of the above embodiments, the wiring plug between the upper and lower wiring layers of the semiconductor device having the two-layer wiring structure is described. However, the method of the present invention relates to the method of forming the impurity diffusion layer on the semiconductor substrate and the wiring layer thereover. The present invention is also applicable to connecting wiring plugs.

[0041]

As described above, according to the method according to the first to third aspects, the contact resistance between the wiring plug and the upper layer wiring is reduced, so that even when a large current is applied at a high temperature, heat is generated. Is suppressed, and the connection characteristics between the wiring layers are favorably maintained. Thus, a semiconductor device having a highly reliable wiring structure can be obtained. In particular, the method according to claim 2 has a higher effect.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a wafer for describing a method according to first and second embodiments of the present invention in the order of steps, showing a state after a tungsten film is formed.

FIG. 2 is a partial cross-sectional view of a wafer for explaining a method according to first and second embodiments of the present invention in the order of steps, showing a state after a tungsten film on an insulating film is removed.

FIG. 3 is a partial cross-sectional view of the wafer for explaining the method of the first embodiment of the present invention in the order of steps, showing a state after a thin film for an upper wiring is formed.

FIG. 4 shows a state after forming a pattern of an upper layer wiring for explaining the method of the first embodiment of the present invention in the order of steps.

FIG. 5 is a partial cross-sectional view of a wafer for illustrating a method of a second embodiment of the present invention in the order of steps, and shows a state after a thin film for an upper layer wiring is formed.

FIG. 6 shows a state after an upper layer wiring pattern is formed, for explaining the method of the second embodiment of the present invention in the order of steps.

FIG. 7 is a graph showing a relationship between a resistance change rate due to a stress load and a stress load time measured in the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Wafer which has a lower wiring on the surface 10 Lower wiring 11 Titanium film 12 Titanium nitride film 13 Titanium film 14 Aluminum alloy film 15 Titanium film 16 Titanium nitride film 2 Silicon oxide film (insulating film) 21 Contact hole 3 Titanium film 4 Titanium nitride film Reference Signs List 5 tungsten film 51 tungsten plug 6 aluminum alloy film 7 titanium nitride film 8 upper wiring 8A upper wiring

Claims (3)

[Claims] 1. A method according to claim 1, further comprising: forming a contact hole in an insulating film on which a wiring layer is formed, depositing a conductive material in the contact hole and on the insulating film, and then removing the conductive material on the insulating film. Forming a wiring plug in which a conductive material forming a wiring plug is present in a contact hole, forming a thin film made of a wiring material on a wafer after the wiring plug forming step, and performing photolithography and etching on the thin film. A wiring layer forming step of forming a wiring pattern according to the method described above, wherein at least a surface of the wiring plug of the wafer after the wiring plug forming step is cleaned by sputter etching, and then a vacuum or an inert gas atmosphere is held. Wherein the process proceeds to a thin film forming step of a wiring layer forming step in a state. . 2. After the sputter etching step, the process proceeds to a titanium film forming step while maintaining a vacuum or an inert gas atmosphere. In the titanium film forming step, a titanium film is formed on at least the surface of the wiring plug on the wafer surface sputter-etched. 2. The method according to claim 1, wherein after forming, the process is shifted to a thin film forming step in a wiring layer forming step while maintaining a vacuum or an inert gas atmosphere. 3. The method according to claim 1, wherein the main conductive material forming the wiring plug is tungsten.