JPH1140516A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a void of an Al plug from occurring by, after a hole is formed at an insulating film formed on a lower layer wiring, forming a titanium thin film of specified film thickness by sputtering method and a titanium nitride thin film of specific film thickness over it, forming a wetting layer, and then forming an Al thin film. SOLUTION: After a hole 22 is formed at an insulating film formed on a lower-layer wiring 21, a titanium thin film 23 of such possible film thickness as equal to or less than 30 nm is formed by sputtering method, and over it, a titanium nitride thin film 24 is so formed by sputtering method as to be one and a half times or more of the titanium thin film 23 in film thickness. Then, the hole 22 is filled and an Al thin film which is to be an upper layer wiring is formed by sputtering method, and the Al thin film is patterned. Here, the film thickness of the titanium nitride thin film 24 is preferred to be 45 nm or more. Preferably a high-pressure aluminum embedding method may be applied. after the Al thin film is formed, a wafer is kept for a specified time in a high-pressure atmosphere of inert gas before patterned.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a wiring forming step which is convenient for connecting a lower layer and an upper layer via fine holes having a high aspect ratio. Related to.

[0002]

2. Description of the Related Art In a semiconductor device, upper and lower wirings are connected by connection holes (hereinafter referred to as via holes) formed between the wirings. In recent years, due to the demand for reduction of process cost and reduction of via hole resistance, an Al plug method of filling a hole with aluminum or an aluminum alloy (sometimes described as Al including aluminum and aluminum alloy), which is the same material as the wiring, has been adopted. Have been.

As a method for forming an Al plug, there are a high-temperature aluminum sputtering method, a high-temperature reflow method, and a high-pressure aluminum embedding method. The high-temperature aluminum sputtering method uses a substrate temperature of 400 to 55 when forming an Al thin film.
This is a method of maintaining a high temperature of 0 ° C. and filling the holes using the fluidity of Al. The high-pressure aluminum embedding method is
In this method, an Al thin film is formed in a bridging manner on a hole in a first step, and the wafer is held in a high-pressure atmosphere of an inert gas for a certain time in a second step to fill the hole with Al. Either method allows simultaneous formation of wiring and plugs, and has the advantage of reducing the number of steps and manufacturing costs in terms of raw materials compared to the conventionally used tungsten plug method by CVD. ing.

In any of these methods, the hole is previously covered with a titanium (Ti) thin film or a titanium nitride (TiN) thin film when filling the hole with the Al thin film. Since the titanium thin film and the titanium nitride thin film are formed in order to secure the fluidity of Al filled in the holes, the Ti thin film or the TiN thin film will be referred to as a wetting layer in the following description. The wetting layer is important for ensuring the fluidity of the Al thin film, and depending on the state of the wetting layer, holes (hereinafter referred to as voids) shown in FIG. 1 may be generated at the bottom of the hole. In FIG.
11 is a lower metal wiring, 12 is an interlayer insulating film separating the upper and lower wirings, 13 is a via hole connecting the upper and lower wirings, 14
Denotes an upper metal wiring, 15 denotes a wetting layer, and 16 denotes a void generated when the upper wiring is embedded in a via hole. The following three points can be cited as the causes of void generation.

(1) Hole aspect (depth / diameter)
When the ratio is large, a portion not covered with the wetting layer occurs at the bottom or the side wall of the hole, and the oxide film is exposed. Al does not flow in a portion where the oxide film is exposed, and a void is generated at the bottom of the hole.

(2) If the amount of residual moisture is large in the sputtering chamber or the wafer transfer chamber, the surface of the wetting layer is oxidized. When the wetting layer is oxidized, the fluidity of the Al thin film decreases. For this reason, voids are generated inside the holes.

(3) If the interlayer insulating film contains a large amount of impurities such as moisture, the impurities are released from the interlayer insulating film when Al is reflowed in a high-temperature atmosphere. These impurities are taken into the wetting layer in contact with the interlayer insulating film, and the fluidity of the Al thin film is reduced, and voids are similarly generated.

[0008] If a void exists inside the hole, various problems such as an increase in hole resistance, a decrease in uniformity, and a deterioration in electromigration resistance occur. Al with no poor embedding
A method of forming a wetting layer is important for forming a plug, and a method for avoiding the above problem has been proposed.

Japanese Patent Application Laid-Open No. 6-275555 discloses a method of forming a Ti alloy, which is a wetting layer, by a collimated sputtering method in a high-temperature Al sputtering method. It is said that the collimated sputtering method can improve the hole coverage of the wetting layer and can solve the above problem.

Japanese Patent Application Laid-Open No. 5-166750 also discloses a method for improving the hole coverage of a wetting layer. In this case, the formed wetting layer is once etched back to leave a tapered shape only on the side wall of the hole, and then the wetting layer is formed again. It is said that by making the cross section of the hole into a tapered shape by the etch back, the coverage of the wetting layer formed again thereafter is improved.

Japanese Patent Application Laid-Open No. 5-235179 discloses a method using a TiAl alloy for a wetting layer. It is said that the generation of voids is avoided by making the compositions of the Al plug and the wetting layer close to each other.

Japanese Patent Application Laid-Open No. 7-58199 discloses a technique in which, in a high-temperature reflow method, an Al film and an insulating film are continuously formed, and thereafter, Al is flowed into the hole at a high temperature. It is said that by covering the surface of Al with an insulating film, oxidation is prevented and fluidity is increased.

In JP-A-6-310458, first, the inside of a hole is filled with polycrystalline silicon having good coverage.
Thereafter, an Al film is formed, and a heat treatment is performed to cause Al to react with polycrystalline silicon in the hole, thereby forming A in the hole.
A method of filling 1 is disclosed.

[0014]

As described in the cited documents, various methods have been proposed for suppressing the generation of voids in aluminum plugs. However, many of the proposed methods are insufficient for increasing the aspect ratio in the future. For embedding in fine holes having a high aspect ratio, a CVD method or a method disclosed in Japanese Patent Application Laid-Open No. 6-310458 is considered to be effective. However, these methods complicate the formation process and cannot fully utilize the original advantage of reducing the manufacturing cost of the aluminum plug. When manufacturing costs are taken into consideration, an aluminum plug forming technology that supports a high aspect ratio, mainly using a sputtering method, is required. Accordingly, it is an object of the present invention to provide a method of manufacturing a semiconductor device including a wiring forming method employing a highly reliable aluminum plug forming method with no voids, which is a simple method mainly using a sputtering method. Things.

[0015]

SUMMARY OF THE INVENTION The present invention is a manufacturing method using a wetting layer for avoiding the embedding failure of an Al thin film caused by the above-mentioned wetting layer. As a technique for forming an Al plug compatible with a high aspect ratio, the high-pressure aluminum embedding method described in the description of the prior art is useful. In this method, an Al thin film is formed on a hole by a sputtering method. At that time, a void exists inside the hole. In other words, the holes are closed by the Al thin film. In the following description, this state is described as a bridge shape. After the Al thin film is formed in a bridge shape, the wafer is moved to another chamber, and an inert gas such as an argon gas is introduced into the chamber.
A high-pressure atmosphere of 0 to 800 kg / cm ² is formed, and a bridge-like Al thin film is pressed into the inside of the hole to be filled. Even in the high-pressure aluminum embedding method, a wetting layer is necessary for flowing the Al thin film into the hole. The problems of the wetting layer and the solution are described below.

In the high-pressure aluminum embedding method, a high temperature (300 to 500) is used to form an Al thin film in a bridge shape.
C) to increase the particle size. If the wetting layer is a Ti single layer film, A
An alloying reaction occurs between the l thin film and the Ti thin film, and the fluidity of Al decreases. Therefore, in the high-pressure aluminum embedding method, a TiN / Ti laminated film in which a TiN layer is laminated on a Ti layer is used as a wetting layer. In order to form a wetting layer in a fine hole having a high aspect ratio by a sputtering method, a collimated sputtering method or a long throw sputtering method is considered to be effective. These techniques improve the directivity of sputtered particles, so that even holes with a high aspect ratio can ensure coverage. In general collimated sputtering or long throw sputtering, in a hole having an aspect ratio of 2 to 3, 20 to 4 at the bottom of the hole.
0% coverage (shows the ratio of the thickness of the portion to the thickness formed on the surface, in which case the thickness at the bottom of the hole is 20 to 40% of the thickness at the surface) Is shown). However, since the directivity (straightness) of the sputtered particles is high, the coverage of the side wall is reduced. In the hole of the above aspect ratio, 10
About 20%. In the conventional method, a relatively thick film such as 50 nm is used as the thickness of the lower Ti film. Particularly, when the hole has a nearly vertical shape, when the thickness of the lower Ti film is increased, The thickness of the Ti film in the opening is also increased, and the effective hole opening diameter is reduced.
Then, the Ti in the hole opening becomes a shadow, and the sidewall coverage of the TiN film formed thereafter is further reduced.
If this tendency becomes remarkable, the coverage of the TiN film on the side wall is reduced toward the bottom of the hole, and some portions cannot be covered. If Ti is exposed on the side wall of the hole, an alloying reaction occurs between the Al thin film and the Ti thin film, whereby the fluidity of Al decreases and voids are generated.

The present inventor has found that such problems can be avoided by adjusting the thickness ratio between the lower Ti film and the upper TiN film constituting the wetting layer and the thickness of each thin film. In other words, the lower Ti film thickness is 30 nm or less, and when the lower Ti film thickness is increased, it is necessary to increase the TiN film thickness accordingly when using the sputtering method. As shown in the examples,
TiN film thickness / Ti film thickness (film thickness ratio) ≧ 1.5, preferably, Ti film thickness ≦ 30 nm and TiN film thickness ≧ 45 nm. By setting such conditions, an Al plug having no embedding defect can be realized by the sputtering method.

According to the present invention, as a wiring forming step, a hole is formed in an insulating film formed on a lower wiring, and then a titanium thin film having a film thickness of 30 nm or less is formed by sputtering. Then, a titanium nitride thin film is formed thereon by a sputtering method so as to have a thickness of 1.5 times or more the thickness of the titanium thin film, and thereafter, the hole is filled and an Al thin film serving as an upper wiring is formed by sputtering. And a step of patterning the Al thin film. Preferably, the thickness of the titanium nitride thin film is 45 nm or more.

A preferred method is to apply a high-pressure aluminum embedding method, and after forming an Al thin film,
Before patterning, the wafer is kept in a high-pressure atmosphere of an inert gas for a certain time. Hereinafter, the structure of the Al plug according to the present invention and the method of manufacturing the same will be specifically described in Examples.

[0020]

FIG. 2 shows a manufacturing process of this embodiment.
(A) is a cross section after opening the via hole. In the figure, 21 is a lower metal wiring (AiSiCu), 20 is an interlayer insulating film, 2
Reference numeral 2 denotes a via hole formed in the interlayer insulating film 20 at a position on the lower metal wiring 21.

FIG. 2B shows a state after the formation of the wetting layer. In the figure, 23 is a Ti thin film and 24 is TiN
It is a thin film. Each film thickness is Ti; 30 nm, TiN: 5
0 nm, and the film thickness ratio is TiN / Ti = 1.67. Here, the film thickness is not the film thickness in the via hole 22 but the film thickness in the field portion f on the interlayer insulating film 20.

(C) shows a state after the AlSiCu thin film is formed on the upper wiring. Reference numeral 25 denotes an AlSiCu thin film. At this stage, a void 26 exists inside the hole. (D)
Shows the configuration after forming a high-pressure argon atmosphere and flowing the AlSiCu thin film into the holes. Reference numeral 27 denotes an AlSiCu thin film flowing into the hole.

Each of the thin films is formed by a sputtering method, and is continuously formed without moving to the atmosphere by moving along a transfer path in a vacuum. The film forming conditions are as follows. Ti film formation; film formation temperature 400 ° C. Target power 6 kW Ar flow rate 50 sccm TiN film formation; film formation temperature 400 ° C. target power 12 sccm N ₂ flow rate 70 sccm AlSiCu film formation; film formation temperature 450 ° C. target power 15 kW Ar flow rate 100 sccm film 600 nm thickness high pressure embedding; embedding temperature 450 ° C. pressure (Ar atmosphere) 700 kg / cm ² holding time 90 seconds

FIG. 3 shows the relationship between the TiN / Ti film thickness ratio of the wetting layer and the via hole resistance. The via chain whose resistance was checked (a test pattern for checking the state of a via hole from electrical characteristics, in which a structure in which an upper layer wiring and a lower layer wiring are connected by a via hole, is repeated a plurality of times) has a hole diameter of 0.4 μm. , A chain pattern having 3600 weir holes having an aspect ratio of ≒ 2. The resistance value is a value converted per hole,
Error bars (vertical lines in the figure) indicate variations in the resistance value within the wafer surface. In the figure, the wetting layer configuration is T
The figure shows the resistance values of samples having i single layer, TiN / Ti lamination, and TiN single layer. In the TiN / Ti laminated sample, the film thickness ratio was changed in the range of 0.63 to 2.67 for comparison.

As shown in the figure, the TiN shown in the previous manufacturing method is used.
/Ti=1.67 sample and TiN / Ti = 2.6
7. In the TiN single layer sample, it can be seen that the resistance value is low and the variation in the wafer surface is suppressed to a low level. On the other hand, when the wetting layer is a single Ti layer, or when the thickness ratio of the TiN / Ti laminate is 1.0 or less, the resistance value is high and the in-plane variation is large. In these samples, voids are generated in the holes and the resistance value increases.

This situation is further shown in FIG. FIG. 4 shows a chain pattern for which resistance measurement has been performed using FIB (Focused Ion
Beam) processing and the result of examining the state of void generation from cross-section observation. FIB processing is a method of etching a fine region, and is performed here to expose a cross section of a chain pattern whose electric resistance is measured. In the figure, 41 is a lower wiring (AlSiCu), 42 is a void existing in the hole, 43 is a Ti thin film, 44 is a TiN thin film, and 45 is an upper wiring (AlSiCu). Here, X represents the height of the void existing in the hole, and Y represents the height of the hole. In the table, the size of the void is represented by a ratio to the hole depth (void height X / hole depth Y). X / Y
= 0 indicates that no void exists, and the value of X / Y is 1
The closer to, the larger the void. It can be seen that when the wetting layer is a single Ti layer, large voids are generated in most holes, and the AlSiCu thin film is less likely to flow. Even in the case of the TiN / Ti laminated structure, when the film thickness ratio is 1.0 or less, voids are generated as in the case of the Ti single layer, and the size changes according to the TiN / Ti film thickness ratio. TiN / T
When the film thickness ratio is 1.67 or more in the i-layer structure, no void occurs.

As described above, the wetting layer is made of TiN
In the case of the / Ti laminated structure, it can be seen that by setting the thinness ratio to 1.5 or more, an Al plug that does not generate voids can be realized by a method mainly using the sputtering method.

In the embodiment, a hole having an aspect ratio of about 2 has been described. To cope with holes with a higher aspect ratio, it is necessary to change the set film thickness. In this case, the film thickness ratio is maintained at 1.5 or more, and the Ti film thickness and the TiN film thickness are adjusted. As the aspect ratio increases, the coverage of the Ti thin film and the TiN thin film on the side wall of the hole decreases. However, by appropriately adjusting the set value of the film thickness in the above range, the exposure of Ti on the side wall of the hole can be avoided. As in Example 1, the object of the present invention can be achieved. Although the embodiments apply the present invention to the high-pressure aluminum embedding method, the present invention can exhibit the effect of the improved wetting layer even when applied to other methods such as a high-temperature reflow method.

In the hole having an aspect ratio of about 2 shown in the embodiment, even a single-layer TiN film shows a small via resistance as shown in FIG. 3, and there is no problem. However, other via holes having different aspect ratios exist in the wafer. In the case of a TiN single layer film, a problem occurs particularly in a via hole having a small aspect ratio, and the resistance value varies.
This is shown in FIG. A is the data shown in FIG. 3, and B to E are the results of the measurement of the chain pattern at another location in the same wafer.

[0030]

According to the present invention, after a hole is formed in an insulating film formed on a lower wiring, a titanium thin film having a thickness of 30 nm or less and a titanium nitride thin film having a thickness of 1.5 times or more the thickness of the titanium thin film are formed thereon. Is formed to form a wetting layer having a TiN / Ti laminated structure, and thereafter, holes are filled and an Al thin film serving as an upper layer wiring is formed. Therefore, generation of voids can be suppressed even in minute holes. Via hole resistance can be reduced and in-plane uniformity can be improved. Simple thickening of the wetting layer increases the load on the subsequent metal etching process,
By reducing the thickness of the titanium thin film, the load on the subsequent etching process can be reduced, and a highly reliable wiring process can be realized. In combination with the high-pressure aluminum embedding method as a method for embedding Al in fine holes, the formation of Al plugs in fine holes with a high aspect ratio can be easily achieved by a method mainly using sputtering.
It is possible to respond to future miniaturization without increasing the manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a via hole showing an embedding failure of an Al plug.

FIG. 2 is a process sectional view illustrating the manufacturing method of the example.

FIG. 3 is a diagram illustrating a relationship between a wetting layer configuration and via hole resistance in an example.

FIG. 4 is a table showing a relationship between a wetting layer configuration, a film thickness ratio, and a via hole resistance in the example, and a cross-sectional view of one hole of a chain pattern in which resistance measurement was performed.

FIG. 5 is a diagram showing a comparison of variations in via resistance of a chain pattern at several places in a wafer in the case of a TiN single layer film and in the case of a TiN / Ti laminated film of an example.

[Explanation of symbols]

 Reference Signs List 21 lower metal wiring (AlSiCu) 22 via hole 23, 43 Ti thin film 24, 44 TiN thin film 25 AlSiCu thin film 26 void 27 Al plug 41 lower wiring (AlSiCu) 42 void existing in hole 45 upper wiring (AlSiCu) X inside of hole Height of void existing in hole Y Height of hole

Claims (3)

[Claims] An insulating film is formed on a lower wiring formed on a semiconductor wafer, a hole is provided in the insulating film, and an upper wiring connected to the lower wiring via the hole is formed on the insulating film. In the method of manufacturing a semiconductor device including a wiring forming step of forming, the wiring forming step includes forming a hole in an insulating film formed on a lower layer wiring, and then sputtering a titanium thin film having a thickness capable of forming a film having a thickness of 30 nm or less. Forming a titanium nitride thin film thereon by a sputtering method so as to have a thickness of 1.5 times or more the thickness of the titanium thin film. It is characterized by comprising a step of forming a thin film or an aluminum alloy thin film by a sputtering method, and a step of patterning the aluminum thin film or the aluminum alloy thin film. The method of manufacturing a semiconductor device to be. 2. The method according to claim 1, wherein the thickness of the titanium nitride thin film is 45 nm or more. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the wafer is held in a high-pressure atmosphere of an inert gas for a predetermined time after forming the aluminum thin film or the aluminum alloy thin film and before patterning. .