JPH1165620A - Programmable controller having pulse output instruction - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a programmable controller in which the description amounts of a sequence program can be reduced by having an exclusive instruction for generating a pulse. SOLUTION: An address modification designated address is calculated from a condition storage area and an output storage area (S1). A condition at the time of the previous scan read from the condition storage area is compared with a condition obtained at the time of this time scan, and when the rising time is detected, 1 is stored in an accumulator 1 (S2). Also, when the rising time is not detected, 0 is stored in the accumulator. The value of this accumulator is transferred to the output storage area, and the change of the value of the output storage area is used as a pulse (S3).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a programmable controller having a pulse output command.

[0002]

2. Description of the Related Art Generally, in a programmable controller, a pulse is often generated in order to perform control based on satisfaction of a specific condition. For example, if some control is performed based on the push operation of the push button switch, a pulse having a fixed time width is generated in order to avoid inconvenience due to variation in the push operation time. It is also common practice to generate a pulse to supplement data from a measuring instrument or the like at the rise of a predetermined timing signal. Such a pulse is generated at the rising or falling timing of the input signal.

To generate a rising pulse, a sequence program (shown as a ladder diagram) as shown in FIG. 4 is required. In FIG. 4, X0 is an input, M0
Indicates an output, and R0 indicates a relay used to generate a pulse output. In this configuration, a pulse is generated using the scan operation of the programmable controller. That is, in the configuration of FIG. 4, as shown in FIG.
When the rising edge of 0 is detected, a pulse having one scan time length is obtained as the output M0.

[0004]

By the way, if a pulse is generated by such a sequence program, it is necessary to describe four steps, and the sequence program becomes longer and the development efficiency of the sequence program deteriorates. In addition, since it is necessary to describe the relay R0 in addition to the input X0 and the output M0, there arises a problem that the readability deteriorates and the correction and maintenance become troublesome.

In order to reduce the capacity of the sequence program, it is effective to perform address modification (see Japanese Patent Application Laid-Open No. 62-171002, etc.). If so, it is necessary to use an address modification instruction for each of the input X0, the output M0, and the relay R0,
In addition, when the address modification is performed, the number of occupied steps (the number of words) is doubled as compared with the direct address specification, so that eight steps are required for one pulse generation, and the sequence program becomes longer and the readability is further increased. The problem of lowering occurs.

The present invention has been made in view of the above circumstances, and a main object of the present invention is to provide a pulse output command capable of reducing the amount of description of a sequence program by having a dedicated command for generating a pulse. And a programmable controller having the same. It is another object of the present invention to provide a programmable controller capable of address modification of a pulse output command to further reduce the capacity of a sequence program.

[0007]

According to a first aspect of the present invention, there is provided a programmable controller for controlling a target device in accordance with a scan of a sequence program, wherein one scan time is detected when a specified 1-bit change point as a condition is detected. An output storage unit having a pulse output instruction for outputting a long pulse, and storing output of the pulse output instruction, and a previous condition storage unit having the same capacity as the output storage unit and storing a condition at the time of the previous scan. The pulse output command detects a change point of the condition based on the condition at the time of the current scan and the condition at the time of the previous scan stored in the previous condition storage means. According to this configuration, since the change point of the condition is detected based on the condition at the time of the previous scan stored in the previous condition storage means, the change point of the condition can be detected and a pulse can be output. In addition, since the previous condition storage means has the same capacity as the output storage means, it is not necessary to describe a sequence program for detecting a change point of the condition each time, and the previous time stored in the previous condition storage means stored in the previous condition storage means is not necessary. The amount of description of the sequence program can be significantly reduced by executing the operation of reading the condition and comparing it with the condition at the time of the current scan in the pulse output instruction.

According to a second aspect of the present invention, in the first aspect of the present invention, there is provided an index register for address modification, and a modification operation function unit for performing address modification using the contents of the index register. Modifiable. According to this configuration, the address modification can be performed when the pulse output command is used, which leads to a reduction in the capacity of the sequence program.
In other words, since a pulse can be generated by one instruction, address modification can be described in two steps, and the amount of description of the sequence program is reduced to one-fourth as compared with the conventional configuration.

According to a third aspect of the present invention, in the second aspect of the present invention, the pulse output instruction obtains the addresses of the output storage means and the previous condition storage means by using an index register; The process of transferring the read conditions of the previous scan to the general-purpose register, the process of transferring the conditions obtained in the current scan and stored in the accumulator to the temporary register, and the conditions of the current scan stored in the accumulator. A step of comparing the conditions of the previous scan stored in the general-purpose register with each other to detect the presence or absence of a change point, and a step of storing a value different from the previous value in the address of the output storage means when the change point is detected. And storing the stored value of the temporary register at the address of the previous condition storage means. This configuration is a preferred embodiment.

A fourth aspect of the present invention is characterized in that, in the first to third aspects of the present invention, the change point is a rising point of a condition. This configuration is a preferred embodiment. According to a fifth aspect of the present invention, in the first to third aspects of the present invention, the change point is a falling point of a condition. This configuration is a preferred embodiment.

According to a sixth aspect of the present invention, in the third aspect of the present invention, the presence / absence of a change point is exclusive of the condition at the time of the current scan stored in the accumulator and the condition at the previous scan stored in the general-purpose register. This is detected by logical OR. This configuration is a preferred embodiment. According to a seventh aspect of the present invention, in the invention of the sixth aspect, a logical product of the exclusive OR and the condition at the time of the current scan stored in the accumulator and the condition at the time of the previous scan stored in the general-purpose register is output. It is stored in the storage means. This configuration is a preferred embodiment.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In this embodiment, a programmable controller has a pulse output command having the processing procedure shown in FIG. As shown in FIG. 2, the programmable controller connects a microprocessor 1, a system memory 2 storing a system program, a program memory 3 storing a sequence program, a data memory 4 storing various data, and an external device. And an input / output unit 5 that performs the operation. Although not shown, a port for connecting a program support device is also provided.

The microprocessor 1 includes an index register 13, a general-purpose register 14, and a temporary register 15 in addition to the arithmetic processing unit 11 and the accumulator 12, and can execute the processing shown in FIG. Also,
Condition storage area D ₂ as the last condition memory means for storing the condition of running the output storage area D ₁ and the pulse output command as output storage means for storing the execution result of the pulse output command is provided in the data memory 4 Have been. The output storage area D ₁ and condition storage area D _2-bit data of a plurality of bits in the same capacity is enabled store.

The pulse output command described in this embodiment is:
Address qualification is enabled. That is, in the sequence program, the pulse can be output by specifying the address modification simply by describing the two steps of the step of writing the contents of the index register and the step of executing the pulse output instruction. Here, the address modification function unit for executing the address modification is constituted by the microprocessor 1, the system memory 2, and the program memory 3.

The processing procedure shown in FIG. 1 will be described below. When executing the pulse output command, using the contents of the index register 13, and the desired address in the output storage area D _1, and the address corresponding in condition storage area D ₂ is calculated (S1). When the addresses of the output storage area D ₁ and the condition storage area D ₂ are obtained in this manner, an area for storing the execution result of the pulse output instruction in the current scan is secured, and the pulse output instruction is executed during the previous scan. Condition can be obtained. here,
If for generating a pulse when detecting a rising edge of the condition, the initial value of the condition storage area D ₂ becomes 0 (that the by rising the logic value changes from 0 to 1).

Output storage area D ₁ and condition storage area D ₂
After obtaining the address, the condition for the previous scan obtained from the condition storage area D ₂ is stored in the general-purpose register 14, and the condition for the current scan stored in the accumulator 12 is stored in the temporary register 15. . This condition is the change point (rising point, falling point) at the next scan
Will be used for detection. Further, in order to detect whether or not there is a change point in the condition, an exclusive OR of the condition at the time of the current scan stored in the accumulator 12 and the condition at the time of the previous scan stored in the general-purpose register 14 is obtained. . With this logical operation, it is possible to detect the presence or absence of a changing point of the condition. That is, if the condition changes, the result of the logical operation becomes 1, and if the condition does not change, it becomes 0. Further, the logical product of the result of the exclusive OR described above and the condition at the time of the current scan is obtained. Accordingly, if the condition at the time of the current scan is 0, the result of the logical operation is 0 regardless of the presence or absence of a change point, and if the condition at the time of the current scan is 1 and a change point is detected, the logical operation is performed. Becomes 1. That is, the output value becomes 1 only when the rising point of the condition is detected. The output value becomes 0 when there is no change in the condition or when a falling point of the condition is detected. That is, a pulse of one scan time length is output from the rising point of the condition. This calculation result is stored in the accumulator 12 (S2).

Next, the contents of accumulator 12 is stored at an address determined at step S1 of the output storage area D ₁ (S3). The contents of the temporary register 15 is stored in the address determined at step S1 of the condition storage area D ₂ (S4). These processes, contents of the address determined at step S1 of the output storage area D ₁ is
It becomes 1 only for one scan time length from the rise of the condition, and is used as a pulse. Further, since the condition during this scan is transferred from the temporary register 15 in the condition storage area D _2, it will be used to detect the presence or absence of a change point this condition during the next scan. As apparent from the above description, the pulses from obtained as a change in stored in a specific address of the output storage area D ₁ value, can be freely referenced in other bit operations.

By performing a bit operation using the pulse output command as described above, a pulse can be generated by performing address modification in a sequence program. For example, as shown in FIG. Modified input iXn and address modified output iXn
A pulse can be used only by describing Pn (pulse relay). As described above, since the sequence program can be described more easily than before, the number of steps in the sequence program is reduced, unnecessary instructions are not described, and creation, modification, and maintenance of the sequence program are facilitated. .

[0019]

According to a first aspect of the present invention, there is provided a programmable controller for controlling a target device in accordance with a scan of a sequence program, and upon detecting a specified 1-bit change point as a condition, a pulse having a scan time length is generated. An output storage unit having a pulse output instruction to output, and storing an output of the pulse output instruction; and a previous condition storage unit having the same capacity as the output storage unit and storing a condition at the time of the previous scan. The instruction detects a change point of the condition based on the condition at the time of the current scan and the condition at the time of the previous scan stored in the previous condition storage means. Since the condition change point is detected based on the condition, the condition change point can be detected and a pulse can be output. Since the capacity is the same as that of the storage means, there is no need to write a sequence program for detecting a change point of the condition each time, and the conditions of the previous scan stored in the previous condition storage means are read and the current scan is performed. By executing the operation of comparing with the condition (1) in the pulse output command, there is an advantage that the description amount of the sequence program can be greatly reduced.

According to a second aspect of the present invention, there is provided an index register for address modification, and a modification operation function unit for performing address modification using the contents of the index register so that the pulse output instruction can be address modified. Thus, the address modification can be performed when the pulse output command is used, which has the advantage of reducing the capacity of the sequence program. That is, since a pulse can be generated by one instruction, address modification can be described in two steps, and the amount of description of the sequence program is reduced to one fourth per pulse as compared with the conventional configuration. There are advantages.

[Brief description of the drawings]

FIG. 1 is an operation explanatory diagram showing a procedure of a pulse output command used in an embodiment of the present invention.

FIG. 2 is a block diagram of a programmable controller that executes the above.

FIG. 3 is a diagram showing a part of a sequence program described using the above.

FIG. 4 is a diagram showing a part of a conventional sequence program.

FIG. 5 is an operation explanatory view of the above.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Microprocessor 2 System memory 3 Program memory 11 Arithmetic processing unit 12 Accumulator 13 Index register 14 General-purpose register 15 Temporary register D ₁ Output storage area D ₂ Condition storage area

Claims (7)

[Claims] 1. A programmable controller for controlling a target device in accordance with a scan of a sequence program, and having a pulse output command for outputting a pulse of one scan time length when a specified one-bit change point is detected as a condition. An output storage means for storing the output of the pulse output command; and a previous condition storage means having the same capacity as the output storage means and storing the conditions at the time of the previous scan. A programmable controller having a pulse output instruction for detecting a change point of a condition based on a condition and a condition at the time of a previous scan stored in a previous condition storage means. 2. The apparatus according to claim 1, further comprising an index register for address modification, and a modification operation function unit for performing address modification using the contents of the index register, wherein the pulse output instruction can be address-modified. Programmable controller with the described pulse output instruction. 3. A pulse output command includes: a step of obtaining addresses of an output storage means and a previous condition storage means using an index register; and a condition of a previous scan read from the address of the previous condition storage means in a general-purpose register. The process of transferring, the process of transferring the condition obtained in the current scan and stored in the accumulator to the temporary register, the condition of the current scan stored in the accumulator, and the condition of the previous scan stored in the general-purpose register Detecting the presence or absence of a change point, storing a value different from the previous value in the address of the output storage means when the change point is detected, and storing the stored value of the temporary register in the previous condition storage means. Storing the program at the address of the programmable controller having the pulse output command according to claim 2. controller. 4. The programmable controller having a pulse output command according to claim 1, wherein the change point is a rising point of a condition. 5. The programmable controller having a pulse output command according to claim 1, wherein the change point is a falling point of a condition. 6. The presence or absence of a change point is detected by an exclusive OR of a condition at the time of the current scan stored in the accumulator and a condition at the time of the previous scan stored in the general-purpose register. A programmable controller having the pulse output command according to claim 3. 7. The output storage means stores the logical product of the exclusive OR, the condition of the current scan stored in the accumulator, and the condition of the previous scan stored in the general-purpose register. A programmable controller having a pulse output command according to claim 6.