JPH1155078A - Digital noise filter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an output signal that makes the rise edge of a normal signal clear by eliminating a noise component in accordance with a result in which a comparator compares an output of a counting means which counts outputs of an edge detecting means that detects the rise of an input signal including a noise component with a set value. SOLUTION: An edge detecting part 4 generates one shot and an up counter 5 becomes an enable state at the rise of an input signal RZ that includes an inputted noise component. The up counter 5 is undergone synchronous reset by an edge detection signal L of the part 4 and starts to perform a count up operation from an initial value zero. A comparator 6 compares a set value 2 that is preliminarily set with an output of the counter 5 and outputs the L when they coincide, and it is latched by a flip-flop 7. With this, it is possible to output an EDL signal 3 that becomes the L and is eliminated before a noise component whose H period is short enough in a high frequency coincides with the value 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for converting an analog signal into a digital signal, by removing a noise component generated in the converted digital signal by a digital circuit, and by clarifying a rising edge of a normal signal component. It is about filters. For example, DVD (Digital
BCA (Burst Cutt) in Versatile Disk (Versatile Disk) system
In the reproduction signal of the (ing Area), noise is included in the reproduction signal, and it is important to remove the noise. An object of the present invention is to provide a circuit for removing this noise by a digital circuit.

[0002]

2. Description of the Related Art Conventionally, in an analog-digital interface section, a low-pass filter or the like has been used to remove high-frequency noise components on digital signals. Components of this filter include a resistor, a capacitor, and the like, which are disadvantageous in terms of a mounting area on a board, the number of components, and reliability.

FIG. 10 shows a conceptual diagram of a noise filter configuration in a conventional analog-digital interface unit.

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to derive an output signal in which a rising edge of a normal signal is clarified in a digital signal containing noise, and realizes this function by a simple circuit configuration. What you want to do. By utilizing the signal generated from the noise filter circuit according to the present invention, it becomes possible to accurately and easily detect the interval of the normal signal in the subsequent processing circuit.

[0005]

In a digital noise filter according to a first aspect of the present invention, an edge detecting means for detecting a rising edge of an input signal containing a noise component, and a counting means for performing a counting operation in accordance with an output of the edge detecting means. Means, comparing the output of the counting means with a set value,
An output signal from which a noise component has been removed is derived according to the comparison result.

In a digital noise filter according to a second aspect of the present invention, the digital noise filter includes edge detecting means for detecting a rising edge of an input signal containing a noise component, and counting means comprising an up counter for performing a counting operation in accordance with an output of the edge detecting means. A comparator for comparing the output of the counting means with a set value, and an output means comprising a flip-flop which operates according to the comparison result of the comparator and derives an output signal from which a noise component has been removed. This is to remove the generated high frequency noise component and extract the generation edge of the normal signal.

In a digital noise filter according to a third aspect of the present invention, the digital noise filter includes edge detecting means for detecting a rising edge of an input signal composed of a digital signal containing a noise component, and an up counter for performing a counting operation in accordance with an output of the edge detecting means. Counting means, a comparator that compares the output of the counting means with a set value, and an output means that includes a one-shot generating unit that operates according to the comparison result of the comparator and derives an output signal from which a noise component has been removed. And removes a high-frequency noise component generated in the digital signal and extracts a generation edge of the normal signal.

In a digital noise filter according to a fourth aspect of the present invention, an edge detecting means for detecting a rising edge of an input signal comprising a digital signal containing a noise component, and a carry output for performing a counting operation in accordance with an output of the edge detecting means. Counting means comprising an up counter, a comparator for comparing the output of the counting means with a set value, and output means comprising a flip-flop which operates in accordance with the comparison result of the comparator and derives an output signal from which a noise component has been removed. And removes a high-frequency noise component generated in the digital signal, and extracts a generation edge of the normal signal.

In a digital noise filter according to a fifth aspect of the present invention, there is provided an edge detecting means for detecting a rising edge of an input signal comprising a digital signal including a noise component, and a carry output for performing a counting operation in accordance with an output of the edge detecting means. Counting means comprising an up counter, a comparator for comparing the output of the counting means with a set value, and a one-shot generating section which operates according to the comparison result of the comparator and derives an output signal from which noise components have been removed. Output means for removing a high-frequency noise component generated in the digital signal and extracting a generation edge of the normal signal.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. In order to process a digital signal having a high frequency noise component, the noise component must be removed. Conventionally, in order to remove such a noise component, a measure has been taken using a low-pass filter or the like as shown in FIG. The present invention relates to a circuit configuration capable of removing a noise component and detecting a rising edge of a normal signal component by a digital circuit.

FIG. 1 shows an embodiment of a circuit configuration according to the present invention. First, the figures will be described. 1 is
A digital signal (hereinafter, referred to as an input signal RZ) that has passed through a comparator and is input to the noise filter circuit of the present invention. 2 is a set value arbitrarily set by the user. In this embodiment, Xn is set (Xn <2n). This is because an up counter 5 described later used in this embodiment has n bits. Reference numeral 3 denotes an edge detection signal of a delayed normal signal after passing through the noise filter according to the present invention (hereinafter, referred to as an EDL signal). Reference numeral 4 denotes an edge detection unit including a rising edge detection unit for the input signal RZ. 5 is a counting means composed of an up counter. In this embodiment, an n-bit up counter 5 is used. A comparator 6 compares the set value 2 with the count value of the up counter 5 and outputs the result. When the set value matches the count value, “L” is output. Reference numeral 7 denotes an output unit including a flip-flop that latches the output of the comparator 6.

Next, the operation will be described. For example,
In DVD systems, BCA (Burst Cutting Are
What is needed in the information from the reproduced signal output in a) is information on the interval between the regular signals. However, the reproduced output from the BCA contains high frequency noise. The conceptual diagram is shown in FIG. It can be seen that high-frequency noise is present before and after the normal signal component.

FIG. 6 shows a timing chart from input of the input signal RZ including such a noise component to the noise filter circuit of the present invention shown in FIG. 1 until output of the EDL signal 3 after passing through the filter. .

The operation of the circuit according to the present invention will be described with reference to FIGS. In FIG. 1, the edge detection unit 4 generates a one-shot at the rising edge of the input signal RZ including the input noise component regardless of whether the input signal RZ is a noise signal or a normal signal. The up counter 5 enabled by the "H" signal of the input signal RZ is synchronously reset by the "L" output of the edge detection signal output from the edge detection unit 4, and starts counting up from the initial value 0.

The comparator 6 compares the preset value 2 (here, Xn) with the output of the up-counter 5, and outputs a match signal "L" when the values match. This is latched by the flip-flop 7 and the EDL signal 3 which is a digital signal from which the high-frequency noise component has been removed.
Is output.

The principle of noise removal is based on the "H" of the noise component.
Since the period is a high frequency, it is compared with a normal signal component, becomes "L" shortly before the count value matches the set value 2, and the counter value does not reach the set value.
The fact that it does not become "L" is used.

By this series of operations, a rising edge of a normal signal can be detected and output from the input signal RZ containing a high-frequency noise component (generation of the EDL signal 3).

Embodiment 2 FIG. While the up counter 5 counts up during the “H” period of the input signal RZ as described in the first embodiment, when the set value 2 matches the count value, the normal signal component FIG. 7 shows a timing chart when the signal becomes “L”.

Since the up-counter 5 is reset synchronously by the output of the edge detection unit 4, when the input signal RZ becomes "L" with a count value that matches the set value 2, the counter is disabled, The last count value is held. At this time, the comparator 6 outputs “L” as long as the count value does not change (because the count value = set value), so that the EDL signal 3 after the filter outputs the “L” signal for a period longer than 1 CLK. Becomes That is,
The "L" period of the EDL signal 3 changes depending on the "H" period of the normal signal component.

The EDL signal 3 after passing through the filter as described above
If there is a difference in the period of obtaining the normal signal, it becomes difficult to detect the interval between the normal signals in the subsequent processing. FIG. 2 shows a circuit configuration for preventing this phenomenon.

The difference from FIG. 1 is that the EDL after passing through the filter
That is, the output means for outputting the signal 3 includes the one-shot generation unit 8. With this circuit configuration, the set value 2
Even if the input signal RZ becomes “L” at the count value that coincides with the above, the generated EDL signal 3 after passing through the filter always has the same pulse width (1 CLK). It is easy to detect the signal interval.

Embodiment 3 FIG. In the circuit configuration of the first embodiment, when a normal signal component in input signal RZ including noise is in the “H” state for a sufficiently long period, up counter 5 in FIG. 1 overflows,
Although the normal signal is in the “H” state, “0”
There is a possibility that the EDL signal 3 is generated a plurality of times during the "H" period to start the count-up. This phenomenon is shown in the timing chart of FIG. In this case, it becomes impossible to use the EDL signal 3 to determine the regular signal interval by the subsequent processing circuit.

The present invention relates to a circuit configuration for preventing the above-mentioned phenomenon in consideration of the overflow of the up counter 5 in FIGS. FIG.
This will be described with reference to FIG.

First, a description will be given with reference to the drawings. In FIG. 3, 2 is a set value arbitrarily set by the user. In this embodiment, Xm is set (Xm <Xn = 2 ⁿ ). 9 is a counting means consisting of an up counter with a carry output,
Numeral 0 denotes an output means comprising a flip-flop for inputting the logical sum of the carry output of the up counter 9 and the output of the up counter 9 itself. Other components are the same as those in FIG.

The operation until input signal RZ is input and up-counter 9 counts up during the "H" period is the same as the operation described in the first embodiment. Since the set value 2 is Xm, the EDL signal 3 is output when the count value matches Xm.

When the "H" period of the normal signal component is long,
After the EDL signal 3 outputs "L", the up counter 9
Continue counting up, but since the counter used in this embodiment is n bits, a carry is generated when the count value reaches Xn.

The carry is latched by the flip-flop 10 and the up counter 9 is disabled by feedback to the enable of the up counter 9.
The up counter 9 holds the last count value, that is, 2 ⁿ . That is, no matter how long the "H" period of the normal signal is, the EDL signal 3 is output only once.

When a normal signal or a noise component is newly input after a normal signal having a long "H" period becomes "L", the counter is reset and the filter operation is performed again. FIG. 9 shows a timing chart in this case.

Embodiment 4 When the EDL signal 3 after passing through the filter is output from the flip-flop 7 as shown in FIG. 3, the "L" of the EDL signal 3 depends on the "H" period of the normal signal component as described in the first embodiment. "The period will change. FIG. 4 shows a circuit configuration for preventing this.
Shown in

The difference from FIG. 3 is that the EDL after passing through the filter
The output means of the one-shot generation unit 8 outputs the signal 3. With this circuit configuration,
The input signal RZ is “L” at the count value that matches the set value 2.
Thus, the generated EDL signal 3 after passing through the filter always has the same pulse width (1 CLK), and the processing circuit at the subsequent stage can easily detect the interval of the normal signal of the input signal RZ. When a normal signal or a noise component is newly input after the normal signal having a long "H" period becomes "L", the counter is reset and the filtering operation is performed again.

[0031]

According to the first aspect, a rising edge of a normal signal in a digital signal including a noise signal can be clarified, and a digital noise filter which can realize this function with a simple circuit configuration is obtained. be able to.

According to the second aspect, it is possible to clarify the rising edge of a normal signal in a digital signal including a noise signal, and to obtain a digital noise filter capable of realizing this function with a simpler circuit configuration. Can be.

According to the third aspect, the rising edge of the normal signal in the digital signal including the noise signal can be clarified, and the output means including the one-shot generating section can be used regardless of the fluctuation of the input signal. Thus, a digital noise filter that can derive an output signal having the same pulse width can be obtained.

According to the fourth aspect, the rising edge of the normal signal in the digital signal including the noise signal can be clarified, and the counting means including the up-counter with the carry output and the output including the flip-flop can be used. With the means, a digital noise filter that can derive an accurate output signal can be obtained.

According to the fifth aspect, the rising edge of the normal signal in the digital signal including the noise signal can be clarified, and the counting means including the up counter with the carry output and the one-shot generating section With such an output means, it is possible to obtain a digital noise filter capable of deriving an accurate output signal having the same pulse width regardless of the fluctuation of the input signal.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a digital filter circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a digital filter circuit according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a digital filter circuit according to a third embodiment of the present invention when an overflow of a counter is considered.

FIG. 4 is a configuration diagram of a digital filter circuit according to a fourth embodiment of the present invention when an overflow of a counter is considered.

FIG. 5 is a schematic diagram of a digital signal including a high-frequency noise component.

FIG. 6 is a diagram showing a timing chart in the first circuit.

FIG. 7 is a diagram showing a timing chart in a second circuit.

FIG. 8 is a diagram showing a timing chart in a third circuit.

FIG. 9 is a diagram showing a timing chart in a fourth circuit.

FIG. 10 is a conceptual diagram showing a means for removing noise of a digital signal in a conventional analog-digital interface unit.

[Explanation of symbols]

4 edge detector, 5 up counter, 6 comparator,
7 flip-flops, 8 one-shot generator.

Claims (5)

[Claims] 1. An edge detecting means for detecting a rising edge of an input signal including a noise component, and a counting means for performing a counting operation in accordance with an output of the edge detecting means,
A digital noise filter, wherein an output of the counting means is compared with a set value, and an output signal from which a noise component has been removed is derived according to the comparison result. 2. An edge detecting means for detecting a rising edge of an input signal containing a noise component; a counting means comprising an up counter for performing a counting operation in accordance with an output of the edge detecting means; And an output unit comprising a flip-flop that operates in accordance with the comparison result of the comparator and derives an output signal from which a noise component has been removed, and removes a high-frequency noise component generated in the digital signal. A digital noise filter for extracting a generation edge of a normal signal. 3. An edge detecting means for detecting a rising edge of an input signal comprising a digital signal containing a noise component; a counting means comprising an up counter for performing a counting operation in accordance with an output of the edge detecting means; A comparator for comparing an output with a set value; and output means comprising a one-shot generating section for operating in accordance with the comparison result of the comparator and deriving an output signal from which a noise component has been removed, comprising a high frequency generated in a digital signal. A digital noise filter for removing a noise component of the normal signal and extracting a generation edge of a normal signal. 4. An edge detecting means for detecting a rising edge of an input signal comprising a digital signal containing a noise component; a counting means comprising an up counter with a carry output for performing a counting operation in accordance with an output of the edge detecting means;
A comparator for comparing the output of the counting means with a set value;
Output means comprising a flip-flop which operates in accordance with the comparison result of the comparator and derives an output signal from which a noise component has been removed, removes a high-frequency noise component generated in the digital signal, and generates a generation edge of the normal signal. Digital noise filter characterized by taking out. 5. An edge detecting means for detecting a rising edge of an input signal comprising a digital signal containing a noise component; a counting means comprising a carry output up counter for performing a counting operation in accordance with an output of said edge detecting means;
A comparator for comparing the output of the counting means with a set value;
Output means comprising a one-shot generating section which operates in accordance with the comparison result of the comparator and derives an output signal from which a noise component has been removed, removing a high-frequency noise component generated in the digital signal, and generating a normal signal. A digital noise filter characterized by extracting edges.