JPH1152908A - Driving device for plasma display panel - Google Patents

Driving device for plasma display panel

Info

Publication number
JPH1152908A
JPH1152908A JP9220850A JP22085097A JPH1152908A JP H1152908 A JPH1152908 A JP H1152908A JP 9220850 A JP9220850 A JP 9220850A JP 22085097 A JP22085097 A JP 22085097A JP H1152908 A JPH1152908 A JP H1152908A
Authority
JP
Japan
Prior art keywords
switch
turned
time
pulse
driving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9220850A
Other languages
Japanese (ja)
Inventor
Kenichiro Hosoi
研一郎 細井
Takashi Iwami
隆 岩見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP9220850A priority Critical patent/JPH1152908A/en
Publication of JPH1152908A publication Critical patent/JPH1152908A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/293Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
    • G09G3/2932Addressed by writing selected cells that are in an OFF state

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent occurrence of a noise to stabilize a system, and to reduce power consumption at the time of driving a switch by utilizing electrode capacity of a plasma display panel and a resonance characteristic of a coil provided in a driving device. SOLUTION: A switch SW7 is turned on and a row electrode is kept at a ground potential in a scanning period. Next, switches SW8 and SW9 are turned on, the switch SW7 is turned off, a switch SW2 is turned on, electric charges of a capacitor C1 for withdrawing electric charges are supplied to an output 01 through a coil L1, a diode D1, and the switch SW8, and electric charges are charged to row electrodes. At the time, a rising part and a falling part of a scanning pulse are made a waveform having loose tilt owing to resonance by the coil L1 and electrode capacity of PDP. Thus, a waveform in which high frequency components are reduced is made at the time of rising and falling of a scanning pulse, needless radiation of an electromagnetic wave is reduced, and increasing power consumption by a high frequency wave is suppressed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、PDP(プラズマ
ディスプレイパネル)の駆動装置に関し、特に走査パル
ス期間における波形改善技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus for a PDP (Plasma Display Panel), and more particularly to a technique for improving a waveform during a scanning pulse.

【0002】[0002]

【従来の技術】PDPは、周知の如く、薄形の2次元画
面表示器の1つとして近時種々の研究がなされており、
その1つにメモリ機能を有する交流放電型マトリクス方
式のPDPが知られている。かかるPDPは、列電極及
び列電極と直交し一対にて1行(1走査ライン)を構成
する行電極対を備えており、これら列電極及び行電極対
各々は放電空間に対して誘電体層で覆われており、列電
極及び行電極対の各交点に放電セル(画素)が形成され
ている。このPDPの駆動シーケンスは、すべての行電
極対に強制的に放電励起せしめて壁電荷を形成もしくは
消去させるためのリセットパルスを発生するリセット期
間と、画素データを書き込むための走査パルスを発生す
る走査期間と、放電発光を維持するための維持パルスを
発生する維持期間で構成される。
2. Description of the Related Art As is well known, various studies have recently been made on a PDP as one of thin two-dimensional screen displays.
One of them is an AC discharge type matrix PDP having a memory function. Such a PDP includes a column electrode and a pair of row electrodes orthogonal to the column electrode and constituting one row (one scanning line). Each of the column electrode and the row electrode pair is a dielectric layer with respect to the discharge space. And a discharge cell (pixel) is formed at each intersection of the column electrode and the row electrode pair. The PDP drive sequence includes a reset period for generating a reset pulse for forming or erasing wall charges by forcibly discharging and exciting all the row electrode pairs, and a scan period for generating a scan pulse for writing pixel data. A period and a sustain period for generating a sustain pulse for maintaining discharge light emission.

【0003】図1は、PDPの行電極対を駆動するため
の駆動装置を示し、図1において、1は維持パルスを発
生する第1パルス発生回路、2はリセットパルスを発生
する第2パルス発生回路、3は走査パルスを発生する第
3パルス発生回路である。第1及び第2パルス発生回路
1、2はすべての行電極あるいは複数の行電極群に対し
て1つ設けられ、第3パルス発生回路3はすべての行電
極あるいは複数の行電極群に対して1つ設けられ、名行
電極に対してそれぞれ走査パルスを生成するとともに、
第1パルス発生回路1と第2パルス発生回路よりのパル
スをこの第3パルス発生回路3を経由して各行電極に供
給する。第1パルス発生回路1は、定電圧源E1とスイ
ッチSW1の直列回路と、コイルL1、スイッチSW
2、ダイオードD1の直列回路と、コイルL2、スイッ
チSW3、ダイオードD2の直列回路とスイッチSW4
と、電荷回収用コンデンサC1より構成される。コイル
L1、L2を合む直列回路には電荷回収用コンデンサC
1が接続され、スイッチSW4はアースに接続されてい
る。各直列回路とスイッチSW4は互いに並列接続され
ている。
FIG. 1 shows a driving device for driving a row electrode pair of a PDP. In FIG. 1, reference numeral 1 denotes a first pulse generation circuit for generating a sustain pulse, and 2 denotes a second pulse generation circuit for generating a reset pulse. The circuit 3 is a third pulse generating circuit that generates a scanning pulse. One first and second pulse generation circuits 1 and 2 are provided for all row electrodes or a plurality of row electrode groups, and a third pulse generation circuit 3 is provided for all row electrodes or a plurality of row electrode groups. One is provided to generate a scanning pulse for each of the name row electrodes,
Pulses from the first pulse generation circuit 1 and the second pulse generation circuit are supplied to each row electrode via the third pulse generation circuit 3. The first pulse generation circuit 1 includes a series circuit of a constant voltage source E1 and a switch SW1, a coil L1, and a switch SW1.
2, a series circuit of a diode D1, a coil L2, a switch SW3, a series circuit of a diode D2, and a switch SW4.
And a charge collection capacitor C1. The series circuit including the coils L1 and L2 has a charge recovery capacitor C
1 is connected, and the switch SW4 is connected to the ground. Each series circuit and the switch SW4 are connected in parallel with each other.

【0004】第2パルス発生回路は、定電圧源E2、ス
イッチSW5及び抵抗R1の直列回路より構成されてい
る。また、第3パルス発生回路3は、定電圧源E3、ス
イッチSW6〜SW9及びダイオードD3、D4より構
成され、その出力O1が各行電極に接続されている。定
電圧源E3にはPDPの行電極に対応して設けられた複
数のスイッチSW6とSW7よりなる直列回路が並列接
続されている。ダイオードD3、D4もPDPの行電極
に対応して直列接続され、行電極に対応して複数設けら
れており、その共通接続点にスイッチSW6とSW7の
共通接続点が接続されている。また、スイッチSW8、
SW9とダイオードD3、D4は第1、第2パルス発生
回路1、2よりのパルス出力を各行電極に供給制御する
ための手段である。
[0004] The second pulse generating circuit comprises a series circuit of a constant voltage source E2, a switch SW5 and a resistor R1. The third pulse generating circuit 3 includes a constant voltage source E3, switches SW6 to SW9, and diodes D3 and D4, and an output O1 is connected to each row electrode. To the constant voltage source E3, a series circuit including a plurality of switches SW6 and SW7 provided corresponding to the row electrodes of the PDP is connected in parallel. Diodes D3 and D4 are also connected in series corresponding to the row electrodes of the PDP, and a plurality of diodes D3 and D4 are provided corresponding to the row electrodes. The common connection point is connected to the common connection point of switches SW6 and SW7. Also, a switch SW8,
SW9 and diodes D3 and D4 are means for controlling the supply of pulse outputs from the first and second pulse generation circuits 1 and 2 to each row electrode.

【0005】以上の構成において、その動作を図3のタ
イミングチャートとともに説明する。時刻t1−t3の
リセット期間と、時刻t9−t13の維持期間において
は、スイッチSW8、SW9がオンで、スイッチSW
6、SW7はオフであり、時刻t3−t9の走査期間に
おいては、スイッチSW8、SW9はオフしている。リ
セット期間において、時刻t1以前はスイッチSW4が
オンしており、行電極はアース電位となっている。時刻
t11に到ると、スイッチSW4がオフし、スイッチS
W5がオンすることにより、各行電極に対して定電圧源
E2からスイッチSW8とダイオードD3を通してリセ
ットパルスが一斉に供給される。このリセットパルス
は、抵抗R1とPDPの電極容量との時定数によって立
ち上がる波形である。時刻t2において、スイッチSW
4がオンし、スイッチSW5がオフして行電極は再びア
ース電位となる。
The operation of the above configuration will be described with reference to the timing chart of FIG. During the reset period from time t1 to t3 and the sustain period from time t9 to t13, the switches SW8 and SW9 are turned on and the switch SW8 is turned on.
6, SW7 is off, and switches SW8 and SW9 are off during the scanning period from time t3 to t9. In the reset period, before time t1, the switch SW4 is on, and the row electrode is at the ground potential. At time t11, the switch SW4 turns off and the switch S
When W5 is turned on, a reset pulse is simultaneously supplied to each row electrode from the constant voltage source E2 through the switch SW8 and the diode D3. This reset pulse has a waveform that rises according to the time constant of the resistance R1 and the electrode capacitance of the PDP. At time t2, the switch SW
4 is turned on, the switch SW5 is turned off, and the row electrode returns to the ground potential again.

【0006】次に、走査期間においては、時刻t3にて
スイッチSW8、SW9がオフし、スイッチSW7がオ
ンすることにより、行電極はアース電位を維持し、次に
時刻t4においてスイッチSW6がオン、SW7がオフ
することにより、定電圧源E3が行電極に供給され、時
刻t6にてスイッチSW6がオフし、スイッチSW7が
オンすることにより行電極はアース電位となる。次に時
刻t7に到ると再びスイッチSW6がオンし、スイッチ
SW7がオフすることにより、行電極に定電圧源E3が
供給され、時刻t9にてスイッチSW6がオフし、スイ
ッチSW7がオンする。このように、走査期間ではスイ
ッチSW6とSW7は相補的に動作し、時刻t4−t6
期間に発生するパルスが壁電荷形成のためのプライミン
グパルスとなり、時刻t6−t7期間に発生するパルス
が走査パルスとして、行電極に供給される。ここで、前
述のプライミングパルス(時刻t4−t6期間)と走査
パルス(時刻t6−t7期間)は各行電極毎に順次シフ
トされるようにし、走査パルス発生のタイミングで各行
電極に対して画素データに対応した画素データパルスが
順次列電極に印加される(図示せず)。
Next, in the scanning period, the switches SW8 and SW9 are turned off at time t3 and the switch SW7 is turned on, so that the row electrode maintains the ground potential. Then, at time t4, the switch SW6 is turned on. When SW7 is turned off, the constant voltage source E3 is supplied to the row electrode. At time t6, the switch SW6 is turned off, and when the switch SW7 is turned on, the row electrode is set to the ground potential. Next, at time t7, the switch SW6 is turned on again and the switch SW7 is turned off, so that the constant voltage source E3 is supplied to the row electrode. At time t9, the switch SW6 is turned off and the switch SW7 is turned on. As described above, during the scanning period, the switches SW6 and SW7 operate complementarily, and at the time t4 to t6
The pulse generated during the period is a priming pulse for forming wall charges, and the pulse generated during the period from time t6 to time t7 is supplied to the row electrodes as a scanning pulse. Here, the priming pulse (time t4 to t6 period) and the scanning pulse (time t6 to t7 period) are sequentially shifted for each row electrode. Corresponding pixel data pulses are sequentially applied to the column electrodes (not shown).

【0007】次に、走査期間が終了すると維持期間に移
る。この維持期間では、まず時刻t9にてスイッチSW
6、SW7がオフし、スイッチSW8、SW9がオンす
る。このとき、スイッチSW4はオンしているので、行
電極はアース電位となっている。次に、時刻t10にて
スイッチSW4がオフし、スイッチSW2がオンするこ
とにより、電荷回収用コンデンサC1の電荷をコイルL
1、ダイオードD1、スイッチSW8、ダイオードD3
を通じて出力O1に接続されたPDPの行電極に供給
し、行電極群に電荷が充電される。このときコイルL1
とPDPの電極容量による共振により立ち上がりの緩や
かなパルスが得られる。電極容量を充電した後、時刻t
11にてスイッチSW2がオフし、スイッチSW1がオ
ンすることにより定電圧源E1が行電極に供給される。
次に時刻t12にてスイッチSW1がオフ、スイッチS
W3がオンすることにより、定電圧源E1は切り離され
て出力O1の正電圧はダイオードD4、D2、コイルL
2、スイッチSW3を通じて電荷回収用コンデンサC1
に放電され、PDPの蓄積電荷が放電される。そして、
時刻t13にてスイッチSW3がオフし、スイッチSW
4がオンすることによりPDPの電極容量の残留電荷を
放電させ行電極はアース電位となる。この期間t12−
t13においても、コイルL2と、PDPの電極容量に
よる共振により緩やかな立ち下がりパルスが得られる。
以上の動作を繰り返すことにより、所定個数の維持パル
スが発生する。
Next, when the scanning period ends, the operation moves to the sustain period. In this maintenance period, first, at time t9, the switch SW
6, SW7 is turned off, and switches SW8, SW9 are turned on. At this time, since the switch SW4 is on, the row electrode is at the ground potential. Next, at time t10, the switch SW4 is turned off and the switch SW2 is turned on, so that the charge of the charge collection capacitor C1 is transferred to the coil L.
1, diode D1, switch SW8, diode D3
To the row electrode of the PDP connected to the output O1 through the gate, and charges the row electrode group. At this time, the coil L1
And a pulse having a gradual rise is obtained by resonance due to the electrode capacitance of the PDP. After charging the electrode capacity, time t
When the switch SW2 is turned off and the switch SW1 is turned on at 11, the constant voltage source E1 is supplied to the row electrode.
Next, at time t12, the switch SW1 is turned off and the switch S
When W3 is turned on, the constant voltage source E1 is disconnected, and the positive voltage of the output O1 is changed to the diodes D4 and D2 and the coil L
2. Charge recovery capacitor C1 through switch SW3
To discharge the accumulated charge of the PDP. And
At time t13, the switch SW3 turns off and the switch SW
When 4 is turned on, the residual charge of the electrode capacitance of the PDP is discharged, and the row electrode becomes the ground potential. This period t12−
Also at t13, a gentle falling pulse is obtained by resonance due to the coil L2 and the electrode capacitance of the PDP.
By repeating the above operation, a predetermined number of sustain pulses are generated.

【0008】[0008]

【発明が解決しようとする課題】このような駆動装置に
おいて、走査パルスの立ち上がりと立ち下がり時に波形
のエッジが急峻となり、高周波ノイズ等が周辺に発生し
やすくなる。この高周波ノイズによって電磁波障害等が
生じ、駆動装置の動作が不安定となる。
In such a driving apparatus, the edge of the waveform becomes sharp at the rise and fall of the scanning pulse, and high frequency noise and the like are easily generated in the periphery. This high-frequency noise causes electromagnetic interference and the like, and the operation of the driving device becomes unstable.

【0009】本発明は、上記の事情に鑑みてなされたも
ので、PDPの電極容量と駆動装置に設けたコイルの共
振特性を利用して高周波ノイズの発生防止、システムの
安定を図り、スイッチング駆動時の消費電力を軽減する
ことができるPDPの駆動装置を提供することを目的と
する。
The present invention has been made in view of the above circumstances, and uses the electrode capacitance of a PDP and the resonance characteristics of a coil provided in a driving device to prevent the occurrence of high-frequency noise, stabilize the system, and perform switching drive. It is an object of the present invention to provide a PDP driving device capable of reducing power consumption at the time.

【0010】[0010]

【課題を解決するための手段】本発明による請求項1記
載の発明は、プラズマディスプレイパネルの複数の行電
極に対して時系列的に走査パルスを供給するプラズマデ
ィスプレイパネルの駆動装置において、走査パルスの立
ち上がり時及び/又は立ち下がり時に駆動する駆動手段
を備え、駆動手段はコイルを含み、該コイルとプラズマ
ディスプレイパネルの容量による共振によって走査パル
スを立ち上がり及び/又は立ち下がるようにしたことを
特徴とする。
According to a first aspect of the present invention, there is provided a driving apparatus for a plasma display panel for supplying a scanning pulse to a plurality of row electrodes of a plasma display panel in a time-series manner. And driving means for driving at the time of rising and / or falling of the scanning pulse. The driving means includes a coil, and the scanning pulse rises and / or falls by resonance caused by the coil and the capacitance of the plasma display panel. I do.

【0011】また、請求項2に記載の発明は、請求項1
に記載のプラズマディスプレイパネルの駆動装置であっ
て、駆動手段は、維持パルスを発生するための維持パル
ス発生手段に含まれる該維持パルスの立ち上がり時及び
/又は立ち下がり時に駆動する手段を兼用したことを特
徴とする。
The invention described in claim 2 is the first invention.
5. The driving device for a plasma display panel according to item 1, wherein the driving unit also serves as a unit for driving at the time of rising and / or falling of the sustain pulse included in the sustain pulse generating unit for generating the sustain pulse. It is characterized by.

【0012】[0012]

【作用】本発明によれば、PDPの電極容量と駆動装置
に設けたコイルの共振特性を利用して高周波ノイズの発
生防止、システムの安定を図り、スイッチ駆動時の消費
電力を軽減することができる。
According to the present invention, it is possible to prevent the occurrence of high-frequency noise, stabilize the system, and reduce the power consumption at the time of driving the switch by utilizing the electrode capacitance of the PDP and the resonance characteristics of the coil provided in the driving device. it can.

【0013】[0013]

【発明の実施の形態】本発明においても、その一実施形
態による駆動装置は図1と同様である。以下、動作を図
2とともに説明する。時刻t1−t3のリセット期間
は、図3とともに説明した動作と同様であり、リセット
パルスの印加によりすべての行電極対間に放電が生じ、
各画素セル内において荷電粒子が発生し、その放電終息
後に壁電荷が蓄積形成される。なお、リセットパルスは
緩やかに立ち上がる波形を有する。これにより、行電極
に現れる電位変化が緩やかな立ち上がり波形を有すると
ともに、セルを流れる放電電流が少ないことによって、
セル内では緩やかに小量の電流が流れるのみで画素セル
内の放電エネルギー量が抑制される。従って、リセット
パルスの印加による放電発光の輝度は低減されて低くな
り、PDPにおけるコントラストを改善できる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a driving device according to one embodiment is the same as that in FIG. Hereinafter, the operation will be described with reference to FIG. The reset period from time t1 to t3 is the same as the operation described with reference to FIG. 3, and discharge is generated between all the row electrode pairs by applying the reset pulse.
Charged particles are generated in each pixel cell, and wall charges are accumulated and formed after the discharge ends. The reset pulse has a slowly rising waveform. Thereby, while the potential change appearing on the row electrode has a gentle rising waveform and the discharge current flowing through the cell is small,
Only a small amount of current flows gently in the cell, thereby suppressing the amount of discharge energy in the pixel cell. Therefore, the brightness of the discharge light emission due to the application of the reset pulse is reduced and lowered, and the contrast in the PDP can be improved.

【0014】走査期間において、時刻t3−t4の期間
は図3と同様にスイッチSW7がオンとなって行電極は
アース電位に維持される。次に、時刻t4に到ると、ス
イッチSW8とSW9がオンになり、スイッチSW7が
オフになるとともに、スイッチSW2がオンする。これ
により、これにより、電荷回収用コンデンサC1の電荷
がコイルL1、ダイオードD1、スイッチSW8を通じ
て出力O1に行電極に供給され、行電極間に電荷が充電
される。このとき維持パルス発生時と同様にコイルL1
とPDPの電極容量による共振により立ち上がりの緩や
かなパルスが得られる、走査パルスの立ち上がり及び立
ち下がり部分がLCの共振特性により傾斜の緩やかな波
形となっている。
In the scanning period, the switch SW7 is turned on during the period from time t3 to t4 as in FIG. 3, and the row electrode is maintained at the ground potential. Next, at time t4, the switches SW8 and SW9 are turned on, the switch SW7 is turned off, and the switch SW2 is turned on. Thereby, the electric charge of the electric charge recovery capacitor C1 is supplied to the output O1 through the coil L1, the diode D1, and the switch SW8 to the row electrode, and the electric charge is charged between the row electrodes. At this time, the coil L1
A pulse having a gentle rise is obtained by resonance due to the electrode capacitance of the PDP, and the rising and falling portions of the scan pulse have a gentle slope waveform due to the resonance characteristics of the LC.

【0015】つまり、時刻t4に到ると、従来ではスイ
ッチSW6をオンにし、SW7をオフにしてプライミン
グパルスを急峻に立ち上がらせていたが、本発明におい
ては、スイッチSW6とSW7をオフにし、スイッチS
W8とSW9をオンにし、さらにスイッチSW2をオン
にすることにより、LCの共振によって立ち上げる。
That is, at time t4, conventionally, the switch SW6 is turned on and the switch SW7 is turned off to make the priming pulse rise steeply. However, in the present invention, the switches SW6 and SW7 are turned off and the switch is turned off. S
By turning on W8 and SW9, and further turning on the switch SW2, it starts up by LC resonance.

【0016】次に、プライミングパルスが所定電圧まで
立ち上がると、図3の動作と同様に時刻t5にてスイッ
チSW8、SW9をオフにし、スイッチSW6をオンに
して定電圧源E3から正電圧を供給する。また、時刻t
6に到ると、スイッチSW6をオフ、SW7をオンにし
て行電圧をアース電位とし、時刻t7にてスイッチSW
6をオン、SW7をオフして再び正電圧を発生させ、走
査パルスを生成する。
Next, when the priming pulse rises to a predetermined voltage, the switches SW8 and SW9 are turned off and the switch SW6 is turned on at time t5 to supply a positive voltage from the constant voltage source E3 as in the operation of FIG. . Time t
6, the switch SW6 is turned off and the switch SW7 is turned on to set the row voltage to the ground potential. At time t7, the switch SW6 is turned off.
6 is turned on, SW7 is turned off, and a positive voltage is generated again to generate a scanning pulse.

【0017】次に、時刻t8に到ると、スイッチSW
8、SW9をオンにし、スイッチSW6をオフにし(こ
のときスイッチSW7はオフとなっている)、スイッチ
SW3をオンにする。これにより、定電圧源E3は切り
離されて出力O1の正電圧はダイオードD4、スイッチ
SW9、ダイオードD2、コイルL2、スイッチSW3
を通じて電荷回収用コンデンサC1に放電され、PDP
の蓄積電荷が放電される。つまり、維持パルス発生時と
同様にコイルL2とPDPの電極容量による共振により
立ち下がり波形が得られる。そして、時刻t9にてスイ
ッチSW3がオフし、スイッチSW4がオンすることに
より行電極はアース電位となる。このように、走査パル
スの立ち上がりと立ち下がり時においても、高調波成分
が低減された波形となるため、不要な電磁波の放射が低
減され、高調波による消費電力の増加も抑えることがで
きる。
Next, at time t8, the switch SW
8, the switch SW9 is turned on, the switch SW6 is turned off (the switch SW7 is turned off at this time), and the switch SW3 is turned on. As a result, the constant voltage source E3 is disconnected, and the positive voltage of the output O1 is changed to the diode D4, the switch SW9, the diode D2, the coil L2, and the switch SW3.
Through the charge recovery capacitor C1 through the PDP
Is discharged. That is, a falling waveform is obtained by resonance due to the capacitance of the coil L2 and the electrode capacitance of the PDP as in the case of the generation of the sustain pulse. Then, at time t9, the switch SW3 is turned off and the switch SW4 is turned on, so that the row electrode becomes the ground potential. As described above, even when the scanning pulse rises and falls, the waveform has a reduced harmonic component, so that unnecessary radiation of electromagnetic waves is reduced and an increase in power consumption due to the harmonics can be suppressed.

【0018】図2のタイミングチャートにおいて、走査
期間においては、各行毎の画素データに対応した画素デ
ータパルスを順次列電極に印加し(図示せず)、この各
画素データパルスの印加タイミングに同期して走査パル
スを行電極に印加していく。この際、画素データパルス
と走査パルスがそれぞれ列電極と行電極に同時に印加さ
れた画素セルにのみ放電が生じて、リセット期間で形成
された壁電荷の大半が消滅する。一方、走査パルスが印
加されたものの画素データパルスが印加されない画素セ
ルにおいては放電が生じないので、壁電荷はそのまま残
留する。つまり、リセット期間で形成された壁電荷は、
画素データの内容に応じて選択的に消去される。
In the timing chart of FIG. 2, during the scanning period, pixel data pulses corresponding to the pixel data of each row are sequentially applied to the column electrodes (not shown), and are synchronized with the application timing of each pixel data pulse. The scanning pulse is applied to the row electrodes. At this time, discharge occurs only in the pixel cells to which the pixel data pulse and the scan pulse are simultaneously applied to the column electrode and the row electrode, respectively, and most of the wall charges formed in the reset period disappear. On the other hand, no discharge occurs in the pixel cells to which the scan pulse is applied but the pixel data pulse is not applied, so that the wall charges remain. That is, the wall charges formed during the reset period are:
It is selectively erased according to the contents of the pixel data.

【0019】次に、時刻t9以降の維持期間に移ると、
維持放電期間に移行し、図3とともに説明した動作と同
様の動作にて所定個数の維持パルスが発生する。すなわ
ち、維持パルスが連続して印加されている期間にわたり
壁電荷が残留したままになっている画素セルのみが放電
発光を維持する。なお、各スイッチの駆動動作はコント
ローラ(図示せず)によって制御される。
Next, when the operation proceeds to the maintenance period after time t9,
In the sustain discharge period, a predetermined number of sustain pulses are generated by the same operation as that described with reference to FIG. That is, only the pixel cells in which the wall charges remain during the period in which the sustain pulse is continuously applied maintain the discharge light emission. The driving operation of each switch is controlled by a controller (not shown).

【0020】上述した実施形態において、走査期間中の
時刻t6−t7の期間に発生する走査パルスに対して
も、時刻t4−t5あるいは時刻t8−t9の期間にお
けるスイッチ動作と同様の動作によって立ち上がりと立
ち下がりの緩やかな波形としてもよい。また、走査期間
に発生するパルスの立ち上がり時のみあるいは立ち下が
り時のみスイッチSW2、SW3を合むスイッチ動作に
よって緩やかな波形としてもよい。
In the above-described embodiment, the rising edge of the scanning pulse generated during the period from the time t6 to the time t7 during the scanning period is the same as the switching operation during the period from the time t4 to the time t5 or the time t8 to the time t9. The waveform may have a gentle fall. Alternatively, a gentle waveform may be obtained by a switch operation including the switches SW2 and SW3 only at the time of rising or falling of the pulse generated during the scanning period.

【0021】また、この実施形態では、走査パルスの立
ち上がり時と立ち下がり時の波形発生回路として、維持
パルスを発生するための第1パルス発生回路1のコイル
L1、L2を含む回路を兼用したが、この第1パルス発
生回路とは別の独立した駆動回路を設けてもよい。さら
に、アース電位を設定するスイッチとしてSW4を各動
作期間において兼用したが、それぞれの期間毎に設ける
ようにしてもよい。
In this embodiment, the circuit including the coils L1 and L2 of the first pulse generation circuit 1 for generating the sustain pulse is also used as the waveform generation circuit at the time of the rising and falling of the scanning pulse. Alternatively, an independent drive circuit different from the first pulse generation circuit may be provided. Further, the switch SW4 is also used as a switch for setting the ground potential in each operation period, but may be provided for each period.

【0022】[0022]

【発明の効果】上述したように、本発明によれば、高周
波ノイズの発生防止、システムの安定が図られ、スイッ
チ駆動時の消費電力の軽減等の効果が得られる。
As described above, according to the present invention, it is possible to prevent the occurrence of high-frequency noise, stabilize the system, and reduce the power consumption when driving the switch.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態によるPDPの駆動回路を
示す図である。
FIG. 1 is a diagram illustrating a driving circuit of a PDP according to an embodiment of the present invention.

【図2】本発明の一実施形態によるPDPの駆動波形を
示す図である。
FIG. 2 is a diagram illustrating a driving waveform of a PDP according to an embodiment of the present invention.

【図3】本発明の一実施形態によるPDPの駆動波形を
示す図である。
FIG. 3 is a diagram illustrating a driving waveform of a PDP according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・第1パルス発生回路 2・・・・・第2パルス発生回路 3・・・・・第3パルス発生回路 E1〜E3・・・・・定電圧源 D1〜D4・・・・・ダイオード L1〜L2・・・・・コイル C1・・・・電荷回収用コンデンサ SW1〜SW9・・・・・スイッチ O1・・・・・出力 1 first pulse generation circuit 2 second pulse generation circuit 3 third pulse generation circuit E1 to E3 constant voltage sources D1 to D4 ··· Diodes L1 and L2 ··· Coil C1 ··· Charge recovery capacitors SW1 and SW9 ··· Switch O1 ···· Output

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成10年2月2日[Submission date] February 2, 1998

【手続補正1】[Procedure amendment 1]

【補正対象書類名】図面[Document name to be amended] Drawing

【補正対象項目名】図3[Correction target item name] Figure 3

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図3】 FIG. 3

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 プラズマディスプレイパネルの複数の行
電極に対して時系列的に走査パルスを供給するプラズマ
ディスプレイパネルの駆動装置において、 前記走査パルスの立ち上がり時及び/又は立ち下がり時
に駆動する駆動手段を備え、 前記駆動手段はコイルを合み、該コイルとプラズマディ
スプレイパネルの容量による共振によって走査パルスを
立ち上がり及び/又は立ち下がるようにしたことを特徴
とするプラズマディスプレイパネルの駆動装置。
1. A driving apparatus for a plasma display panel for supplying a scanning pulse to a plurality of row electrodes of a plasma display panel in a time series manner, wherein a driving means for driving at the time of rising and / or falling of the scanning pulse is provided. A driving apparatus for driving a plasma display panel, wherein the driving unit includes a coil, and the scanning pulse rises and / or falls by resonance caused by the coil and the capacitance of the plasma display panel.
【請求項2】 前記駆動手段は、維持パルスを発生する
ための維持パルス発生手段に含まれる該維持パルスの立
ち上がり時及び/又は立ち下がり時に駆動する手段を兼
用したことを特徴とする請求項1に記載のプラズマディ
スプレイパネルの駆動装置。
2. The driving device according to claim 1, wherein the driving unit also serves as a driving unit included in the sustain pulse generating unit for generating the sustain pulse and driving when the sustain pulse rises and / or falls. 3. The driving device for a plasma display panel according to claim 1.
JP9220850A 1997-08-01 1997-08-01 Driving device for plasma display panel Withdrawn JPH1152908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9220850A JPH1152908A (en) 1997-08-01 1997-08-01 Driving device for plasma display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9220850A JPH1152908A (en) 1997-08-01 1997-08-01 Driving device for plasma display panel

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2005028642A Division JP3930887B2 (en) 2005-02-04 2005-02-04 Driving device for plasma display panel

Publications (1)

Publication Number Publication Date
JPH1152908A true JPH1152908A (en) 1999-02-26

Family

ID=16757530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9220850A Withdrawn JPH1152908A (en) 1997-08-01 1997-08-01 Driving device for plasma display panel

Country Status (1)

Country Link
JP (1) JPH1152908A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
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JP2005043413A (en) * 2003-07-22 2005-02-17 Pioneer Electronic Corp Driving method of display panel
JP2005070794A (en) * 2003-08-27 2005-03-17 Lg Electronics Inc Method and apparatus for driving plasma display panel
KR100503806B1 (en) * 2003-08-06 2005-07-26 삼성전자주식회사 Plasma display panel sustain driver for decreasing flywheel current
JP2006079103A (en) * 2004-09-10 2006-03-23 Lg Electronics Inc Plasma display apparatus and driving method thereof
CN100437698C (en) * 2005-07-13 2008-11-26 Lg电子株式会社 Driving method of plasma display apparatus
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US7705807B2 (en) 1998-09-04 2010-04-27 Panasonic Corporation Plasma display panel driving method and plasma display panel apparatus capable of displaying high-quality images with high luminous efficiency
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US7701418B2 (en) 1998-09-04 2010-04-20 Panasonic Corporation Plasma display panel driving method and plasma display panel apparatus capable of displaying high-quality images with high luminous efficiency
US7649511B2 (en) 1998-09-04 2010-01-19 Panasonic Corporation Plasma display panel driving method and plasma display panel apparatus capable of displaying high-quality images with high luminous efficiency
KR20010094930A (en) * 2000-03-31 2001-11-03 아끼구사 나오유끼 Display apparatus with reduced noise emission and driving method for the display apparatus
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