JPH1141527A - Driving method for solid-state image pickup element, electronic iris control circuit and camera using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method for a solid-state image pickup element in which a desired electronic shutter speed is realized independently of a system clock rate. SOLUTION: A shutter pulse generating circuit 17 in an electronic iris control circuit 19 generates a shutter pulse for each horizontal period based on a detected output, a read pulse generating circuit 19 usually generates a read pulse in a timing within a prescribed horizontal period of a vertical blanking period, and under prescribed mode, the read pulse generation timing is changed for a period of, e.g. a master clock within one horizontal period.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for driving a solid-state image sensor, an electronic iris control circuit, and a camera using the same.

[0002]

2. Description of the Related Art A solid-state imaging device such as a CCD (Charge Co.)
In a solid-state imaging device of the upled device type, the exposure time is generally controlled using a so-called electronic shutter. This electronic shutter sweeps out signal charges accumulated by photoelectric conversion for each pixel to, for example, a semiconductor substrate, so that a charge accumulation time in a field period,
That is, the exposure time is controlled.

In this electronic shutter operation, a shutter pulse having a high potential is applied to the substrate voltage Vsub as a charge discharging pulse for an operation of sweeping out signal charges to the semiconductor substrate. In order to avoid noise on the video signal due to the application of this high potential shutter pulse,
The shutter pulse is generated only during the horizontal blanking period that does not appear on the screen.

Here, the exposure time is the last of the shutter pulses generated in a 1H (H is a horizontal period) cycle after the generation of a read pulse for reading the signal charges accumulated for each pixel to the charge transfer section. This is a period from the time when the shutter pulse is generated to the time when the next read pulse is generated. By changing the exposure time, it is possible to change the output signal from the CCD solid-state image sensor according to the brightness, and therefore, it can be applied as an electronic iris control in a camera using the CCD solid-state image sensor as an imaging device. Is possible.

[0005] This electronic iris does not require an iris function using a lens, so that a camera can be realized at low cost. Therefore, it is an essential function for a low-priced camera. However, in the case of the electronic iris control, as described above, since there is a restriction that the shutter pulse must be generated only within the horizontal blanking period, the step of changing the exposure time is 1H unit.

On the other hand, when a very bright subject such as one using a high-speed electronic shutter is imaged, the amount of change in brightness as a control using an electronic iris becomes large. That is, in the timing chart of FIG. 6, assuming that the exposure time is (a), the brightness change amount is [(a) ± 1H].
/ (A), the smaller the exposure time (a), the larger the ratio of 1H to the exposure time (a).

In electronic iris control, control is performed to converge to an expected value corresponding to a target brightness by raising and lowering the exposure time (a). The control dead zone is set by the size (width),
The phenomenon in which the control amount vibrates up and down with respect to the expected value and does not stop, that is, so-called hunting is prevented.

However, increasing the width of the control dead zone results in lowering the convergence accuracy. Conversely, in a system in which the dead band width is determined, it is necessary to suppress the amount of change in brightness so as not to cause hunting. This causes the high-speed electronic shutter to fail. That is,
This leads to the inability to extend the dynamic range of the electronic iris.

FIG. 7 shows a change in brightness by electronic iris control when an electronic shutter is used. In the example shown in the drawing, the luminance changes by 200% in the case of 1H exposure. Also, in the electronic iris control, as a result of adjusting the dead zone width in consideration of the hunting described above to the maximum brightness change amount, in addition to the problem of lowering the convergence accuracy, the reason why a fine brightness change amount is required is no longer necessary. There is one.

It is said that the amount of change in brightness that is practical for electronic iris control is less than 20%. The reason for this is that if the amount of change in brightness caused by the control is greater than this value, the change in luminance of the screen will be too large and the image will look unnatural. In this sense,
In an electronic iris using an electronic shutter, it is necessary to keep the amount of change in brightness small.

As a conventional technique for solving the above-mentioned problem,
A technique of finely changing the change of the shutter pulse within the vertical blanking period has already been proposed (see Japanese Patent Application Laid-Open No. 6-62323). In this prior art, a shutter pulse is normally generated within a horizontal blanking period so that noise caused by the shutter pulse does not appear on a video signal. No) is also used to generate a shutter pulse.

Then, in this vertical blanking period,
As shown in the timing chart of FIG. 8, the shutter pulse can be finely adjusted (period X). In particular, in a high-speed electronic shutter operation in which the amount of change in brightness is large, the timing at which the shutter pulse changes is
Since the timing enters the vertical blanking period, the shutter pulse can be finely changed in order to reduce the amount of change in brightness during the vertical blanking period by using this fact.

Therefore, even if the exposure time (a) of the high-speed shutter is sufficiently small, the change timing of the shutter pulse can also be made sufficiently small (interval Δt) within the vertical blanking period. )
−Δt] / (a).

[0014]

However, even in this prior art, the amount of change in brightness between the shutter pulse and the shutter pulse which does not take the vertical blanking period is [(a)-
1H] / (a), which is a large change in brightness. At present, this value is a brightness change amount of approximately 20%, and the speed is controlled by this value. That is, the iris dynamic range cannot be further expanded.

Further, when this conventional technique is applied to a digital still camera, since there is no standard such as NTSC or PAL, the system clock rate is often reduced in consideration of low power consumption. In this case, since the time of one horizontal period in the electronic iris control becomes longer according to the system clock rate, the amount of change in brightness also becomes coarse in proportion to this.

Since it is not a standard such as NTSC or PAL,
Although it is possible to suppress the increase in the amount of change in brightness by changing the shutter pulse even during the horizontal effective period, the disadvantage is that it cannot be used in standards such as NTSC and PAL. In other words, it is difficult to obtain a degree of freedom for the system clock.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of driving a solid-state imaging device capable of realizing a desired electronic shutter speed without depending on a system clock rate. Is to do.

Another object of the present invention is to provide an electronic iris control circuit and a camera capable of further expanding the iris dynamic range and realizing a desired electronic shutter speed without depending on the system clock rate.

[0019]

A method of driving a solid-state imaging device according to the present invention is a method of driving a solid-state imaging device that controls the amount of charge stored in a plurality of photoelectric conversion elements by changing the charge storage time. The charge accumulation time is controlled by changing the read timing of signal charges from the plurality of photoelectric conversion elements within one horizontal period.

In controlling the charge storage time of the solid-state image pickup device, that is, the exposure time, a shutter pulse for sweeping out the signal charges stored in each photoelectric conversion device to, for example, a semiconductor substrate is generated in a cycle of one horizontal period. The period from the generation of the shutter pulse to the generation of the next read pulse is the exposure time. If this is referred to as coarse adjustment of the exposure time, changing the read timing of the signal charge, that is, the generation timing of the read pulse within one horizontal period corresponds to fine adjustment.

In other words, when the step of changing the exposure time is a coarse adjustment, it is performed every horizontal period, whereas when the adjustment is fine, an arbitrary period shorter than one horizontal period (for example, a master clock (system clock) ) Period). Thus, even when the time of one horizontal period depends on the master clock rate, a desired electronic shutter speed can be set without depending on the master clock rate.

An electronic iris control circuit according to the present invention is an electronic iris control circuit for controlling an exposure time by adjusting an interval between a charge discharging pulse and a charge reading pulse applied to a solid-state image sensor. A detection circuit for detecting an output signal; a first pulse generation circuit for generating a charge discharge pulse every horizontal period based on a detection output of the detection circuit; and a charge readout within a predetermined horizontal period of a vertical blanking period Generates a pulse,
In the predetermined mode, a second pulse generation circuit for changing the generation timing of the charge readout pulse within one horizontal period is provided. A camera according to the present invention includes the electronic iris control circuit.

In the electronic iris control circuit having the above-described configuration and a camera including the same, a shutter pulse (charge discharging pulse) for sweeping out signal charges accumulated in each photoelectric conversion element of the solid-state image pickup device to, for example, a semiconductor substrate is used. 1
Is generated every horizontal period from the pulse generation circuit. Then, a period from the generation of the last shutter pulse to the generation of the next read pulse (charge read pulse) generated by the second pulse generation circuit is the exposure time.

In a predetermined mode, the second pulse generation circuit changes the generation timing of the read pulse within one horizontal period. Since the change is within one horizontal period, the period of the change is naturally shorter than one horizontal period (for example, the period of the master clock). Therefore, 1
If the adjustment in the cycle of the horizontal period is made a coarse adjustment, the adjustment in one horizontal period will be a fine adjustment. Thus, exposure time control within one horizontal period can be realized at any electronic shutter speed. Further, the amount of change in brightness can be suppressed even at the time of a high-speed electronic shutter.

[0025]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, incident light from a subject is imaged on an imaging surface of a CCD solid-state imaging device 2 by an optical system including a lens 1. The CCD solid-state imaging device 2 converts a signal charge accumulated in each pixel (photoelectric conversion device) by photoelectric conversion into a high-potential shutter pulse (charge discharge pulse) X
When SUB is applied to the substrate voltage Vsub, for example, the signal is swept out to the semiconductor substrate, and when the read pulse XSG is applied to the read gate unit (not shown), the signal charges of each pixel are transferred to the vertical charge transfer unit (FIG. (Not shown). After the read signal charges are vertically and horizontally transferred, they are converted into electric signals and output.

The output signal of the CCD solid-state imaging device 2 is sampled and held by a sample-and-hold (S / H) circuit 3 and automatically gain-controlled by an AGC (Automatic Gain Control) circuit 4. The signal is digitized by an A / D converter 5 and supplied to a DSP (Digital Signal Processor) circuit 6. In the DSP circuit 6, various kinds of signal processing are digitally performed on an input signal. Then, it is output as a digital video signal.

The system further includes a master clock generator 7 for generating a master clock MCK having a frequency, for example, 1820 times the horizontal scanning frequency (15.734 kHz). The master clock MCK generated by the master clock generator 7 is provided to the timing generation circuit 8. The timing generation circuit 8 generates a vertical synchronizing signal VD and a horizontal synchronizing signal HD based on the master clock MCK, and further generates various timing signals for driving the CCD solid-state imaging device 2.

The output signal of the sample and hold circuit 3 is further supplied to an electronic iris control circuit 9. In the electronic iris control circuit 9, the detection circuit 10 integrates the video signal output from the sample and hold circuit 3 and outputs a DC voltage according to the video signal level. The detection output of the detection circuit 10 corresponds to the screen brightness (luminance) corresponding to the video signal level at the output of the sample hold circuit 3. The detection output of the detection circuit 10 becomes the non-inverting (+) input of the comparator 11 and the inverting (-) input of the comparator 12.

The comparator 11 receives the reference voltage V1 as an inverting input, and generates a high-level output when the detection output of the detection circuit 10 is higher than the reference voltage V1. The comparator 12 receives the reference voltage V2 (V1> V2) as a non-inverting input, and generates a high-level output when the detection output of the detection circuit 10 is lower than the reference voltage V2. Here, the reference voltage V
1, V2 respectively correspond to an upper limit value and a lower limit value of a dead zone described later. Therefore, the comparator 11,
When both outputs a low level output, it means that the detection output of the detection circuit 10, that is, the brightness of the screen is within the dead band width.

Each comparison result of the comparators 11 and 12 is given to the decoder 13. The decoder 13 outputs an addition command signal or a subtraction command signal based on the comparison results of the comparators 11 and 12. Specifically, when the comparison result of the comparator 11 is at a high level, the detection output of the detection circuit 10 is out of the dead zone and the screen is bright, so that the decoder 13 outputs an addition command signal.
This leads to an increase in the electronic shutter speed.

When the comparison result of the comparator 12 is at a high level, the detection output of the detection circuit 10 deviates from the dead zone to the lower side and the screen is in a dark state.
Outputs a subtraction command signal. This leads to a reduction in shutter speed. And comparator 1
When both of the comparison results 1 and 12 are at a low level, since the screen is within a detection output dead band width of the detection circuit 10 and the screen has a desired brightness, the decoder 13 outputs both the addition command signal and the subtraction command signal. Do not output.

The addition / subtraction command signal output from decoder 13 is applied to count value designating circuit 14. The count value designating circuit 14 stores a pulse count value for determining the electronic shutter speed, and increases / decreases the count value in accordance with an addition / subtraction command signal from the decoder 13. Then, the count value is counted by the counter 15.
Given to.

When a read pulse XSG, which will be described later, is generated, the clock generation circuit 16 receives the horizontal synchronizing signal HD generated by the timing generation circuit 8 and outputs the clock signal at 15.734 kHz.
A clock pulse CLK of z is generated. This clock pulse CLK is supplied to the counter 15 and also to the shutter pulse generation circuit 17. The counter 15 starts counting the clock pulse CLK supplied from the clock generating circuit 16 when the count content is cleared by the read pulse XSG, and resets when the pulse count value specified by the count value specifying circuit 14 is reached. Generate a signal.

The shutter pulse generating circuit 17 is set when it receives the read pulse XSG, and is reset by a reset signal output from the counter 15. During the period of the set state, the passage of the clock pulse CLK of 15.734 kHz supplied from the clock generation circuit 16 is permitted, and the passage of the pulse is prohibited during the reset state. The clock pulse CLK of 15.734 kHz that has passed through the shutter pulse generation circuit 17 is superimposed on the substrate voltage Vsub as a shutter pulse XSUB and applied to the CCD solid-state imaging device 2.

The detection output of the detection circuit 10 is further supplied to a change amount detection circuit 18. This change amount detection circuit 18
Detects the change in brightness from the difference between the previous detection output and the current detection output during electronic iris control, and when this brightness change exceeds a certain set value, reads out a detection signal indicating that fact and reads a pulse. The signal is given to the generation circuit 19.

When the detection signal is not supplied from the change amount detection circuit 18, the read pulse generation circuit 19 synchronizes with the vertical synchronization signal VD at a certain timing within a certain 1H (one horizontal period) in the vertical blanking period. When the read pulse XSG is generated and a detection signal is given from the change amount detection circuit 18, the generation timing of the read pulse XSG is changed within 1H, for example, at the cycle of the master clock MCK. This read pulse XSG is CC
The signal is applied to a read gate unit (not shown) of the D solid-state imaging device 2.

Here, the circuit operation of the electronic iris control circuit 9 having the above configuration will be described with reference to the explanatory diagram of the dead zone in FIG.

When the output voltage of the detection circuit 10 is higher than the reference voltage V 1, that is, when the screen is too bright, the decoder 13 responds to the high level output of the comparator 11 to count A command (addition command) for increasing the value (count value to be counted by the counter 15) is issued. When the output voltage of the detection circuit 10 is lower than the reference voltage V2, that is, when the screen is too dark, the decoder 13 responds to the high-level output of the comparator 12 and sends the pulse count value to the count value designation circuit 14. Is issued (subtraction command).

In FIG. 2, reference voltage V1 and reference voltage V
2 is a dead zone, and when the output voltage of the detection circuit 10 is within this dead zone, the decoder 13 does not issue any instruction of addition or subtraction to the count value designating circuit 14. By providing this dead zone, hunting can be prevented. That is, if the width of the dead zone is wider than the voltage fluctuation of the DC level of the output signal of the CCD solid-state imaging device 2 corresponding to the unit time in which the exposure time can be changed, hunting can be prevented.

Therefore, it can be said that the larger the width of the dead zone, the greater the effect of preventing hunting. However, if the width of the dead zone is widened, the control sensitivity of the electronic iris control is deteriorated. That is, although the center value of the dead zone is preferable as the target value to be converged, the control becomes impossible when the target value falls within the dead zone. That can happen. For this reason, it is preferable that the width of the dead zone be as narrow as possible on the assumption that hunting can be prevented, because control sensitivity can be increased.

When the read pulse XSG is generated, the clock generating circuit 16 receives the horizontal synchronizing signal HD generated by the timing generating circuit 8 and generates a clock pulse CLK of 15.734 kHz. This clock pulse CL
K is counted by the counter 15. The counting operation of the counter 15 is started when the read pulse XSG is received, and the value to be counted is specified by the count value specifying circuit 14. The charge accumulation time (exposure time) becomes shorter as the designated count value becomes larger, and the charge accumulation time becomes longer as the designated count value becomes smaller.

By the way, the shutter pulse generating circuit 17
Is set in response to the read pulse XSG to allow the clock pulse CLK from the clock generation circuit 16 to pass therethrough, and the CCD is used as the shutter pulse XSUB.
It is supplied to the solid-state imaging device 2. Further, when receiving the reset signal from the counter 15, the reset state is set and the passage of the clock pulse CLK is prohibited, and this prohibited state continues until the next read pulse XSG arrives. This prohibition period is the charge accumulation time, that is, the exposure time.

According to the electronic iris control circuit 9, when the screen is too bright, the count value of the counter 15 increases, and as a result, the exposure time becomes longer. Control is performed such that the value decreases, and as a result, the exposure time becomes longer. That is, the iris control is performed so that the output level of the CCD solid-state imaging device 2 is always constant, that is, within the dead zone.

In the electronic iris control circuit 9, the read pulse generation circuit 19 includes the change amount detection circuit 1.
Until the amount of change in the brightness of the screen reaches a certain set value based on the detection output of No. 8, a read pulse XSG is generated at a certain timing within a certain 1H in the vertical blanking period in synchronization with the vertical synchronization signal VD, When the amount of change in screen brightness exceeds a certain set value, the generation timing of the read pulse XSG is set to the master clock MCK within 1H.
In a cycle of

Thus, the generation timing of the read pulse XSG is fixed until the amount of change in screen brightness reaches a certain set value.
Since SUB occurs at 1H intervals, the step of changing the exposure time is every 1H. On the other hand, when the amount of change in screen brightness exceeds a certain set value, the shutter pulse XS
UB occurs at 1H intervals, whereas read pulse X
When the generation timing of SG is within 1H and the master clock MC
Since it changes at the cycle of K, the step of changing the exposure time is the cycle of the master clock MCK.

That is, in the control region where the amount of change in screen brightness exceeds a certain set value, the step of changing the exposure time is a coarse adjustment every 1H, and the step of changing the exposure time is the cycle of the master clock MCK, ie, the period of the master clock MCK. 1H (15.734 kHz
It is possible to realize fine adjustment with a period of 1/1820 of z). By the combination of the coarse adjustment and the fine adjustment, the control of the exposure time within 1H can be realized at any electronic shutter speed.

Therefore, the detection threshold value of the change amount detection circuit 18 is set in the high-speed electronic shutter area, and as shown in the timing chart of FIG. 3, the read pulse XSG is changed at the cycle (step) of the master clock MCK. By realizing the exposure time difference Δt, the amount of change in brightness, that is, [(a) ± Δt] / (a) can be suppressed even at the time of a high-speed electronic shutter. Here, (a) is the exposure time.

The same amount of change in brightness can be realized from any electronic shutter speed, and the amount of change in iris control can be made the same from any brightness. FIG. 4 shows a timing chart when the brightness change amount is 10%.
In the figure, (A) shows the case of 10H exposure, and (B) shows the case of 1H exposure.

In the case of 10H exposure (A), the exposure time is set to 1
By changing the brightness in steps of H, a brightness change amount of 10% [= (10H-9H) / 10H] is realized and 1H
In the case of exposure (B), a brightness change amount of 10% [= (1H-0.9H) / 1H] is realized by changing the exposure time in steps of the master clock MCK within 1H.

In particular, in the high-speed electronic shutter operation in which the amount of change in brightness becomes large, in the case of the prior art in which the generation timing of the read pulse XSG is fixed, as shown in the timing chart of FIG. The amount of change in brightness with respect to the shutter pulse that does not occur is [(a) -1H] / (a), which is a large amount of change in brightness. On the other hand, the read pulse XSG
Is variable within 1H, it is possible to reduce the amount of change in brightness between the shutter pulse and the shutter pulse which does not start in the vertical blanking period.

As a result, the dynamic range of the electronic iris can be further expanded. This expansion of the dynamic range is achieved by reading pulse XSG that changes within 1H during fine adjustment.
Depends on the period. In this example, the dynamic range is expanded by using the master clock MCK, which is the maximum frequency in the system, without providing a dedicated clock generator. However, a dedicated clock generator is provided to generate a clock higher in frequency than the master clock MCK, and the read pulse XS
It is clear that the dynamic range can be further expanded by changing the timing of occurrence of G.

As described above, in the electronic iris control, the generation timing of the read pulse XSG, that is, CC
The readout timing of the signal charge of the D solid-state imaging device 2 is set to 1
In addition to the coarse adjustment that changes the exposure time in steps of 1H, it is possible to realize fine adjustment that changes the exposure time in shorter steps (in this example, the cycle of the master clock MCK). However, since the control of the exposure time within 1H can be realized at any electronic shutter speed, the amount of change in brightness can be suppressed even at the time of high-speed electronic shutter.

The small change in brightness means that CC
Since the voltage fluctuation of the DC level of the output signal of the D solid-state imaging device 2 is small, the occurrence of hunting can be suppressed even if the width of the dead zone shown in FIG. 2 is narrowed.
As a result, the width of the dead zone can be set narrower, and accordingly, the control sensitivity in the electronic iris control can be improved.

The electronic iris control circuit 9 according to the present embodiment
Can be applied not only to a video camera conforming to a television system such as NTSC or PAL, but also to a digital still camera. In this digital still camera, as described above, since there is no standard such as NTSC or PAL, the clock rate of the master clock MCK may be reduced in consideration of low power consumption. In this case, the time of one horizontal period also becomes longer according to the clock rate of the master clock MCK, and the amount of change in brightness also becomes coarser in proportion.

However, according to the present invention, as shown in the timing chart of FIG. 5, the generation timing of the read pulse XSG is set to, for example, the master clock MC within one horizontal period.
By making it variable at the cycle of K, the master clock MCK
Therefore, even when the clock rate is reduced, the amount of change in brightness can be kept small, so that a high-speed electronic shutter speed can be realized. Therefore, low power consumption can be achieved by reducing the clock rate of the master clock MCK.

In the above-described embodiment, the exposure time is controlled by a combination of the coarse adjustment and the fine adjustment when the amount of change in the screen brightness exceeds a certain set value.
The present invention is not limited to this, and various control modes associated with the combination of the coarse adjustment and the fine adjustment can be considered.

[0058]

As described above, according to the present invention,
In the control of the exposure time of the solid-state imaging device, the readout timing of the signal charge is changed within one horizontal period, so that the exposure time can be finely adjusted. Therefore, the time of one horizontal period depends on the system clock. Even in this case, a desired electronic shutter speed can be arbitrarily set without depending on the system clock.

In the electronic iris control, while the shutter pulse is generated every horizontal period, the generation timing of the read pulse is variable within one horizontal period, thereby controlling the exposure time within one horizontal period. However, since it can be realized at any electronic shutter speed, the amount of change in brightness can be suppressed even at the time of high-speed electronic shutter. In addition, since the dead zone width can be set to be narrower, the control sensitivity in the electronic iris control can be further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a dead zone.

FIG. 3 is a timing chart according to the embodiment.

FIG. 4 is a timing chart when the brightness change amount is 10%.

FIG. 5 is a timing chart when the master clock rate is reduced.

FIG. 6 is a timing chart for explaining the principle of exposure control.

FIG. 7 is a timing chart showing a brightness change amount by electronic iris control.

FIG. 8 is a timing chart according to a conventional example.

[Explanation of symbols]

2 ... CCD solid-state imaging device, 3 ... Sample hold circuit,
6 DSP circuit, 7 Master clock generator, 9 Electronic iris control circuit, 10 Detection circuit, 11 and 12 Comparator, 13 Decoder, 14 Count value designating circuit, 16 Clock generation circuit, 17 Shutter Pulse generation circuit, 18 ... Readout pulse generation circuit

Claims (7)

[Claims] 1. A method for driving a solid-state imaging device, wherein the amount of charge stored in a plurality of photoelectric conversion elements is controlled by changing the charge storage time, wherein a timing of reading signal charges from the plurality of photoelectric conversion elements is controlled. A method for driving a solid-state imaging device, wherein the charge accumulation time is controlled by changing the charge accumulation time within one horizontal period. 2. The method according to claim 1, wherein the read timing is changed at a period of a master clock. 3. The solid-state imaging device according to claim 1, wherein a coarse adjustment in which the read timing is variable every horizontal period and a fine adjustment in which the read timing is variable within one horizontal period are selectively performed. Element driving method. 4. An electronic iris control circuit for controlling an exposure time by adjusting an interval between a charge discharge pulse and a charge readout pulse applied to a solid-state imaging device, comprising: a detector for detecting an output signal of the solid-state imaging device. A first pulse generation circuit that generates the charge discharge pulse every horizontal period based on a detection output of the detection circuit; and generates the charge readout pulse within a predetermined horizontal period of a vertical blanking period. An electronic iris control circuit, further comprising: a second pulse generation circuit that changes a timing of generating the charge readout pulse within one horizontal period in a predetermined mode. 5. The electronic iris control circuit according to claim 4, wherein said second pulse generation circuit changes the generation timing of said charge readout pulse at a period of a master clock. 6. An optical system that forms an image of incident light from a subject, a solid-state image sensor that photoelectrically converts image light formed on an image pickup surface by the optical system in pixel units, and an image pickup device that is applied to the solid-state image sensor. An electronic iris control circuit for controlling an exposure time by adjusting an interval between a charge discharge pulse and a charge readout pulse, wherein the electronic iris control circuit detects an output signal of the solid-state imaging device. A first pulse generation circuit for generating the charge discharge pulse for each horizontal period based on a detection output of the detection circuit; and a charge readout pulse for a predetermined horizontal period of a vertical blanking period. And a second pulse generating circuit for generating the charge read pulse in a predetermined mode in one horizontal period. Camera according to symptoms. 7. The camera according to claim 6, wherein the second pulse generation circuit changes the generation timing of the charge readout pulse at a period of a master clock.