JPH11354446A - Production method of semiconductor film - Google Patents

Production method of semiconductor film

Info

Publication number
JPH11354446A
JPH11354446A JP16123698A JP16123698A JPH11354446A JP H11354446 A JPH11354446 A JP H11354446A JP 16123698 A JP16123698 A JP 16123698A JP 16123698 A JP16123698 A JP 16123698A JP H11354446 A JPH11354446 A JP H11354446A
Authority
JP
Japan
Prior art keywords
semiconductor film
film
impurities
manufacturing
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16123698A
Other languages
Japanese (ja)
Other versions
JP3185757B2 (en
Inventor
Yoshinobu Sato
義信 佐藤
Nobu Okumura
展 奥村
Kenji Sera
賢二 世良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16123698A priority Critical patent/JP3185757B2/en
Publication of JPH11354446A publication Critical patent/JPH11354446A/en
Application granted granted Critical
Publication of JP3185757B2 publication Critical patent/JP3185757B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Recrystallisation Techniques (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a production method which can prevent crystallization from deteriorating after completing growing process of a solid phase or after laser irradiation. SOLUTION: With the use of LPCVD(Low Pressure CVD) method based on disilane as a raw material, a-Si film 2 is piled on a glass substrate 1, and it is heat-treated at 600 deg.C in the nitrogen or in the air, and then a solid-phase growth polycrystalline silicon film 3 is produced by the solid phase growth. Successively, following the LPCVD method, an impurities are inducted by using mixed gas of disilane and diborane, and impurities-inducted silicone film 41 is piled. After the pile-up of the impurities-inducted film 41, it is irradiated with laser 5 for crystallization.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体膜の製造方法
に関し、特にアクティブマトリックス液晶ディスプレイ
パネルや密着型イメージセンサ等の入出力装置、携帯機
器等に用いる低温でのガラス基板上への形成が要求され
る薄膜トランジスタのシリコン薄膜の製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor film, and more particularly, to a method for forming a semiconductor film on a glass substrate at a low temperature used for input / output devices such as an active matrix liquid crystal display panel and a contact type image sensor and portable equipment. To a method for manufacturing a silicon thin film of a thin film transistor to be manufactured.

【0002】[0002]

【従来の技術】ガラス基板上に薄膜トランジスタ(TF
T:Thin Film Transistor)を形
成する代表的な技術として、水素化アモルファス半導体
TFT技術及び多結晶シリコンTFT技術が挙げられ
る。
2. Description of the Related Art A thin film transistor (TF) is formed on a glass substrate.
Representative techniques for forming a thin film transistor (T: Thin Film Transistor) include a hydrogenated amorphous semiconductor TFT technique and a polycrystalline silicon TFT technique.

【0003】前者は作製プロセス最高温度300℃程度
であり、移動度1cm2 /Vsec程度のキャリア移動
度を実現している。後者は、例えば石英基板を用い10
00℃程度のLSI(大規模集積回路)と類似した高温
プロセスを用いることで、キャリア移動度100cm2
/Vsecの性能を得ることができる。
The former has a maximum fabrication process temperature of about 300 ° C. and realizes a carrier mobility of about 1 cm 2 / Vsec. The latter uses, for example, a quartz substrate and
By using a high-temperature process similar to an LSI (large-scale integrated circuit) of about 00 ° C., the carrier mobility is 100 cm 2.
/ Vsec.

【0004】このような高いキャリア移動度の実現は、
例えば上記のTFTを液晶ディスプレイに応用した場
合、各画素を駆動する画素TFTと同時に、周辺駆動回
路部までもが同一ガラス基板上に同時に形成することが
できる。
[0004] The realization of such high carrier mobility is as follows.
For example, when the above-described TFT is applied to a liquid crystal display, a pixel driver for driving each pixel and a peripheral driving circuit portion can be formed simultaneously on the same glass substrate.

【0005】ところが、多結晶シリコンTFT技術にお
いて、上述のような高温プロセスを用いる場合、前者の
プロセスが用いることができる安価な低軟化点ガラスを
用いることができない。そこで、低温で高移動度を有す
る低温多結晶シリコン薄膜トランジスタの研究開発が活
発に行われている。
However, in the polycrystalline silicon TFT technology, when the above-described high-temperature process is used, an inexpensive low softening point glass that can be used in the former process cannot be used. Therefore, research and development of low-temperature polycrystalline silicon thin film transistors having high mobility at low temperatures are being actively conducted.

【0006】低温で高性能な多結晶シリコンを得るには
エキシマレーザ結晶化技術が最も有効である。この方法
を用いて移動度300cm2 /Vsecという高い移動
度を実現したという報告もある。しかしながら、パルス
レーザによる溶融結晶化技術を用いるため、均一性や再
現性に課題を残している。
An excimer laser crystallization technique is most effective for obtaining high-performance polycrystalline silicon at a low temperature. There is also a report that a high mobility of 300 cm 2 / Vsec was realized by using this method. However, since a melt crystallization technique using a pulse laser is used, there remains a problem in uniformity and reproducibility.

【0007】このような問題を解決する手段として予め
固相成長法によって結晶化した膜をエキシマレーザ照射
によって再結晶化させる方法が提案されている。すなわ
ち、固相成長法によって粒径の大きい多結晶化膜を作製
し、これをエキシマレーザ照射によって粒界の界質を行
うことで均一に高移動度な膜を得る方法である。
As a means for solving such a problem, there has been proposed a method of recrystallizing a film previously crystallized by a solid phase growth method by excimer laser irradiation. That is, a polycrystallized film having a large grain size is produced by a solid phase growth method, and the polycrystalline film is subjected to grain boundary treatment by excimer laser irradiation to uniformly obtain a film having a high mobility.

【0008】一方、駆動回路を形成するにはCMOS
(Complementary Metal Oxid
e Semiconductor)のTFTが必要にな
る。一般に真性多結晶シリコン薄膜を用いてTFTを作
製すると、nチャネル及びpチャネル共にトランジスタ
の閾値が負側にシフトすることが知られている。
On the other hand, to form a driving circuit, CMOS
(Complementary Metal Oxid
e Semiconductor) TFT is required. It is generally known that when a TFT is manufactured using an intrinsic polycrystalline silicon thin film, the threshold value of the transistor shifts to the negative side in both the n-channel and the p-channel.

【0009】これは多結晶シリコン中に存在するトラッ
プ準位のエネルギがバンド内に一様に分布していないか
らである。よって、n型のTFTとp型のTFTとの特
性のバランスを保つために、チャネルに微量ドーピング
を行い、閾値の制御を行う。
This is because the energy of trap levels existing in polycrystalline silicon is not uniformly distributed in a band. Therefore, in order to maintain the balance between the characteristics of the n-type TFT and the p-type TFT, a slight amount of doping is performed on the channel to control the threshold.

【0010】このように、閾値を制御するために不純物
を導入する手法として、薄膜中へのイオン注入やイオン
ドーピング技術があり、また特開平6−181222号
公報に開示された技術に代表される気相中で不純物ガス
を分解させ、薄膜中に不純物を導入させた後、固相成
長、レーザ照射させて結晶化させる技術が提案されてい
る。この気相中で微量不純物を混入させる方法は他の方
法と比較して、注入等のプロセスを必要としないので、
簡便な方法として期待されている。
As described above, as a method of introducing impurities to control the threshold value, there are an ion implantation technique into a thin film and an ion doping technique, and the technique disclosed in Japanese Patent Application Laid-Open No. 6-181222 is representative. A technique has been proposed in which an impurity gas is decomposed in a gas phase to introduce an impurity into a thin film, and then crystallized by solid phase growth and laser irradiation. Since the method of mixing trace impurities in this gas phase does not require a process such as injection compared to other methods,
It is expected as a simple method.

【0011】[0011]

【発明が解決しようとする課題】上述した従来のシリコ
ン薄膜の製造方法では、膜に不純物を混入させている
が、不純物を混入させない方法と比較して固相成長法に
よる結晶成長の状態が異なるという問題がある。
In the above-described conventional method of manufacturing a silicon thin film, impurities are mixed in the film. However, the state of crystal growth by the solid phase growth method is different from the method in which impurities are not mixed. There is a problem.

【0012】不純物を混入した膜の場合、不純物からの
核発生率が支配的となり、大粒径を得ることができな
い。そのため、上述した高移動度や高均一化の手段であ
る固相成長結晶化膜のレーザアニールという手段がとれ
ないという問題がある。よって、従来は固相成長を行っ
た後にイオン注入やイオンドーピング法等を用いて微量
ドープによる閾値の制御を行っている。
In the case of a film containing impurities, the nucleation rate from the impurities becomes dominant, and a large grain size cannot be obtained. Therefore, there is a problem that the above-mentioned means of laser annealing of a solid-phase-grown crystallized film, which is a means of achieving high mobility and high uniformity, cannot be taken. Therefore, conventionally, after the solid phase growth is performed, the threshold value is controlled by a small amount of doping using ion implantation, ion doping, or the like.

【0013】そこで、本発明の目的は上記の問題点を解
消し、固相成長過程後またはレーザ照射後の結晶性の劣
化を防止することができる半導体膜の製造方法を提供す
ることにある。
An object of the present invention is to provide a method of manufacturing a semiconductor film which can solve the above-mentioned problems and can prevent the deterioration of crystallinity after a solid phase growth process or after laser irradiation.

【0014】[0014]

【課題を解決するための手段】本発明による第1の半導
体膜の製造方法は、絶縁基板上に第1の半導体膜を成膜
した後、前記第1の半導体膜の固相成長を行い、その固
相成長を行った膜上に不純物を0.1ppm〜100p
pmの範囲で含有する第2の半導体膜を成膜し、該第2
の半導体膜上にレーザ照射するようにしている。
According to a first method of manufacturing a semiconductor film according to the present invention, after a first semiconductor film is formed on an insulating substrate, solid phase growth of the first semiconductor film is performed. Impurities are added to the solid-phase grown film in an amount of 0.1 ppm to 100 p.
pm, a second semiconductor film containing the second semiconductor film is formed.
The semiconductor film is irradiated with a laser.

【0015】本発明による第2の半導体膜の製造方法
は、絶縁基板上に第1の半導体膜を成膜した後、レーザ
照射によって結晶化を行い、その結晶化された膜上に不
純物を0.1ppm〜100ppmの範囲で含有する第
2の半導体膜を成膜し、該第2の半導体膜上にレーザ照
射するようにしている。
In a second method for manufacturing a semiconductor film according to the present invention, after a first semiconductor film is formed on an insulating substrate, crystallization is performed by laser irradiation, and impurities are removed on the crystallized film. A second semiconductor film containing in the range of 0.1 ppm to 100 ppm is formed, and laser irradiation is performed on the second semiconductor film.

【0016】本発明による第3の半導体膜の製造方法
は、絶縁基板上に、膜中の不純物が膜表面から基板界面
へと連続的に減少するよう濃度勾配をもつ半導体膜を堆
積し、該濃度勾配をもつ半導体膜の表面にレーザ照射す
るようにしている。
According to a third method of manufacturing a semiconductor film of the present invention, a semiconductor film having a concentration gradient is deposited on an insulating substrate so that impurities in the film are continuously reduced from the film surface to the substrate interface. Laser irradiation is performed on the surface of the semiconductor film having a concentration gradient.

【0017】本発明による第4の半導体膜の製造方法
は、絶縁基板上に、膜中の不純物が膜表面から基板界面
へと連続的に減少するよう濃度勾配をもつ半導体膜を堆
積し、該濃度勾配をもつ半導体膜を固相成長した後にそ
の固相成長させた膜表面にレーザ照射するようにしてい
る。
In a fourth method of manufacturing a semiconductor film according to the present invention, a semiconductor film having a concentration gradient is deposited on an insulating substrate so that impurities in the film are continuously reduced from the film surface to the substrate interface. After solid-phase growth of a semiconductor film having a concentration gradient, laser irradiation is performed on the surface of the solid-phase-grown film.

【0018】本発明による第5の半導体膜の製造方法
は、絶縁基板上に第1の半導体膜を成膜する工程と、前
記第1の半導体膜の固相成長を行う工程と、その固相成
長を行った膜上に不純物を0.1ppm〜100ppm
の範囲で含有する第2の半導体膜を成膜する工程と、該
第2の半導体膜上にレーザ照射する工程とを備えてい
る。
According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor film, comprising the steps of: forming a first semiconductor film on an insulating substrate; performing a solid phase growth of the first semiconductor film; 0.1 ppm to 100 ppm of impurities on the grown film
And a step of irradiating a laser on the second semiconductor film.

【0019】本発明による第6の半導体膜の製造方法
は、絶縁基板上に第1の半導体膜を成膜する工程と、レ
ーザ照射によって結晶化を行う工程と、その結晶化され
た膜上に不純物を0.1ppm〜100ppmの範囲で
含有する第2の半導体膜を成膜する工程と、該第2の半
導体膜上にレーザ照射する工程とを備えている。
According to a sixth method of manufacturing a semiconductor film according to the present invention, there are provided a step of forming a first semiconductor film on an insulating substrate, a step of performing crystallization by laser irradiation, and a step of performing crystallization on the crystallized film. The method includes a step of forming a second semiconductor film containing an impurity in a range of 0.1 ppm to 100 ppm, and a step of irradiating the second semiconductor film with laser.

【0020】本発明による第7の半導体膜の製造方法
は、絶縁基板上に、膜中の不純物が膜表面から基板界面
へと連続的に減少するよう濃度勾配をもつ半導体膜を堆
積する工程と、該濃度勾配をもつ半導体膜の表面にレー
ザ照射する工程とを備えている。
A seventh method of manufacturing a semiconductor film according to the present invention comprises the steps of: depositing a semiconductor film having a concentration gradient on an insulating substrate such that impurities in the film are continuously reduced from the film surface to the substrate interface. Irradiating the surface of the semiconductor film having the concentration gradient with laser.

【0021】本発明による第8の半導体膜の製造方法
は、絶縁基板上に、膜中の不純物が膜表面から基板界面
へと連続的に減少するよう濃度勾配をもつ半導体膜を堆
積する工程と、該濃度勾配をもつ半導体膜を固相成長さ
せる工程と、固相成長させた膜表面にレーザ照射する工
程とを備えている。
An eighth method of manufacturing a semiconductor film according to the present invention comprises the steps of: depositing a semiconductor film having a concentration gradient on an insulating substrate such that impurities in the film are continuously reduced from the film surface to the substrate interface. A step of solid-phase growing a semiconductor film having the concentration gradient, and a step of irradiating a laser to the surface of the solid-phase-grown film.

【0022】すなわち、本発明の半導体膜の製造方法
は、活性層として用いるシリコン薄膜の閾値の制御とし
て用いる不純物を膜全体に拡散、導入させずに、不純物
が混入する膜と不純物が混入しない膜とを分離形成ある
いは堆積途中から不純物ガスを導入して不純物濃度に勾
配を形成させて不純物が混入しない膜を残している。こ
れによって、固相成長過程後またはレーザ照射後の結晶
性の劣化を防止することが可能となる。
That is, according to the method of manufacturing a semiconductor film of the present invention, a film containing impurities and a film containing no impurities are used without diffusing and introducing impurities used for controlling a threshold value of a silicon thin film used as an active layer throughout the film. The impurity gas is introduced during the separation formation or the deposition to form a gradient in the impurity concentration, leaving a film in which the impurities are not mixed. This makes it possible to prevent crystallinity from deteriorating after the solid phase growth process or after laser irradiation.

【0023】[0023]

【発明の実施の形態】次に、本発明の一実施例について
図面を参照して説明する。図1(a)〜(c)は本発明
の一実施例による半導体膜の製造過程を示す断面図であ
る。この図1を参照して本発明の一実施例による半導体
膜の製造過程について説明する。
Next, an embodiment of the present invention will be described with reference to the drawings. 1A to 1C are cross-sectional views illustrating a process of manufacturing a semiconductor film according to an embodiment of the present invention. The manufacturing process of the semiconductor film according to one embodiment of the present invention will be described with reference to FIG.

【0024】まず、ガラス基板上1にジシランを原料と
したLPCVD(Low Pressure Chem
ical Vapor Deposition:減圧C
VD)法を用いて成長温度450℃でa−Si膜2を5
00Åから900Å堆積させる[図1(a)参照]。
First, LPCVD (Low Pressure Chem) using disilane as a raw material is placed on a glass substrate 1.
Iical Vapor Deposition: Decompression C
The a-Si film 2 is grown at a growth temperature of 450 ° C. by using the VD) method.
Deposit from 00 ° to 900 ° [see FIG. 1 (a)].

【0025】その後に、600℃の窒素中または大気中
で熱処理を行ってから固相成長を行い、固相成長多結晶
シリコン膜3にした後[図1(b)参照]、LPCVD
法によってジシラン及びジボランの混合ガス(混合比は
ジシランに対してジボラン0.1ppm〜100ppm
の範囲)を用いて不純物を導入し、不純物導入シリコン
膜41を500Åから100Å堆積させる。この堆積
後、不純物導入シリコン膜41上にレーザ5を照射して
結晶化を行う[図1(c)参照]。
After that, a heat treatment is performed in nitrogen or air at 600 ° C., and then a solid phase growth is performed to form a solid phase grown polycrystalline silicon film 3 (see FIG. 1B).
Mixed gas of disilane and diborane (mixing ratio is 0.1 ppm to 100 ppm of diborane to disilane by the method)
), And an impurity-doped silicon film 41 is deposited at 500 to 100 degrees. After this deposition, crystallization is performed by irradiating the laser 5 onto the impurity-doped silicon film 41 (see FIG. 1C).

【0026】この時、レーザ5の照射強度を、下層であ
る固相成長多結晶シリコン膜3の上部のみが溶融する程
度に調整する。その結果、下層の固相成長膜は不純物を
含まないため、大粒径化が得られるので、第2のシリコ
ン層を積層してレーザを照射した後、下層である固相成
長膜から結晶成長が起こり、固相成長膜の粒径を反映し
て大粒径で高移動度な多結晶シリコン膜が均一性をもっ
て得られる。
At this time, the irradiation intensity of the laser 5 is adjusted to such an extent that only the upper portion of the solid-phase grown polycrystalline silicon film 3 as the lower layer is melted. As a result, since the lower solid-phase growth film does not contain impurities, the grain size can be increased. Therefore, after the second silicon layer is laminated and irradiated with laser, crystal growth is performed from the lower solid-phase growth film. Occurs, and a polycrystalline silicon film having a large grain size and a high mobility is obtained with uniformity by reflecting the grain size of the solid phase growth film.

【0027】この場合、上層膜は不純物を予め含んでい
るため、微量に不純物を含んだ多結晶シリコンを均一に
作製することができる。このように、イオン注入やイオ
ンドーピング等のプロセスを用いずに、移動度の高い多
結晶シリコン膜を均一に作製することができる。
In this case, since the upper layer film contains impurities in advance, polycrystalline silicon containing a small amount of impurities can be uniformly produced. As described above, a polycrystalline silicon film having high mobility can be uniformly formed without using a process such as ion implantation or ion doping.

【0028】通常、a−Si膜2を固相成長した場合、
柱状結晶が棒状にかつランダムに成長し、レーザ照射後
にその柱状結晶の形状を残しながら結晶化する。予め不
純物を含むシリコン膜の固相成長膜後の粒径はジボラン
/ジシランガス比が100ppmの時、粒径サイズは1
00nm以下であるのに対し、ガス濃度比10ppm以
下では500nm、1ppm以下では1000nmの粒
径が得られる(図4参照)。これからも、不純物を気相
で混入させて固相成長を行うことが結晶成長の点で不利
であることがわかる。
Normally, when the a-Si film 2 is solid-phase grown,
The columnar crystal grows in a rod shape and randomly, and crystallizes after laser irradiation while leaving the shape of the columnar crystal. The particle size of the silicon film containing impurities beforehand after the solid phase growth film is 1 when the diborane / disilane gas ratio is 100 ppm.
When the gas concentration ratio is 10 ppm or less, the particle size is 500 nm, and when the gas concentration ratio is 1 ppm or less, a particle size of 1000 nm is obtained (see FIG. 4). From this, it can be seen that it is disadvantageous in terms of crystal growth to carry out solid phase growth by mixing impurities in the gas phase.

【0029】図2(a)〜(d)は本発明の一実施例に
よる薄膜トランジスタの各製造工程を示す断面図であ
る。この図2を参照して本発明の一実施例による薄膜ト
ランジスタの各製造工程について説明する。
FIGS. 2A to 2D are cross-sectional views showing the steps of manufacturing a thin film transistor according to one embodiment of the present invention. Each manufacturing process of the thin film transistor according to one embodiment of the present invention will be described with reference to FIG.

【0030】ガラス基板上1にLPCVD法を用いて、
反応管内部の温度を450℃に均一に保ち、ジシランガ
ス(Si2 6 )を導入させ、a−Si膜2を500Å
堆積させる。同一の反応管内で600℃のN2 中で50
時間の固相成長膜3とする[図2(a)参照]。
Using a LPCVD method on a glass substrate 1,
The temperature inside the reaction tube was kept uniform at 450 ° C., disilane gas (Si 2 H 6 ) was introduced, and the a-Si film 2 was formed at 500 ° C.
Deposit. 50 in N 2 at 600 ° C. in the same reaction tube
The solid phase growth film 3 is obtained for a time [see FIG. 2 (a)].

【0031】この後に、ジボランガス(B2 6 )とジ
シランガス(Si2 6 )との混合ガスを導入させ、不
純物導入膜4を300Å堆積させる。その後に、不純物
導入膜4上にレーザ5を照射して結晶化させるととも
に、不純物を固相成長膜3中に再分布させる[図2
(b)参照]。この場合、レーザ5には大面積に均一に
照射することが可能なエキシマレーザを用いている。
Thereafter, a mixed gas of diborane gas (B 2 H 6 ) and disilane gas (Si 2 H 6 ) is introduced, and the impurity-introduced film 4 is deposited at 300 °. Thereafter, the impurity-doped film 4 is irradiated with a laser 5 to be crystallized, and the impurities are redistributed in the solid-phase growth film 3 [FIG.
(B)]. In this case, an excimer laser capable of uniformly irradiating a large area is used as the laser 5.

【0032】レーザ5の照射後に結晶化させた後、固相
成長膜3を島状に加工し、LPCVD法によってゲート
絶縁膜6を形成させる。続けて、高融点シリサイド金属
を用いてシリサイドゲート電極7を形成し、イオンドー
ピング8によってソースドレイン電極9を形成し、層間
絶縁膜(SiNx )10を300nm堆積させる[図2
(c)参照]。
After crystallization after irradiation with the laser 5, the solid-phase growth film 3 is processed into an island shape, and a gate insulating film 6 is formed by LPCVD. Subsequently, a silicide gate electrode 7 is formed using a high melting point silicide metal, a source / drain electrode 9 is formed by ion doping 8, and an interlayer insulating film (SiN x ) 10 is deposited to a thickness of 300 nm [FIG.
(C)].

【0033】この後に、ゲート絶縁膜6及び層間絶縁膜
10にコンタクトホールを形成し、そのコンタクトホー
ルにアルミ電極11を形成させてトランジスタを作製す
る[図2(d)参照]。
After that, a contact hole is formed in the gate insulating film 6 and the interlayer insulating film 10, and an aluminum electrode 11 is formed in the contact hole to manufacture a transistor (see FIG. 2D).

【0034】上述した製造工程で作製したトランジスタ
はnチャネル及びpチャネル共に均一に移動度100c
2 /Vsec以上の値を示し、高性能な薄膜トランジ
スタを均一に作製することができる。また、nチャネル
及びpチャネルのトランジスタ特性はゲート電圧0Vを
中心に対称な特性を示し、閾値の制御も良好であること
が実験等から得られている。
The transistor manufactured in the above manufacturing process has a uniform mobility of 100 c for both the n-channel and the p-channel.
A high-performance thin film transistor having a value of m 2 / Vsec or more can be manufactured uniformly. Further, it has been obtained from experiments and the like that the n-channel and p-channel transistor characteristics exhibit symmetric characteristics with respect to the gate voltage of 0 V as a center, and the threshold value is well controlled.

【0035】図3(a)〜(c)は本発明の他の実施例
による半導体膜の各製造過程を示す断面図である。この
図3を参照して本発明の他の実施例による半導体膜の製
造過程について説明する。
FIGS. 3A to 3C are cross-sectional views showing the steps of manufacturing a semiconductor film according to another embodiment of the present invention. A manufacturing process of a semiconductor film according to another embodiment of the present invention will be described with reference to FIG.

【0036】まず、ガラス基板上1にジシランを原料と
したLPCVD法を用いて成長温度450℃でa−Si
膜2を堆積させる成長途中から不純物ガスとしてジシラ
ンとジボランとの混合ガスを導入し、不純物導入膜42
を形成させる[図3(a),(b)参照]。その後に、
不純物導入膜42上にレーザ5を照射させる[図3
(c)参照]。この場合、レーザ5の照射前に600℃
の固相成長を実施してもよい。
First, a-Si was grown on a glass substrate 1 at a growth temperature of 450 ° C. by LPCVD using disilane as a raw material.
A mixed gas of disilane and diborane is introduced as an impurity gas during the growth for depositing the film 2, and the impurity introduction film 42 is formed.
Is formed [see FIGS. 3A and 3B]. Then,
The laser 5 is irradiated onto the impurity introduction film 42 [FIG.
(C)]. In this case, 600 ° C. before the irradiation with the laser 5
May be performed.

【0037】図4は従来技術のジボラン/ジシランガス
濃度に依存した粒径を示す図であり、図5は本発明のジ
ボラン/ジシランガス濃度に依存した粒径を示す図であ
る。これら図4及び図5を参照してジボラン/ジシラン
ガス濃度に依存した粒径について説明する。
FIG. 4 is a diagram showing the particle size depending on the diborane / disilane gas concentration of the prior art, and FIG. 5 is a diagram showing the particle size depending on the diborane / disilane gas concentration of the present invention. The particle diameter depending on the concentration of diborane / disilane gas will be described with reference to FIGS.

【0038】a−Si膜2を固相成長した場合、柱状結
晶が棒状にランダムに成長し、レーザ照射後にこの柱状
結晶の形状を残しながら結晶化する。膜全体に不純物を
導入させた場合の固相成長膜後の粒径は、ジボラン/ジ
シランガス比が100ppmの時、粒径サイズは100
nm以下であるのに対し、ガス濃度比10ppm以下で
は500nm、1ppm以下では1000nmの粒径が
得られる(図4参照)。
When the a-Si film 2 is solid-phase grown, columnar crystals grow randomly in a rod shape and crystallize after laser irradiation while maintaining the shape of the columnar crystals. When the impurities are introduced into the entire film, the particle size after the solid phase growth film is 100 when the diborane / disilane gas ratio is 100 ppm.
When the gas concentration ratio is 10 ppm or less, a particle size of 500 nm or 1 ppm or less is obtained, whereas the particle size is 1000 nm or less (see FIG. 4).

【0039】レーザで不純物を再分布させ、目的とする
膜中不純物濃度にする場合、不純物形成時のガス濃度比
は不純物を導入しない膜厚との比率によっても異なる
が、膜全体に不純物を混入させる場合のガス濃度の約
1.1倍から5倍のガス濃度比を必要とする。その結
果、同じ膜中不純物濃度を得るために導入した不純物の
ガス濃度では2倍程度が好ましく、この場合での粒径サ
イズを比較した場合、10ppmのガス濃度で粒径サイ
ズが500nmなのに対し、20ppmでは800nm
の粒径サイズとなる(図5参照)。尚、結晶性及び粒径
は走査型電子顕微鏡、透過型電子顕微鏡にて観察し、評
価している。
When the impurities are redistributed with a laser to achieve the target impurity concentration in the film, the gas concentration ratio at the time of forming the impurities differs depending on the ratio with the film thickness to which the impurities are not introduced. In this case, a gas concentration ratio of about 1.1 to 5 times the gas concentration is required. As a result, the gas concentration of the impurity introduced in order to obtain the same impurity concentration in the film is preferably about twice, and when the particle size in this case is compared, the particle size is 500 nm at a gas concentration of 10 ppm, 800 nm at 20 ppm
(See FIG. 5). The crystallinity and the particle size are evaluated by observation with a scanning electron microscope and a transmission electron microscope.

【0040】このように、不純物導入膜41,42と、
不純物を導入しない固相成長膜3とを分離させて形成
し、不純物を導入しない固相成長膜3のみを初期段階で
熱処理させることで、レーザ照射後に不純物を導入しな
い固相成長膜3からの核発生を支配的に起こさせること
で、良好な結晶性薄膜を得ることができる。
As described above, the impurity introduction films 41 and 42
The solid-phase growth film 3 into which impurities are not introduced is formed separately from the solid-phase growth film 3 into which impurities are not introduced after the laser irradiation. By causing nucleation to occur dominantly, a good crystalline thin film can be obtained.

【0041】すなわち、活性層として用いるシリコン薄
膜の閾値の制御として用いる不純物を膜全体に拡散、導
入させずに、不純物が混入する膜と不純物が混入しない
膜とを分離形成あるいは堆積途中から不純物ガスを導入
して不純物濃度に勾配を形成させて不純物が混入しない
膜を残すことによって、固相成長過程後またはレーザ照
射後の結晶性の劣化を防止することができる。
That is, the impurity used for controlling the threshold value of the silicon thin film used as the active layer is not diffused and introduced into the entire film. Is introduced to form a gradient in the impurity concentration and leave a film in which the impurity is not mixed, whereby the deterioration of the crystallinity after the solid phase growth process or after the laser irradiation can be prevented.

【0042】不純物を導入しない固相成長膜3の固相成
長を先に行うことで、不純物によって微結晶化せずかつ
レーザ5の照射後に大粒径が得られる多結晶シリコン薄
膜を提供することができ、高移動度を実現した薄膜トラ
ンジスタを作製することができる。
The solid-phase growth of the solid-phase growth film 3 into which impurities are not introduced is performed first to provide a polycrystalline silicon thin film which is not microcrystallized by impurities and has a large grain size after irradiation with the laser 5. Accordingly, a thin film transistor having high mobility can be manufactured.

【0043】[0043]

【発明の効果】以上説明したように本発明によれば、絶
縁基板上に第1の半導体膜を成膜した後、第1の半導体
膜の固相成長を行い、その固相成長を行った膜上に不純
物を0.1ppm〜100ppmの範囲で含有する第2
の半導体膜を成膜し、該第2の半導体膜上にレーザ照射
することによって、固相成長過程後またはレーザ照射後
の結晶性の劣化を防止することができるという効果があ
る。
As described above, according to the present invention, after a first semiconductor film is formed on an insulating substrate, the first semiconductor film is subjected to solid phase growth, and the solid phase growth is performed. Second containing impurities in the range of 0.1 ppm to 100 ppm on the film
By forming a semiconductor film and irradiating the second semiconductor film with laser, there is an effect that deterioration of crystallinity after a solid phase growth process or after laser irradiation can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(c)は本発明の一実施例による半導
体膜の製造過程を示す断面図である。
1A to 1C are cross-sectional views illustrating a process of manufacturing a semiconductor film according to an embodiment of the present invention.

【図2】(a)〜(d)は本発明の一実施例による薄膜
トランジスタの各製造工程を示す断面図である。
FIGS. 2A to 2D are cross-sectional views illustrating respective manufacturing steps of a thin film transistor according to an embodiment of the present invention.

【図3】(a)〜(c)は本発明の他の実施例による半
導体膜の各製造過程を示す断面図である。
FIGS. 3A to 3C are cross-sectional views illustrating the steps of manufacturing a semiconductor film according to another embodiment of the present invention.

【図4】従来技術のジボラン/ジシランガス濃度に依存
した粒径を示す図である。
FIG. 4 is a view showing a particle diameter depending on a diborane / disilane gas concentration in a conventional technique.

【図5】本発明のジボラン/ジシランガス濃度に依存し
た粒径を示す図である。
FIG. 5 is a diagram showing a particle size depending on a diborane / disilane gas concentration of the present invention.

【符号の説明】[Explanation of symbols]

1 ガラス基板 2 a−Si膜 3 固相成長膜 5 レーザ 6 ゲート絶縁膜 7 シリサイドゲート電極 8 イオンドーピング 9 ソースドレイン電極 10 層間絶縁膜 11 アルミ電極 41,42 不純物導入膜 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 a-Si film 3 Solid phase growth film 5 Laser 6 Gate insulating film 7 Silicide gate electrode 8 Ion doping 9 Source drain electrode 10 Interlayer insulating film 11 Aluminum electrode 41,42 Impurity introduction film

Claims (16)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板上に第1の半導体膜を成膜した
後、前記第1の半導体膜の固相成長を行い、その固相成
長を行った膜上に不純物を0.1ppm〜100ppm
の範囲で含有する第2の半導体膜を成膜し、該第2の半
導体膜上にレーザ照射するようにしたことを特徴とする
半導体膜の製造方法。
After a first semiconductor film is formed on an insulating substrate, solid phase growth of the first semiconductor film is performed, and impurities on the film on which the solid phase growth is performed are 0.1 ppm to 100 ppm.
A method for producing a semiconductor film, comprising: forming a second semiconductor film containing the second semiconductor film in the range described above; and irradiating the second semiconductor film with a laser.
【請求項2】 前記第2の半導体膜に含まれる導伝型不
純物濃度が前記第1の半導体膜に含まれる導伝型不純物
濃度よりも高くなるようにしたことを特徴とする請求項
1記載の半導体膜の製造方法。
2. The semiconductor device according to claim 1, wherein a concentration of a conductive impurity contained in said second semiconductor film is higher than a concentration of a conductive impurity contained in said first semiconductor film. Of manufacturing a semiconductor film.
【請求項3】 前記第1の半導体膜が導伝型不純物を含
まないことを特徴とする請求項1または請求項2記載の
半導体膜の製造方法。
3. The method according to claim 1, wherein the first semiconductor film does not contain a conductive impurity.
【請求項4】 絶縁基板上に第1の半導体膜を成膜した
後、レーザ照射によって結晶化を行い、その結晶化され
た膜上に不純物を0.1ppm〜100ppmの範囲で
含有する第2の半導体膜を成膜し、該第2の半導体膜上
にレーザ照射するようにしたことを特徴とする半導体膜
の製造方法。
4. After the first semiconductor film is formed on the insulating substrate, crystallization is performed by laser irradiation, and the second film containing impurities in the range of 0.1 ppm to 100 ppm on the crystallized film. A method of manufacturing a semiconductor film, comprising: forming a semiconductor film according to (1), and irradiating the second semiconductor film with a laser.
【請求項5】 前記第2の半導体膜に含まれる導伝型不
純物濃度が前記第1の半導体膜に含まれる導伝型不純物
濃度よりも高くなるようにしたことを特徴とする請求項
4記載の半導体膜の製造方法。
5. The semiconductor device according to claim 4, wherein a concentration of a conductive impurity contained in said second semiconductor film is higher than a concentration of a conductive impurity contained in said first semiconductor film. Of manufacturing a semiconductor film.
【請求項6】 前記第1の半導体膜が導伝型不純物を含
まないことを特徴とする請求項4または請求項5記載の
半導体膜の製造方法。
6. The method according to claim 4, wherein the first semiconductor film does not contain a conductive impurity.
【請求項7】 絶縁基板上に、膜中の不純物が膜表面か
ら基板界面へと連続的に減少するよう濃度勾配をもつ半
導体膜を堆積し、該濃度勾配をもつ半導体膜の表面にレ
ーザ照射するようにしたことを特徴とする半導体膜の製
造方法。
7. A semiconductor film having a concentration gradient is deposited on an insulating substrate such that impurities in the film continuously decrease from the film surface to the substrate interface, and laser irradiation is performed on the surface of the semiconductor film having the concentration gradient. A method of manufacturing a semiconductor film.
【請求項8】 絶縁基板上に、膜中の不純物が膜表面か
ら基板界面へと連続的に減少するよう濃度勾配をもつ半
導体膜を堆積し、該濃度勾配をもつ半導体膜を固相成長
した後にその固相成長させた膜表面にレーザ照射するよ
うにしたことを特徴とする半導体膜の製造方法。
8. A semiconductor film having a concentration gradient is deposited on an insulating substrate so that impurities in the film are continuously reduced from the film surface to the substrate interface, and the semiconductor film having the concentration gradient is solid-phase grown. A method of manufacturing a semiconductor film, characterized in that the surface of the film that has been solid-phase grown is irradiated with laser light.
【請求項9】 絶縁基板上に第1の半導体膜を成膜する
工程と、前記第1の半導体膜の固相成長を行う工程と、
その固相成長を行った膜上に不純物を0.1ppm〜1
00ppmの範囲で含有する第2の半導体膜を成膜する
工程と、該第2の半導体膜上にレーザ照射する工程とを
有することを特徴とする半導体膜の製造方法。
9. A step of forming a first semiconductor film on an insulating substrate; and a step of performing solid phase growth of the first semiconductor film.
Impurities are added to the solid-phase grown film at 0.1 ppm to 1 ppm.
A method for manufacturing a semiconductor film, comprising: a step of forming a second semiconductor film having a content of 00 ppm, and a step of irradiating a laser beam on the second semiconductor film.
【請求項10】 前記第2の半導体膜に含まれる導伝型
不純物濃度が前記第1の半導体膜に含まれる導伝型不純
物濃度よりも高くなるようにしたことを特徴とする請求
項9記載の半導体膜の製造方法。
10. The semiconductor device according to claim 9, wherein the concentration of the conductive impurity contained in the second semiconductor film is higher than the concentration of the conductive impurity contained in the first semiconductor film. Of manufacturing a semiconductor film.
【請求項11】 前記第1の半導体膜が導伝型不純物を
含まないことを特徴とする請求項9または請求項10記
載の半導体膜の製造方法。
11. The method according to claim 9, wherein the first semiconductor film does not contain a conductive impurity.
【請求項12】 絶縁基板上に第1の半導体膜を成膜す
る工程と、レーザ照射によって結晶化を行う工程と、そ
の結晶化された膜上に不純物を0.1ppm〜100p
pmの範囲で含有する第2の半導体膜を成膜する工程
と、該第2の半導体膜上にレーザ照射する工程とを有す
ることを特徴とする半導体膜の製造方法。
12. A step of forming a first semiconductor film on an insulating substrate, a step of crystallization by laser irradiation, and a step of depositing an impurity of 0.1 ppm to 100 ppm on the crystallized film.
A method for manufacturing a semiconductor film, comprising: a step of forming a second semiconductor film containing pm, and a step of irradiating a laser on the second semiconductor film.
【請求項13】 前記第2の半導体膜に含まれる導伝型
不純物濃度が前記第1の半導体膜に含まれる導伝型不純
物濃度よりも高くなるようにしたことを特徴とする請求
項12記載の半導体膜の製造方法。
13. The semiconductor device according to claim 12, wherein a concentration of a conductive impurity contained in said second semiconductor film is higher than a concentration of a conductive impurity contained in said first semiconductor film. Of manufacturing a semiconductor film.
【請求項14】 前記第1の半導体膜が導伝型不純物を
含まないことを特徴とする請求項12または請求項13
記載の半導体膜の製造方法。
14. The semiconductor device according to claim 12, wherein the first semiconductor film does not contain a conductive impurity.
The method for manufacturing a semiconductor film according to the above.
【請求項15】 絶縁基板上に、膜中の不純物が膜表面
から基板界面へと連続的に減少するよう濃度勾配をもつ
半導体膜を堆積する工程と、該濃度勾配をもつ半導体膜
の表面にレーザ照射する工程とを有することを特徴とす
る半導体膜の製造方法。
15. A step of depositing a semiconductor film having a concentration gradient on an insulating substrate so that impurities in the film continuously decrease from the film surface to the substrate interface, and forming a semiconductor film having a concentration gradient on the surface of the semiconductor film having the concentration gradient. Irradiating a laser beam.
【請求項16】 絶縁基板上に、膜中の不純物が膜表面
から基板界面へと連続的に減少するよう濃度勾配をもつ
半導体膜を堆積する工程と、該濃度勾配をもつ半導体膜
を固相成長させる工程と、固相成長させた膜表面にレー
ザ照射する工程とを有することを特徴とする半導体膜の
製造方法。
16. A step of depositing a semiconductor film having a concentration gradient on an insulating substrate so that impurities in the film are continuously reduced from the film surface to the substrate interface; A method of manufacturing a semiconductor film, comprising: a step of growing; and a step of irradiating a laser to the surface of the film that has been solid-phase grown.
JP16123698A 1998-06-10 1998-06-10 Method for manufacturing semiconductor film Expired - Fee Related JP3185757B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16123698A JP3185757B2 (en) 1998-06-10 1998-06-10 Method for manufacturing semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16123698A JP3185757B2 (en) 1998-06-10 1998-06-10 Method for manufacturing semiconductor film

Publications (2)

Publication Number Publication Date
JPH11354446A true JPH11354446A (en) 1999-12-24
JP3185757B2 JP3185757B2 (en) 2001-07-11

Family

ID=15731235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16123698A Expired - Fee Related JP3185757B2 (en) 1998-06-10 1998-06-10 Method for manufacturing semiconductor film

Country Status (1)

Country Link
JP (1) JP3185757B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006115484A (en) * 2004-09-17 2006-04-27 Nec Corp Semiconductor device, circuit, display device using them, and driving method of them
US8681084B2 (en) 2004-09-17 2014-03-25 Gold Charm Limited Semiconductor device, method for driving same, display device using same and personal digital assistant

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006115484A (en) * 2004-09-17 2006-04-27 Nec Corp Semiconductor device, circuit, display device using them, and driving method of them
US8681084B2 (en) 2004-09-17 2014-03-25 Gold Charm Limited Semiconductor device, method for driving same, display device using same and personal digital assistant

Also Published As

Publication number Publication date
JP3185757B2 (en) 2001-07-11

Similar Documents

Publication Publication Date Title
KR100227439B1 (en) Polycrystalline thin film and the manufacturing method of thin film semiconductor device
US5818076A (en) Transistor and semiconductor device
US5970327A (en) Method of fabricating a thin film transistor
US6329269B1 (en) Semiconductor device manufacturing with amorphous film cyrstallization using wet oxygen
JPH02140915A (en) Manufacture of semiconductor device
US7087964B2 (en) Predominantly <100> polycrystalline silicon thin film transistor
JPH08195492A (en) Formation of polycrystalline film, and manufacture of film transistor
JP3411408B2 (en) Method for manufacturing semiconductor device
JP3357707B2 (en) Method for manufacturing polycrystalline semiconductor film and method for manufacturing thin film transistor
JP2961375B2 (en) Method for manufacturing semiconductor device
JPH1168109A (en) Production of polycrystalline thin film and production of thin-film transistor
JP3185757B2 (en) Method for manufacturing semiconductor film
JPH01270310A (en) Manufacture of semiconductor
JPH02275641A (en) Manufacture of semiconductor device
JP3203652B2 (en) Semiconductor thin film manufacturing method
JP3141909B2 (en) Semiconductor device manufacturing method
JP2822394B2 (en) Method for manufacturing semiconductor device
JPH11261078A (en) Manufacture of semiconductor device
JPH0945926A (en) Formation of polycrystalline semiconductor thin film, thin film transistor and its manufacture
JPH04305940A (en) Manufacture of thin-film transistor
JP2876598B2 (en) Method for manufacturing semiconductor device
JP2773203B2 (en) Method for manufacturing semiconductor device
JPH0982639A (en) Semiconductor device and its manufacture
JP2933081B2 (en) Method for manufacturing semiconductor device
JP3338756B2 (en) Semiconductor device and method of manufacturing the same

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090511

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100511

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110511

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110511

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120511

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120511

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130511

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130511

Year of fee payment: 12

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130511

Year of fee payment: 12

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130511

Year of fee payment: 12

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees