JPH11341099A - Phase modulation signal demodulating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a phase modulation signal demodulating device capable of suppressing the drop of a received signal level even when a large frequency deviation occurs in an input signal. SOLUTION: The demodulation device is provided with a plural-delay detection part 9 including plural delay detection parts having respectively different delay values, 1st and 2nd level detection parts 3, 6 for detecting the levels of detection signals outputted from the detection part 9, a detected signal selection part 7 for selecting an optimum delay detection part in the detection part 9 and outputting a selected detection signal, and a switching part 8 for controlling the selection part 7 based on the levels of detection signals detected by the 1st and 2nd level detection parts 3, 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase modulation signal demodulator for receiving a differentially encoded phase modulation signal and performing delay detection.

[0002]

2. Description of the Related Art A conventional phase modulation signal demodulation apparatus will be described below with reference to the drawings.

FIG. 8 is a block diagram showing a conventional phase modulation signal demodulator. 8, reference numeral 101 denotes a fixed delay unit that outputs a delay signal obtained by delaying an input signal by one bit time, 102 denotes a multiplier that multiplies the input signal by the delay signal, and 103 denotes an output of the multiplier 102 that is smoothed. This is a filter unit to be converted.

[0004] The operation of the phase modulation signal demodulating apparatus thus configured will be described. When the signal of the frequency fc is input, the phase of the fixed delay unit 101 is delayed by Φ = 2πfc / fd. Here, fd is a data frequency and indicates a data transmission speed. If the time is t and the modulated input signal (input modulated signal) is cos2πt, the output signal of the fixed delay unit 101 is cos (2πfc · t−2πfc / fd). Multiplication section 102 multiplies the input modulation signal of fixed delay section 101 by the output modulation signal of fixed delay section 101. When the phase of the input modulation signal of the fixed delay unit 101 one bit before the current input modulation signal is the same as that of the current input modulation signal, the multiplication unit 1
02 is represented by cos (2πfc · t) × cos (2πfc · t−2π)
fc / fd). If the phase of the input modulation signal of the fixed delay unit 101 one bit before the current input modulation signal is opposite to that of the current input modulation signal, the output signal of the multiplication unit 102 is −cos (2πfc · t) × cos (2πfc · t−2).
πfc / fd). From the above equation, by setting fc / fd to be an integral multiple, the output signal level of the multiplication unit 102, that is, the detection signal level becomes the maximum. The output signal of the multiplying unit 102 is smoothed by the filter unit 103, the frequency of the input modulation signal is attenuated, and data corresponding to the input modulation signal is reproduced.

FIGS. 9A to 9D are timing charts showing signal waveforms at various parts in the phase modulation signal demodulating apparatus shown in FIG. In FIG. 9, (a) shows an input modulation signal,
(B) shows the output signal of the fixed delay unit 101, (c) shows the output signal of the multiplication unit 102, (d) shows the output signal of the filter unit 103, the horizontal axis is time (second (s)), and the vertical axis is Indicates amplitude. Also, fc / fd = 3 and fd = 1 Hz.
The multiplier 102 outputs a result of multiplication of the input modulation signal and the input modulation signal delayed by one bit time from the input modulation signal. As shown in the time 1s to 2s, when the phase of the input modulation signal is π, that is, inverted, the output signal level of the filter unit 103 becomes negative.

On the other hand, when the frequency of the input modulation signal changes from fc to Δ
The output signal of the multiplying unit 102 in the case of f shift is: cos (2πfc · t) × cos ｛2πfc · t−2π
(Fc + Δf) / fd｝. Therefore, when Δf increases, the multiplication unit 102
Output signal level is significantly reduced, and communication performance is extremely deteriorated. For example, a communication device in the millimeter wave band has a large device limitation and cannot have a simple PLL configuration. However, when a phase modulation signal demodulation device having a simple circuit configuration as described above is employed, the frequency accuracy is good. Difficult to do.

[0007]

As described above, in the conventional phase modulation signal demodulating apparatus, when the input modulation signal (hereinafter, simply referred to as "input signal") has a large frequency shift, the detection signal level decreases. There is a problem that a remarkably good demodulated signal cannot be obtained.

This phase modulation signal demodulation device is required to be able to obtain a highly accurate demodulated signal by suppressing a decrease in the received signal level even if a large frequency shift occurs in the input signal.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a phase modulation signal demodulation device capable of suppressing a decrease in received signal level even when a large frequency shift occurs in an input signal.

[0010]

SUMMARY OF THE INVENTION In order to solve this problem, a phase modulation signal demodulator according to the present invention has a plurality of delay detectors having a plurality of delay detectors having different delay amounts and outputs from the delay detector. A plurality of level detectors for detecting the level of the detection signal, a detection selector for selecting an optimal delay detector from the plurality of delay detectors and outputting a detection signal, and a detection detector for detecting the plurality of level detectors A switching unit that controls the detection selection unit based on the signal level.

As a result, it is possible to obtain a phase modulation signal demodulator capable of suppressing a decrease in the received signal level even if a large frequency shift occurs in the input signal.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention detects a plurality of delay detectors having a plurality of delay detectors having different delay amounts, and detects a level of a detection signal output from the delay detector. A plurality of level detection units, a detection selection unit that selects an optimal delay detection unit from among the plurality of delay detection units and outputs a detection signal, and detection based on detection signal levels detected by the plurality of level detection units. And a switching unit that controls the selection unit.The optimum delay detection unit is selected from the plurality of delay detection units, and even if a large frequency shift occurs in the input signal, the reception signal level is reduced. It has the effect of being suppressed.

According to a second aspect of the present invention, in the first aspect of the invention, the plurality of delay detectors include a delay detector comprising a plurality of stages, and the delay detector detects the delay signal of the preceding stage as an input signal. This has the effect that the signal delayed in the preceding stage delay detector is used.

According to a third aspect of the present invention, there is provided a delay detecting section having a variable phase section capable of changing the phase of an input signal, wherein the variable phase section changes the phase of the input signal to perform delay detection. A level detector for detecting the level of the detection signal output from the delay detector, and a phase controller for changing the phase of the input signal in the variable phase unit based on the level of the detected detection signal. There is an effect that the correction for the frequency deviation of the input signal is optimized in the variable phase section.

According to a fourth aspect of the present invention, in the third aspect of the present invention, the delay detection section includes a fixed delay section for delaying an input signal and a variable phase section arranged in parallel. A multiplication / smoothing unit for smoothing a signal obtained by multiplying the output delay signal by the delay signal output from the variable phase unit and outputting the resulting signal as a detection signal; The part has an effect of being arranged in parallel on the substrate.

Hereinafter, an embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIGS. (Embodiment 1) FIG. 1 is a block diagram showing a phase modulation signal demodulation apparatus according to Embodiment 1 of the present invention.

In FIG. 1, reference numeral 1 denotes a first delay unit for delaying an input signal by about a data period (for example, one bit time), and 2 denotes a first delay which is an input signal and an output signal of the first delay unit 1. A first multiplication / smoothing unit for smoothing the signal obtained by multiplying the multiplied signal and outputting the resulting signal as a first detection signal; , A second delay unit having a delay amount different from that of the first delay unit 1, and a second delay signal which is an input signal and an output signal of the second delay unit 4. A second multiplying and smoothing unit that smoothes the signal obtained by the multiplication and outputs the resulting signal as a second detection signal.
Reference numeral 6 denotes a second level detection unit for detecting the level of the second detection signal from the second multiplication / smoothing unit 6, and reference numeral 7 denotes a first detection signal or a second detection signal under the control of a switching unit 8 described later. The detection selection section 8 to output the detection selection section 7 according to the first detection signal level detected by the first level detection section 3 and the second detection signal level detected by the second level detection section 6. The switching unit 9 to be controlled is a multiple delay detection unit including a plurality of delay detection units having different delay amounts. Multiple delay detector 9
Is composed of a first delay detection section including a first delay section 1 and a first multiplication / smoothing section 2 and a second delay detection section including a second delay section 4 and a second multiplication / smoothing section 5. You.

FIGS. 2 (a) to 2 (d), 3 (a) to 3 (d)
FIG. 3 is a timing chart for explaining the operation of the phase modulation signal demodulation device in FIG. 1, in which the horizontal axis represents time (s), the vertical axis represents level, and the data frequency fd (frequency of data of 1, 0, that is, (Data transmission rate) = 1 Hz, delay time 1s of first delay unit 1, delay time 0.91 of second delay unit 4
It is an operation waveform in the case of 7s. FIG. 2 shows operation waveforms when the input signal frequency is 3 Hz, and FIG. 3 shows operation waveforms when the input signal frequency is 3.2 Hz. 2 (a) and 3 (a) show input signals, and FIGS. 2 (b) and 3 (b) show multiplication signals as a result of multiplication by the first multiplication / smoothing unit 2, FIGS. FIG. 3C shows a multiplication signal as a result of the multiplication performed by the second multiplication / smoothing unit 5, and FIGS.
(D) is an output signal of the detection selection unit 7. FIG. 2 (a),
The phase of the input signal in FIG. 3A is 0, 1 when 0 ≦ t <1 s.
≦ t <3s, π, and 3 ≦ t <5s, 0. When the input signal frequency is 3 Hz, the multiplication result of the first multiplication / smoothing unit 2 is larger than the multiplication result of the second multiplication / smoothing unit 5. Therefore, the output signal (detection signal) of the first multiplication / smoothing unit 2 is larger than the output signal (detection signal) of the second multiplication / smoothing unit 5. Switching section 8 according to the detection signal level of first multiplication and smoothing section 2 detected by first level detection section 3 and the detection signal level of second multiplication and smoothing section 5 detected by second level detection section 6. Controls the detection selection unit 7 to select the first multiplication / smoothing unit 2. The detection selection unit 7 is the first
And outputs a detection signal from the multiplication / smoothing unit 2. Similarly, when the input signal frequency is 3.2 Hz, the detection selection unit 7
Outputs the detection signal from the second multiplying / smoothing unit 5.

In the present embodiment, the plurality of delay detectors 9 are composed of two delay detectors. However, the present invention is not limited to this, and the number of delay detectors may be three or more. It has a function and effect. In addition, since the detected signal level is used for control, the detected signal may be inverted to cause a problem. In this case, it is possible to cope with the inversion of data by monitoring the transmission synchronization code.

As described above, according to the present embodiment, a plurality of detections are performed by using a plurality of delay units 1 and 4 having different delay amounts, and an output signal (detection signal) of the optimum delay detection unit is selected. By doing so, it is possible to suppress a decrease in the reception level even when the input signal frequency is greatly shifted, and it is possible to obtain good reception characteristics.

(Embodiment 2) FIG. 4 is a block diagram showing a phase modulation signal demodulating apparatus according to Embodiment 2 of the present invention.

In FIG. 4, reference numeral 20 denotes a first delay unit as a delay unit in a preceding stage for delaying an input signal by about a data period;
Reference numeral 21 denotes a first multiplication / smoothing unit that smoothes the result of multiplying the input signal by the output signal of the first delay unit 20 and outputs the result as a first detection signal, and 22 denotes an output signal of the first delay unit 20 A second delay unit as a subsequent delay unit that delays
23 is a second multiplier for smoothing the result of multiplying the input signal by the output signal of the second delay unit 22 and outputting the result as a second detection signal, and 24 is a multiple delay detector. The multiple delay detection unit 24 includes a first delay detection unit including a first delay unit 20 and a first multiplication and smoothing unit 21 and a second delay including a second delay unit 21 and a second multiplication and smoothing unit 22. It consists of a detector.

The operation of the phase-modulated signal demodulating apparatus according to the present embodiment is the same as that of the first embodiment, and a description thereof will be omitted.

In the present embodiment, the multiple delay detectors 24 are composed of two delay detectors. However, the present invention is not limited to this, and three or more delay detectors may be used. It has a function and effect. In addition, since the detected signal level is used for control, the detected signal may be inverted to cause a problem. In this case, it is possible to cope with the inversion of data by monitoring the transmission synchronization code.

As described above, according to the present embodiment, the output signal of the first delay unit 20 as the delay unit at the preceding stage is delayed by the second delay unit 22 as the delay unit at the subsequent stage. The total delay amount of the plurality of delay units can be smaller than the case where delays are performed by separate delay units as in the first embodiment. Therefore, the size of the delay unit can be reduced, and the size of the device can be reduced.

(Embodiment 3) In Embodiments 1 and 2, even if the frequency of an input signal is shifted due to a frequency deviation, the maximum detected signal level is increased if the frequency corresponds to a plurality of differential detections. can get. However, if the frequency of the input signal deviates significantly from the corresponding frequency, the detection signal level decreases. In the first and second embodiments, it is necessary to increase the number of delay detection units and delay units in order to smoothly cope with the frequency deviation.

The phase modulation signal demodulating apparatus according to the present embodiment solves the above-mentioned problem. In the present embodiment,
It has a variable phase section that can arbitrarily set the phase of the signal, and a delay detection section that performs delay detection by changing the phase of the input signal, a level detection section that detects the detection signal level, and a detection level that is detected by the level detection section. A phase control unit that controls the phase of the variable phase unit in response to the request.

FIG. 5 is a block diagram showing a phase modulation signal demodulating apparatus according to Embodiment 3 of the present invention.

In FIG. 5, reference numeral 25 denotes a fixed delay unit for delaying an input signal by a data period, 26 denotes a variable phase unit which can arbitrarily set the phase of the input signal under the control of a phase control unit 29 described later, and 27 denotes an input. A multiplication / smoothing unit that smoothes the result of multiplying the signal by the delay signal via the fixed delay unit 25 and the variable phase unit 26 and outputs the result as a detection signal; and 28 detects the level of the detection signal from the multiplication / smoothing unit 27 The level detector 29 controls the variable phase unit 26 to optimize the detection result of the level detector 28 (to maximize the detection signal level), and the phase controller 30 includes the variable phase unit 26. This is a delay detection unit that performs delay detection by changing the phase of the input signal.

FIGS. 6 (a), 6 (b) and 6 (c) are timing charts for explaining the operation of the phase modulation signal demodulator of FIG. 5, in which the horizontal axis represents time (s) and the vertical axis represents level. Show. FIG.
6A shows an input signal, and FIG.
7 shows a multiplication signal as a result of multiplication, and FIG. 6C shows an output signal (detection signal) of the multiplication / smoothing unit 27. here,
It is assumed that the delay amount of the fixed delay unit 25 is 1 s, the data period is 1 s, the delay amount of the variable phase unit 26 is ignored, and only the phase amount changes. The phase of the input signal is 0 ≦ t <1s and 0, 1 ≦ t <3
s at π, 0 at 3 ≦ t <5s, 0 at 7 ≦ t <7s, 7 ≦ t
Π at <9 s, 0 at 10 ≦ t <12 s, and the frequency of the input signal is 3.3 Hz. The phase control unit 29 satisfies 1 ≦ t <3
s, the phase change amount is 0, and 3 ≦ t <5s, the phase change amount is 30 degrees,
The variable phase unit 26 is controlled so that the phase change amount is 60 degrees when 5 ≦ t <7 s and the phase change amount is 90 degrees when 7 ≦ t <9 s.
When the phase change amount of the variable phase unit 26 is 90 degrees, the output signal level of the multiplication / smoothing unit 27 becomes the largest. According to the detection level of the level detection unit 28, after the time 9s, the phase control unit 27 controls the variable phase unit 26 so as to keep the variable phase unit 27 at 90 degrees. In the above, if the step width of the phase change is made fine or the manner of the phase change is changed, accurate and quick response control becomes possible.

In this embodiment, since the detected signal level is used for control, the detected signal may be inverted to cause a problem. In such a case, use of inversion of data or phase control
9 can be dealt with.

As described above, according to the present embodiment, by using the variable phase section that can change an arbitrary phase amount in the differential detection, the correction for the frequency deviation of the input signal can be performed as compared with the first and second embodiments. Can be optimized. Therefore, a uniformly high detection signal level can be obtained within the frequency deviation range of the input signal, and the reception performance can be improved.

(Embodiment 4) In Embodiment 3, since the fixed delay section 25 and the variable phase section 26 are connected in series, a multiplication smoothing section of the input signal and the output of the variable phase section 26 is actually used on the substrate. The wiring to 27 cannot be performed efficiently.

The present embodiment solves the above-mentioned problems, and includes a fixed delay unit for delaying an input signal by a fixed delay amount, a variable phase unit capable of arbitrarily setting a signal phase, and an output of the fixed delay unit. A delay detection unit having a multiplication smoothing unit for smoothing a result obtained by multiplying the output of the variable phase unit is provided.

FIG. 7 is a block diagram showing a phase modulation signal demodulating apparatus according to Embodiment 4 of the present invention.

In FIG. 7, the level detector 28 and the phase controller 29 are the same as those in FIG.
Description is omitted. 34 is a fixed delay unit that delays the signal by a fixed amount, 35 is a variable phase unit that changes the phase according to the control of the phase control unit 29, and 36 is the output signal of the fixed delay unit 34 and the output signal of the variable phase unit 35. A multiplication / smoothing unit 37 for performing detection is a delay detection unit including a fixed delay unit 34, a variable phase unit 35, and a multiplication / smoothing unit 36. The output signal of the fixed delay unit 34 and the output signal of the variable phase unit 35 are input to the multiplying and smoothing unit 36 through separate signal lines.

The operation in this embodiment is the same as that in the third embodiment.
Therefore, the description is omitted.

In this embodiment, since the detected signal level is used for control, the detected signal may be inverted to cause a problem. In such a case, use of inversion of data or phase control
9 can be dealt with.

As described above, according to the present embodiment, the output signal of the fixed delay section 34 and the output signal of the variable phase section 35 are input to the multiplication / smoothing section 36, whereby the fixed delay section 34 and the variable delay section 35 can be arranged in parallel on the board, and the board can be easily mounted.

[0040]

As described above, according to the phase modulation signal demodulating apparatus according to the first aspect of the present invention, a plurality of delay detecting sections having a plurality of delay detecting sections having different delay amounts, and a signal outputted from the delay detecting section. A plurality of level detectors for detecting the level of a detection signal to be detected, a detection selector for selecting an optimal delay detector from among the plurality of delay detectors and outputting a detection signal, and a plurality of level detectors for detecting the detection signal. By having a switching unit that controls the detection selection unit based on the level of the detection signal, an optimal delay detection unit can be selected from among a plurality of delay detection units, so that a large frequency shift occurs in the input signal. However, the advantageous effect that the reduction of the received signal level can be suppressed can be obtained.

According to the invention of claim 2, according to claim 1,
In the invention described in the above, the multiple delay detection unit has a delay detection unit consisting of a plurality of stages, the delay detection unit by using the delay signal of the previous stage as an input signal, the signal delayed by the delay detection unit of the previous stage Since the delay units can be used, the total delay amount of the plurality of delay units can be reduced as compared with the case where delays are performed by separate delay units, and the advantageous effect that the delay units can be downsized and the device can be downsized. Is obtained.

According to the third aspect of the present invention, there is provided a delay detecting section having a variable phase section capable of changing a phase of an input signal, and performing a delay detection by changing a phase of the input signal with the variable phase section. And, by having a level detection unit that detects the level of the detection signal output from the delay detection unit, and a phase control unit that changes the phase of the input signal in the variable phase unit based on the level of the detected detection signal, Even if a large frequency deviation occurs in the input signal, optimization correction can be performed by the variable phase section, so that a uniformly high detection signal level can be obtained within the frequency deviation range of the input signal, and the reception performance can be improved. Improvement can be achieved.

According to the invention set forth in claim 4, according to claim 3,
In the invention described in the above, the delay detection unit arranges a fixed delay unit and a variable phase unit for delaying an input signal in parallel, and outputs a delay signal output from the fixed delay unit and a delay signal output from the variable phase unit. The fixed delay unit and the variable phase unit can be arranged in parallel on the board by providing a multiplying and smoothing unit that smoothes the signal obtained by multiplying The advantageous effect that it can be obtained is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a phase modulation signal demodulation device according to a first embodiment of the present invention.

2A is a timing chart for explaining the operation of the phase modulation signal demodulation device in FIG. 1; FIG. 2B is a timing diagram for explaining the operation of the phase modulation signal demodulation device in FIG. 1; 1. Timing diagram for explaining operation of phase modulation signal demodulation device (d) Timing diagram for explaining operation of phase modulation signal demodulation device in FIG.

3A is a timing chart for explaining the operation of the phase modulation signal demodulation apparatus in FIG. 1; FIG. 3B is a timing chart for explaining the operation of the phase modulation signal demodulation apparatus in FIG. 1; 1. Timing diagram for explaining operation of phase modulation signal demodulation device (d) Timing diagram for explaining operation of phase modulation signal demodulation device in FIG.

FIG. 4 is a block diagram showing a phase modulation signal demodulation device according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a phase modulation signal demodulation device according to a third embodiment of the present invention.

6A is a timing chart for explaining the operation of the phase modulation signal demodulation device in FIG. 5; FIG. 6B is a timing chart for explaining the operation of the phase modulation signal demodulation device in FIG. 5; Timing diagram for explaining operation of phase modulation signal demodulation device

FIG. 7 is a block diagram showing a phase modulation signal demodulation device according to a fourth embodiment of the present invention.

FIG. 8 is a block diagram showing a conventional phase modulation signal demodulation device.

9A is a timing chart showing signal waveforms of various parts in the phase modulation signal demodulation apparatus of FIG. 8; FIG. 9B is a timing chart showing signal waveforms of various parts in the phase modulation signal demodulation apparatus of FIG. 8; 8 is a timing chart showing signal waveforms of various parts in the signal demodulation apparatus. (D) A timing chart showing signal waveforms of various parts in the phase modulation signal demodulation apparatus of FIG.

[Explanation of symbols]

 1, 20 First delay unit 2, 21 First multiplication / smoothing unit 3 First level detection unit 4, 22 Second delay unit 5, 23 Second multiplication / smoothing unit 6 Second level detection unit 7 Detection Selection unit 8 Switching unit 9, 24 Multiple delay detection unit 25, 34 Fixed delay unit 26, 35 Variable phase unit 27, 36 Multiplication smoothing unit 28 Level detection unit 29 Phase control unit 30, 37 Delay detection unit

Claims (4)

[Claims] 1. A plurality of delay detectors having a plurality of delay detectors having different delays, a plurality of level detectors for detecting a level of a detection signal output from the delay detector, and the plurality of delay detectors. A detection selection unit that selects an optimal delay detection unit from among them and outputs a detection signal, and a switching unit that controls the detection selection unit based on the levels of the detection signals detected by the plurality of level detection units. A phase modulation signal demodulation device characterized by the above-mentioned. 2. The phase modulation apparatus according to claim 1, wherein the plurality of delay detectors include a delay detector having a plurality of stages, and the delay detector uses a delay signal of a preceding stage as an input signal. Signal demodulator. 3. A delay detection section having a variable phase section capable of changing the phase of an input signal, wherein the variable phase section changes the phase of the input signal to perform delay detection, and an output from the delay detection section. A phase detection unit that detects a level of a detected signal to be detected, and a phase control unit that changes a phase of an input signal in the variable phase unit based on the level of the detected detection signal. Demodulator. 4. The delay detection section, wherein a fixed delay section for delaying an input signal and the variable phase section are arranged in parallel, and a delay signal output from the fixed delay section and an output signal from the variable phase section are provided. 4. The phase modulation signal demodulation device according to claim 3, further comprising a multiplication / smoothing unit for smoothing a signal obtained by multiplying the signal by multiplying the signal by a delay signal and outputting the signal as a detection signal.