JPH11341024A - Method for determining node address - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a node address determining method capable of executing the reduction of a parts loading area, the reduction of cost and the improvement of working efficiency. SOLUTION: In a system constituted by connecting BS-IF substrates 12a to 12n to be plural modules to a main control part 11, node addresses (1 to n) to be determined are outputted from the main control part 11 to plural BS-IF substrates 12a to 12n, which respectively display the node address outputted from the main control part 11, and an operator turns on a switch corresponding to the BS-IF substrate using a certain displayed node address to store the node address in a storage part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a node address determining method for determining node addresses of a plurality of modules in a system in which a main controller and a plurality of modules are connected by a line.

[0002]

2. Description of the Related Art In a system in which a main controller and a plurality of modules are connected by a line, a fixed address (node address) is assigned to each module so that the main controller recognizes each module. ing. Conventionally, with respect to the assignment of the node address, that is, the method of determining the node address, a Dip-SW (switch) for specifying each module by a binary address
Also, a rotary SW (switch) for specifying a hexadecimal address is attached, and the node address of each module is determined based on the indicated value of these switches.
In this case, each module recognizes each node address by reading and storing the indicated value of the switch attached to each module.

[0003]

However, in the prior art in which such a switch is attached to each module and the node address of each module is determined based on the indicated value, the following problems occur. . First, a switch for indicating a node address is attached to each module. However, as the number of modules constituting the system increases, the number of addresses also increases. Therefore, when the number of modules increases, the number of bits representing the address increases. Must also be increased, which increases the component mounting area,
This leads to an increase in component prices. Also, when building the system,
The switches of each module must be set to their respective addresses, resulting in low work efficiency.

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art such as increasing the component mounting area, increasing the component price, and lowering the work efficiency by providing a switch for determining the node address. An object of the present invention is to provide a node address determination method capable of reducing the area, reducing the cost, and improving the work efficiency.

[0005]

In order to solve the above-mentioned problems, the present invention provides a main controller (for example, main controller 11).
And a plurality of modules (for example, BS-IF boards 12a-1
2n), wherein the node address to be determined is output from the main controller to the plurality of modules in the node address determination method wherein the node addresses of the plurality of modules are determined. (S3, S8, S13), a step of displaying the node address output by the main controller (S4, S9, S14), and, for the module using the displayed node address, the node address is displayed. Step of storing (S4, S5, S9, S10,
S14, S15).

In the embodiment of the present invention, the above system is an example of a LAN communication system, a plurality of modules are BS-IF boards 12a to 12n connected to each of base stations 2a to 2n, and a node address. The display of
The operation is performed by the LED display device 122 provided on each of the BS-IF boards 12a to 12n as the modules. As means for storing the node address in each module, an on / off switch 124 is provided in each module, and when this switch 124 is turned on, the CPU 121 stores the node address in the storage unit 123 from the main control device (main control unit 11). The output node address is stored to determine the node address. Depending on the application system, the display device may not be provided in each module, but may be provided in an appropriate place (one or a plurality of places) where the node address display can be recognized.

According to such a configuration, unlike the related art, it is not necessary to provide a switch for indicating an address, the component mounting area can be reduced, the component price can be reduced, and the ON operation can be further reduced. Only with this, the node address can be determined, so that the work becomes easy and the work efficiency can be improved.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. In the embodiment, a plurality of base stations are controlled by a central controller to perform communication, for example, LA.
An example will be described for an N communication system. FIG. 1 shows a LAN
FIG. 1 is a block diagram illustrating a communication system. The communication system includes a central controller 1 and a bus 13 connected to the central controller 1.
And a plurality of base stations 2a to 2n connected to each other.

The central control unit 1 has a main control section 11 and a plurality of interface boards BS-IF boards 12a to 12n connected to the main control section 11. Multiple BSs
-IF boards 12a to 12n are formed of a common board, and base stations 2a to 2n are connected to the respective BS-IF boards 12a to 12n.

The main controller 11 controls each base station 2a to 2n, so that each of the substrates 12a to 12n
It is necessary to recognize whether or not 2n is connected.
Therefore, it is necessary to set a node address on each of the substrates 12a to 12n and determine the node address of each substrate.
Here, each of the boards 12a to 12n forms a module of the present invention, and the main control section 11 forms a main control device.

FIG. 2 is a block diagram showing a substrate which is a module. In FIG. 2, the BS-IF substrate 12
Is provided on the surface of the housing of the substrate 12 and is connected to the CPU 121, and is turned on / off for determining the node address by the on operation of the LED display device 122 connected to the CPU 121 via the port 125. It has a switch 124 and a storage unit 123 connected to the CPU 121 for storing the determined node address.

Conventionally, the on / off switch 124
Are composed of a Dip-switch or a rotary switch. The configuration of the number of bits of this switch causes an increase in a component mounting area, an increase in component price, and a decrease in work efficiency due to an address setting operation. In the present invention, since only the on / off switch 124 needs to be provided, the configuration of the number of bits is not required, and the address setting work is facilitated as described later.

Hereinafter, a node address determination operation as an operation of the embodiment will be described with reference to a flowchart of FIG. First, at the start-up of the system in step S1, when the node address determination process is started in step S2, the main controller 11 determines from the node address (1) from step S3 onward after step S3 to determine the node address. Start polling up to n). First,
In step S3, the main control unit 11 starts polling the node address (1).

In response to the polling of the node address (1), on the BS-IF board 12 side, the CPU 121
Since the node address (1) is displayed on the display device 122, in step S4, the operator sets the BS-IF board (12a) to be set to the node address.
To 12n, where the on /
The off switch 124 is momentarily turned on, and the node address (1) is stored in the storage unit 123 (step S
5). As a result, the node address of the board 12a is determined to be (1), and the CPU 121 determines that its own board 12a is determined to be the node address (1).
(Step S6). With this response, the main control unit 11 ends the polling of the node address (1) in step S7.

When the polling of the node address 1 is completed, the main controller 11 starts polling the node address (2) in step S8. In response to the polling of the node address (2), the BS-IF board 12
On the side, the CPU 121 uses the LED display device 122 to
Since the node address (2) is displayed, in step S9, the operator turns on / off the switch 124 of the BS-IF board (one of 12b to 12n, here, 12b) to be set to the node address. Is instantly turned on, and the node address (2) is stored in the storage unit 1
23 (step S10). As a result, the node address of the substrate 12b is determined to be (2), and the substrate 1
The CPU 121 of 2b replies to the main control unit 11 that its own substrate 12b has been determined to the node address (2) (step S11). With this response, the main control unit 11 ends the polling of the node address (2) in step S12.

Thereafter, the same processing is performed for the node addresses (3) to (n). When the node addresses of all the BS-IF boards are determined in step S18, the main control section determines in step S19. The processing shifts to the operation state of the address.

The above operation is also performed when the system is restarted. However, if it is not necessary to reset (determine) the node address, the main control unit 11 operates the BS-controller for a predetermined time.
On condition that no response is received from the IF board, the main control section 11 proceeds to the next operation. After repeating the same operation for the number of boards (modules) while updating the node address, the processing proceeds to the next processing. I do. Therefore, all B
When it is not necessary to reset the node address for the S-IF boards 12a to 12n, the operator does not need to take any action for address setting. The measurement of the predetermined time during which the main control unit 11 waits for a response from each of the BS-IF boards 12a to 12n can be performed using, for example, a timer (not shown) built in the main control unit 11.

As described above, in the embodiment of the present invention, the polled node address is displayed on each of the BS-IF boards 12a to 12n for which the node address is to be determined, and the address is displayed by the operator. Confirm that the switch operation (ON operation) for the specified board
, It is possible to determine the node address of the board, so that the operation becomes easier as compared with the conventional node address determination method of adjusting a plurality of bits corresponding to the address, and The switch configuration for the address setting can be simplified.

In the embodiment, each BS-IF for each base station 2a to 2n in the LAN communication system is used.
Although the case where the node address of the board is determined has been described as an example, the present invention is not limited to such a LAN communication system. For example, various terminal devices and various measuring instrument groups and a main control for controlling them are provided. Obviously, the present invention can be applied to the determination of the addresses of all the nodes constituting the system with the device.

[0020]

As described in detail above, the present invention is applied to a system in which a main controller and a plurality of modules are connected, and determines node addresses of the plurality of modules. Outputting a node address to be determined from the main controller to the plurality of modules; displaying the node address output by the main controller;
Storing the node address for the module using the displayed node address, so that there is no need to provide a switch for address designation as in the related art, and the component mounting area can be reduced, The parts price can be reduced, and with only the ON operation,
Since the node address can be determined, the operation is facilitated, and the effect is achieved that the operation efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a LAN communication system according to an embodiment.

FIG. 2 is a block diagram showing a central control device.

FIG. 3 is a flowchart showing the operation of the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Central control apparatus 2a-2n Base station 11 Main control part 12,12a-12n BS-IF board (module) 121 CPU 122 LED display 124 On / off switch

Claims (1)

[Claims] 1. A node address determination method applied to a system in which a main control device and a plurality of modules are connected, wherein node addresses of the plurality of modules are determined, wherein a node to be determined from the main control device is provided. Outputting an address to the plurality of modules; displaying a node address output by the main controller; and storing the node address for a module using the displayed node address. A node address determination method comprising: