JPH11331706A - Solid-state image-pickup element, its drive method and camera system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image-pickup element, its driving method and a camera system, capable of effectively extending a dynamic range at the time of setting up a pixel added reading mode. SOLUTION: A CCD imager is constituted so as to properly switch a pixel independent reading mode and a pixel added reading mode, the output conversion efficiency of an output part 24 is switched through a conversion efficiency switching part 14 in accordance with a mode set by a mode setting part 12, so that the output conversion efficiency is set to a high value in the pixel independent reading mode and set to a low value in the pixel added reading mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, a method of driving the same, and a camera system. The present invention relates to a switchable solid-state imaging device, a driving method thereof, and a camera system equipped with the solid-state imaging device as an imaging device.

[0002]

2. Description of the Related Art As a solid-state imaging device, a mode in which signal charges of at least one pixel is read, for example, a mode in which signal charges of one pixel are independently read (hereinafter, referred to as a pixel independent read mode), and signal charges of a plurality of pixels are added. And a read mode (hereinafter referred to as a pixel addition read mode).
vice) There is a solid-state image sensor.

As an example, in an electronic still camera equipped with this kind of CCD solid-state imaging device as an imaging device, a high-resolution still image is obtained by setting a pixel independent reading mode, and a pixel addition reading mode is set. Accordingly, mode switching is performed to increase the frame rate and enable monitoring of the subject. This mode switching is realized by changing the drive timing of the CCD solid-state imaging device.

[0004]

A conventional C having such a configuration is described.
In the CD solid-state imaging device, 2
By adding and reading signal charges of pixels or more, sensitivity and frame rate can be improved,
The dynamic range could not be effectively expanded. This is because the amount of saturation signal, which is a parameter for determining the dynamic range, is limited by the amount of signal handled by the output section of the CCD solid-state imaging device or the operable voltage range of an external circuit connected to the output section. However, the saturation signal amount cannot be increased to the number of added pixels, which makes it difficult to effectively expand the dynamic range.

The present invention has been made in view of the above problems, and has as its object to provide a solid-state image pickup device capable of effectively expanding a dynamic range when a pixel addition readout mode is set, and a driving method thereof. , As well as a camera system.

[0006]

The solid-state imaging device according to the present invention selectively switches between a first reading mode for reading out signal charges of at least one pixel and a second reading mode for adding and reading out signal charges of a plurality of pixels. Mode setting means, and driving means for driving each part at a drive timing corresponding to each mode set by the mode setting means; output conversion efficiency is variable, and readout is performed in each set mode. Output means for converting the signal charges thus obtained into electric signals with an output conversion efficiency corresponding to each mode and outputting the electric signals.

In the driving method according to the present invention, a solid-state image pickup device capable of selectively setting a first read mode for reading signal charges of at least one pixel and a second read mode for adding and reading signal charges of a plurality of pixels. In the method, the output conversion efficiency of an output unit that converts signal charges into electric signals and outputs the electric signals is switched in accordance with each set mode. Further, a camera system according to the present invention has a configuration in which the solid-state imaging device having the above configuration is mounted as an imaging device.

In the above configuration, the output conversion efficiency is set high in the first read mode corresponding to the signal charge read mode. In the case of the first read mode, the saturation signal amount is limited by the signal amount handled by the vertical transfer unit or the photoelectric conversion unit of the pixel. When the second read mode is executed with this high output conversion efficiency, the saturation signal amount is limited by the handled signal amount of the output unit or the operable voltage range of an external circuit connected to the output unit,
The saturation signal amount cannot be increased by the number of pixels to be added.

On the other hand, in the second read mode, by setting the output conversion efficiency to be low, even if the saturation signal amount cannot be increased, the noise amount can be surely reduced. This makes it possible to increase the dynamic range that is inversely proportional to the amount of noise.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a schematic configuration diagram showing a CCD solid-state imaging device according to an embodiment of the present invention.

A CCD solid-state imaging device 10 according to this embodiment
Is a CCD imager 11 for obtaining imaging information, and the CC
A mode setting unit 12 for setting a signal charge readout mode in the D imager 11; and a driving timing corresponding to the mode set by the mode setting unit 12.
A drive system 13 for driving the CD imager 11 and a CCD corresponding to the mode set by the mode setting unit 12
A conversion efficiency switching unit 14 for switching the output conversion efficiency of the imager 11 is provided.

The CCD imager 11 has a plurality of photoelectric conversion elements (pixels) 21 which are two-dimensionally arranged in a matrix, convert incident light into signal charges having a charge amount corresponding to the light amount, and accumulate the signal charges.
Provided for each vertical column of the photoelectric conversion elements 21;
A plurality of vertical CCDs 22 for vertically transferring signal charges read from each photoelectric conversion element 21;
It has a horizontal CCD 23 for horizontally transferring one line (row) of signal charges transferred from 2 and an output unit 24 for converting the signal charges transferred by the horizontal CCD 23 into electric signals and outputting the electric signals.

In the CCD imager 11, an output unit 24 includes a floating diffusion (FD) unit 241 for converting signal charges sequentially transferred from the horizontal CCD 24 into a signal voltage (electric signal), and a reset drain (RD) for discharging charges. ) Portion 242 and the charges in the floating diffusion portion 241
And a reset gate (RG) section 243 swept away by a floating diffusion amplifier configuration.

The CCD imager 11 has a mode setting unit 1
2. A configuration that can selectively adopt two modes, for example, a pixel independent read mode in which signal charges of one pixel are independently read out and a pixel addition read mode in which signal charges of a plurality of pixels are added and read out, for example, in accordance with the setting operation in 2. It has become. Switching between these modes is performed by the CCD imager 11.
, That is, the timing of various drive pulses output from the drive system 13 is changed.

The drive system 13 is composed of a timing generator and the like. For example, four-phase vertical transfer pulses φV1 to φV4 for driving and driving the vertical CCD 22;
For example, two-phase horizontal transfer pulses φH1 and φH2 for transferring and driving the CD 23, and the reset gate unit 2 of the output unit 24
By generating various drive pulses such as a reset pulse φRG applied to the gate electrode 43 (described later) of C
The drive of the CD imager 11 is performed.

Here, in the pixel addition readout mode, as an example, a case where signal charges of two pixels adjacent in the horizontal direction are added, and the addition of the signal charges is performed by the floating diffusion unit 241 of the output unit 24
In this case, the driving system 14 performs the reset pulse φRG applied to the gate electrode of the reset gate unit 243.
Mode switching is realized by changing the timing.

More specifically, when the pixel independent reading mode is set in the mode setting section 12, the driving system 13 controls the two-phase horizontal transfer pulse φH1,
Generates a reset pulse φRG1 having the same cycle as φH2,
When the pixel addition reading mode is set, a reset pulse φRG2 having a period twice as long as the horizontal transfer pulses φH1 and φH2 is generated by thinning out the reset pulse φRG1 every other pulse.

FIG. 2 is a plan pattern diagram showing an example of a specific configuration of the output unit 24, and FIG. 3 is a cross-sectional structure diagram along the line XX '.

As is apparent from these figures, the floating diffusion portion 241 and the reset drain portion 242 are connected to the P well 245 on the N-type semiconductor substrate 244.
Is formed by an N-type impurity layer at a predetermined distance on the surface side of the substrate. Further, the reset gate portion 246 includes a channel region 246 between the floating diffusion portion 241 and the reset drain portion 242 and, for example, two reset gate electrodes 24 disposed adjacently above the channel region 246.
7-1 and 247-2.

In the output section 24 having such a configuration, the two reset gate electrodes 247-of the reset gate section 243 are provided.
1, 247-2 correspond to the respective modes set by the mode setting unit 12, and the reset pulse φRG (φRG1 / φR) having a predetermined cycle from the conversion efficiency switching unit 14 shown in FIG.
G2) or a predetermined bias voltage Vo is applied.

Specifically, the conversion efficiency switching unit 14
When the pixel independent reading mode is set in the mode setting unit 12, the reset pulse φRG1 output from the driving system 13 is applied to the reset gate electrode 247-1, and a sufficiently high bias voltage Vo is applied to the reset gate electrode 247-2. . When the pixel addition read mode is set, the reset pulse φRG2 output from the drive system 13 is applied to the reset gate electrode 247-2, and a sufficiently high bias voltage Vo is applied to the reset gate electrode 247-1.

Here, when the pixel independent reading mode is set, a sufficiently high bias voltage Vo is applied to the reset gate electrode 247-2, so that the potential of the channel region below the reset gate electrode 247-2 is reduced. And becomes a part of the reset drain portion 242 in effect. Accordingly, in the reset gate unit 243, the reset gate electrode 24 to which the reset pulse φRG1 is applied
The reset operation is performed only by 7-1.
The bias voltage Vo is applied to the reset gate electrode 247-2.
Is applied, the same reset operation can be performed by applying the same reset pulse φRG1 as that of the reset gate electrode 247-1.

On the other hand, when the pixel addition read mode is set, a sufficiently high bias voltage Vo is applied to the reset gate electrode 247-1, so that the potential of the channel region below the reset gate electrode 247-1 is deep. In effect, the floating diffusion unit 24
Part of 1. Thereby, the reset gate unit 243
In this case, the reset operation is performed only by the reset gate electrode 247-2 to which the reset pulse φRG2 is applied.

However, in the pixel addition reading mode, the capacity of the floating diffusion unit 241 becomes large, so that the output conversion efficiency of the output unit 24 is reduced. That is, assuming that the capacitance of the floating diffusion portion 241 is C and the value of the elementary charge is q,
Since the output conversion efficiency η of the output unit 24 is represented by η = q / C, the output conversion efficiency η of the output unit 24 decreases as the capacity of the floating diffusion unit 241 increases. Here, if the output conversion efficiency in the pixel independent reading mode is η1 and the output conversion efficiency in the pixel addition reading mode is η2, the relationship is η1> η2.

As is apparent from this, when the pixel independent read mode is set, the reset pulse φRG1 is applied to the reset gate electrode 247-1 on the floating diffusion portion 241 side, while the pixel addition read mode is set. Sometimes, the reset pulse φRG2 is applied to the reset gate electrode 247-2 on the reset drain portion 242 side, and the bias voltage Vo is applied to the reset gate electrode 247-1, so that the pixel independent read mode and the pixel The output conversion efficiency η can be switched in the addition reading mode.

When the pixel independent reading mode is set, the reset pulse φRG1 applied to the reset gate electrode 247-1 is a pulse having the same cycle as the horizontal transfer pulses φH1 and φH2. Are transferred one by one, and the signal voltage Vsi
Output as g.

On the other hand, when the pixel addition read mode is set, the reset pulse φRG2 applied to the reset gate electrode 247-2 is a pulse having a cycle twice as long as the horizontal transfer pulses φH1 and φH2, and the reset operation in the reset gate unit 243 is performed. Is thinned out once, in the floating diffusion unit 241, the signal charges transferred from the horizontal CCD 23 are added and read out by two packets (two pixels) at a time, and output as the signal voltage Vsig.

Next, the CCD according to the present embodiment having the above configuration will be described.
The operation of the solid-state imaging device 10 will be described with reference to the timing chart of FIG. In the timing chart of FIG. 4, (a) shows the horizontal transfer pulses φH1 and φH2 and the reset pulse φRG1 in the pixel independent read mode.
(B) shows the horizontal transfer pulses φH1 and φH in the pixel addition readout mode.
2, the timing relationship between the reset pulse φRG2 and the output waveform OUT is shown.

First, when the pixel independent reading mode is set in the mode setting section 12, the driving system 13 generates a reset pulse φRG1 having the same cycle as the horizontal transfer pulses φH1 and φH2. At this time, the conversion efficiency switching unit 14 selects the reset pulse φRG1 and supplies the reset pulse φRG1 to the reset gate electrode 247-1 of the output unit 24, and also applies the bias voltage Vo to the reset gate electrode 247-2.

As a result, the reset gate electrode 247-2
The channel region in the lower part of the
And the reset gate 243 is connected to the horizontal CC.
The reset operation is performed in the transfer cycle of D23. As a result, in the floating diffusion unit 241, the horizontal CC
The operation of reading the signal charges transferred from D23 one packet at a time, converting the signal charges to the signal voltage Vsig, and outputting the signal voltage Vsig is performed.

Next, when the pixel addition reading mode is set in the mode setting section 12, the drive system 13 generates a reset pulse φRG2 having a cycle twice as long as the horizontal transfer pulses φH1 and φH2. At this time, the conversion efficiency switching unit 14 selects the reset pulse φRG2 and supplies the reset pulse φRG2 to the reset gate electrode 247-2 of the output unit 24, and also applies the bias voltage Vo to the reset gate electrode 247-1.

As a result, the reset gate electrode 247-1
Is a part of the floating diffusion portion 241 and the reset gate portion 2
In the reference numeral 43, the reset operation is skipped once and the reset operation is performed in a cycle twice as long as the transfer cycle of the horizontal CCD 23. As a result, in the floating diffusion unit 241,
The signal charges transferred from the horizontal CCD 23 are added by two packets (two pixels) and read out, and the signal voltage Vsig
The operation of converting the data to the output is performed.

As described above, the output conversion efficiency of the output section 24 of the CCD imager 11 is made variable in accordance with the signal charge readout mode. A pixel addition reading mode in which the output conversion efficiency is set low can be realized. As a result, the sensitivity in the pixel independent reading mode can be improved.

Further, the dynamic range in the pixel addition reading mode can be expanded for the following reasons. The dynamic range DR is represented by DR = (saturated signal amount) / (noise amount). Hereinafter, the saturation signal amount and the noise amount are values in voltage conversion.

In the pixel independent read mode, the saturation signal amount is limited by the signal amount handled by the vertical CCD 22 or the photoelectric conversion element 21 of the pixel. However, when the pixel addition reading mode is executed with the same high output conversion efficiency as in the pixel independent reading mode, as described above,
The amount of saturation signal is limited by the amount of signal handled by the output unit 24 of the CCD imager 11 or the operable voltage range of an external circuit connected to the output unit 24.
Therefore, even if the pixel addition read mode is executed, the saturation signal amount cannot be increased by the number of pixels added.

On the other hand, if the output conversion efficiency is set low in the pixel addition reading mode as in the CCD solid-state imaging device 10 according to the present embodiment, the amount of noise can be assured even if the saturation signal amount cannot be increased. , The dynamic range DR can be increased.

As an example, assume that the number of pixels to be added in the pixel addition readout mode is 2, and the ratio of low output conversion efficiency to high output conversion efficiency is 1/2. Here, even if the pixel addition reading mode is performed with high output conversion efficiency, the saturation signal amount does not double for the above-described reason. However, the amount of noise due to dark current is √2 times. Therefore, the dynamic range DR is a value smaller than √2 times.

If the amount of the saturation signal hardly increases, the dynamic range DR is rather reduced by a factor of 1 / √2. On the other hand, when signal charges are read out with low output conversion efficiency, the noise amount due to dark current is 1 / √2 times, although the saturation signal voltage value is not changed. Therefore, the dynamic range DR should be increased by 2 times. Can be.

In the present embodiment, the present invention is applied to a CCD solid-state imaging device having a configuration in which the two modes, that is, the pixel independent read mode and the pixel addition read mode, can be appropriately selected. The present invention is also applicable to a CCD solid-state imaging device having a configuration in which three or more modes can be appropriately selected as a changed multi-mode. In this case, the output unit 24 has three reset gate electrodes corresponding to the number of modes. What is necessary is just to arrange adjacently and to switch output conversion efficiency to three or more steps.

In this embodiment, a plurality of reset gate electrodes are arranged adjacent to each other, an appropriately high bias voltage Vo is applied to these reset gate electrodes, and the output conversion efficiency is switched by changing the capacitance of the floating diffusion portion 241. Although the configuration is not limited to this, the point is that the output conversion efficiency can be switched by changing the capacity of the floating diffusion section 241. Therefore, the capacity of the floating diffusion section 241 corresponds to the mode. Any configuration can be used as long as it can be switched.

In this embodiment, the signal charges of two pixels in the horizontal direction are added. However, the signal charges of three or more pixels in the horizontal direction are added, the signal charges of a plurality of pixels in the vertical direction are added, or The addition of the signal charges of a plurality of pixels in both the vertical and horizontal directions may be performed, and the location where the addition processing is performed is not limited to the floating diffusion unit 241, but may be in the vertical CCD 22 or the horizontal CCD 23.

Further, in the pixel independent readout mode according to the present embodiment, signal charges for one pixel are read out independently. In this readout mode, signal charges for a plurality of pixels are added and read out. May be. In that case, in the other pixel addition reading mode, signal charges of a larger number of pixels are added and read.

FIG. 5 is a schematic diagram showing an example of a camera system to which the present invention is applied. In FIG. 5, incident light from a subject is transmitted by an optical system including a lens 31 to CC.
An image is formed on the imaging surface of the D solid-state imaging device 32. As the CCD solid-state imaging device 32, a CCD imager according to the above-described embodiment, that is, a CCD having a configuration in which a plurality of modes can be appropriately selected as a signal charge reading mode and an output conversion efficiency can be switched according to the mode. An imager 10 is used.

The CCD imager 10 includes the driving system 1 shown in FIG.
3 and system control system 33 including conversion efficiency switching unit 14
Is driven and controlled. The system control system 33 controls the reading mode of the CCD imager 10 based on the mode information given from the mode setting unit 34 (corresponding to the mode setting unit 12 in FIG. 1), and controls the switching of the output conversion efficiency. Do. The output signal of the CCD imager 10 is subjected to various signal processing by a signal processing system 35 and is output as an image signal.

The camera system having such a configuration is used, for example, as an electronic still camera. In this electronic still camera, setting the pixel addition readout mode in the mode setting unit 34 is equivalent to reducing the number of pixels, and can increase the frame rate. By setting a low output conversion efficiency, the dynamic range can be effectively expanded.

Further, by setting the pixel-independent readout mode in the mode setting section 34, the signal charges of all the pixels are read out independently, so that a high-resolution still image can be obtained and high output conversion efficiency can be obtained. Is set, it is possible to maintain a high output value in sensitivity characteristics and the like.

In the present application example, the case where the camera system according to the present invention is used as an electronic still camera has been described as an example. However, the present invention is not limited to this application example, but is applied to a general video camera or the like. Is also applicable.

[0048]

As described above, according to the present invention,
Since the output conversion efficiency is variable according to the signal charge read mode, the pixel independent read mode in which the output conversion efficiency is set high and the pixel addition read mode in which the output conversion efficiency is set low can be realized. In the independent readout mode, a high output value can be maintained due to sensitivity characteristics and the like, while in the pixel addition readout mode, the dynamic range can be effectively expanded.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of the present invention.

FIG. 2 is a plan pattern diagram illustrating an example of a specific configuration of an output unit.

FIG. 3 is a sectional structural view taken along line XX ′ of FIG. 2;

4A and 4B are timing charts for explaining the operation of the CCD solid-state imaging device according to the present invention, wherein FIG. 4A is a timing relationship in a pixel independent read mode, and FIG. 4B is a timing relationship in a pixel addition read mode. Are respectively shown.

FIG. 5 is a schematic configuration diagram illustrating an example of a camera system to which the present invention is applied.

[Explanation of symbols]

11 ... CCD imager, 12 ... Mode setting part, 13 ...
Drive system, 14: conversion efficiency switching unit, 21: photoelectric conversion element (pixel), 22: vertical CCD, 23: horizontal CCD, 2
4 output section, 241 floating diffusion section, 242 reset drain section, 243 reset gate section, 247-1, 247-2 ... reset gate electrode

Claims (9)

[Claims] 1. Mode setting means for selectively setting a first mode for reading out signal charges of at least one pixel and a second mode for adding and reading out signal charges of a plurality of pixels; and setting by the mode setting means. Driving means for driving each section at a driving timing corresponding to each of the modes, and a signal charge read out in each mode set by the mode setting means, the output conversion efficiency of which is variable, corresponding to each mode. And an output means for converting an electric signal into an electric signal at an output conversion efficiency and outputting the electric signal. 2. The solid-state imaging device according to claim 1, wherein an output conversion efficiency in the second mode is set lower than an output conversion efficiency in the first mode. 3. The floating diffusion section for converting the transferred electric charges to an electric signal,
A reset drain portion that discharges electric charges; and a plurality of reset gate electrodes provided adjacent to each other between the floating diffusion portion and the reset drain portion. At least one of the plurality of reset gate electrodes has 2. The solid-state imaging device according to claim 1, wherein a reset pulse is given at a predetermined cycle. 4. The output unit is provided with a clock pulse having a cycle of n times (n is an integer of 2 or more) a transfer clock pulse of a charge transfer unit that transfers charges to the floating diffusion unit, as the reset pulse. The solid-state imaging device according to claim 3, wherein: 5. A method for driving a solid-state imaging device, wherein a first mode for reading signal charges of at least one pixel and a second mode for adding and reading signal charges of a plurality of pixels are selectively set, A method for driving a solid-state imaging device, wherein an output conversion efficiency of an output unit that converts a signal charge into an electric signal and outputs the electric signal is switched according to each set mode. 6. The method according to claim 5, wherein the output conversion efficiency in the second mode is set lower than the output conversion efficiency in the first mode. 7. The output section is provided adjacent to each other between the floating diffusion section for converting transferred electric charges to an electric signal, a drain section for discharging electric charges, and the floating diffusion section and the drain section. 6. The driving method for a solid-state imaging device according to claim 5, further comprising a plurality of reset gate electrodes, wherein the output conversion efficiency is switched by changing a capacitance of the floating diffusion portion. 8. A mode setting means for selectively setting a first mode for reading signal charges of at least one pixel and a second mode for adding and reading signal charges of a plurality of pixels, and setting by the mode setting means. Driving means for driving each section at a driving timing corresponding to each of the modes, and a signal charge read out in each mode set by the mode setting means, the output conversion efficiency of which is variable, corresponding to each mode. A camera system comprising, as an imaging device, a solid-state imaging device having output means for converting an electric signal with an output conversion efficiency and outputting the electric signal. 9. The camera system according to claim 8, wherein an output conversion efficiency in the second mode is set lower than an output conversion efficiency in the first mode.