JPH11327891A - Electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a system program from being erased or re-written by a misoperation and a malfunction. SOLUTION: It is judged whether the both of flags 'writing permission 1' and 'writing permission 2' are ON or not and an error is displayed so as to execute shift to power source OFF waiting unless the both are ON. In the meantime, when the both are ON, an output port signal is made to be a HIGH level and a writing permission signal (WR) is made to be effective. Then, the system program stored in a program flash memory 5 is erased. Then, the new system program is read from a personal computer 9 with a serial communication port (UART) and written in the program flash memory 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device which operates according to a program stored in a flash memory. The present invention particularly relates to an electronic apparatus for preventing a program stored in a flash memory from being rewritten due to erroneous operation or erroneous operation.

[0002]

2. Description of the Related Art In recent years, electronic devices such as notebook personal computers, personal digital assistants (PDAs), etc.
As disclosed in Japanese Patent Application Laid-Open No. 4776 and Japanese Patent Application Laid-Open No. 10-11279, a system program is stored in a flash memory and rewritten as necessary.

A flash memory is one of non-volatile memories. Data is not erased even when the power is turned off, and can be easily rewritten by executing a rewriting program.
On the other hand, if the rewriting program is executed due to an erroneous operation and the system program is erased, the electronic device cannot operate normally.

Conventionally, in order to prevent erasure and rewriting due to such erroneous operation, the power is turned on while a specific key is being depressed, a password is required, and rewriting is performed only when these conditions are satisfied. In some cases, a confirmation procedure is provided in a rewriting program.

[0005]

However, if the rewrite program runs away due to the influence of electrical noise or the like, the write module may be erroneously called and the system program may be rewritten.

Further, even when the rewriting program is normally executed, if the power is turned off during erasing or writing of the system program, the electronic device will not start up again.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its first object to provide an electronic apparatus capable of preventing a system program from being erased or rewritten due to erroneous operation or erroneous operation.

A second object of the present invention is to provide an electronic device which can recover even if the power is accidentally turned off while erasing or rewriting a system program.

[0009]

The present invention has the following configuration to achieve the above object.

[0010] The invention relating to the electronic device according to claim 1 is as follows.
A non-volatile memory storing a program, a memory storing flag information for permitting rewriting of the program, a flag rewriting means for rewriting the flag information, and enabling a write permission signal for the non-volatile memory based on the flag information / Invalidation control means, and a rewriting means for rewriting a program when the write permission signal is valid.

With this configuration, when the rewriting of the program is started, the write control means determines whether or not the flag information indicates that rewriting is permitted, and activates the write permission signal only when the flag information indicates that rewriting is permitted. And By switching the validity / invalidity of the write permission signal for physically rewriting based on the flag information, it is possible to prevent the program from being rewritten due to erroneous operation or erroneous operation.

According to a second aspect of the present invention, in the electronic apparatus of the first aspect, the memory stores a plurality of pieces of flag information, and the conditions for rewriting the plurality of pieces of flag information are sequentially stored in a predetermined program rewriting procedure. In connection with the operation to be performed, the write control means adopts a configuration in which the write permission signal is made valid when any of the plurality of flag information indicates rewrite permission.

[0013] With this configuration, the rewriting of the plurality of flag information can be performed sequentially by a program rewriting procedure.
For example, when the power is turned on, a predetermined key is depressed, and in response to the input of a correct password in response to the request for the password, the operation is performed. In this case, the flag information becomes rewrite-permitted, and when all of the plurality of flag information indicate rewrite permission, the write permission signal becomes valid, and the rewriting means rewrites the program. Therefore, rewriting of the program due to an erroneous operation can be prevented. Further, similarly to the first aspect, it is possible to prevent a program from being rewritten due to a malfunction.

According to a third aspect of the present invention, there is provided the electronic device according to the first or second aspect, wherein the write control means checks the flag information a plurality of times during the program rewriting procedure.

According to this configuration, even if the rewriting procedure is performed abnormally and the rewriting procedure proceeds without checking one piece of flag information, if the other flag information indicates that the rewriting procedure indicates that rewriting is not possible, the write The control means invalidates the write permission signal. Accordingly, since the rewriting means does not perform rewriting, it is possible to prevent the program from being rewritten.

According to a fourth aspect of the present invention, in the electronic device according to any one of the first to third aspects, the character string information included in the program storage area of the nonvolatile memory matches the predetermined character string. If not, a configuration is provided that includes a detection unit that detects a program abnormality.

With this configuration, if there is an abnormality in the program due to, for example, the power being cut off accidentally during rewriting of the program, the character string information included in the program storage area of the nonvolatile memory changes. Thus, for example, after the power is turned on, the detection unit checks whether or not the character string information included in the program storage area of the nonvolatile memory matches a predetermined character string. If the character string information does not match, it can be detected as a program abnormality. Thereby, the operator can know that the rewriting of the program has not been completed normally.

According to a fifth aspect of the present invention, in the electronic device invention according to any one of the first to fourth aspects, the writing means stores the character string information contained in the program storage area of the nonvolatile memory in a predetermined manner. A configuration is adopted in which flag information is not permitted when it matches the character string.

According to this configuration, when the program is normal, the flag information always indicates the non-permission, and it is possible to prevent the program from being rewritten due to erroneous operation or malfunction.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing an electronic apparatus according to an embodiment of the present invention.

The CPU 1 is an arithmetic processing circuit for controlling each part of the electronic device. Serial communication port (UAR
T), input port 1, output port 2, chip select signal terminals CS1, CS2, CS3, address bus terminal (address), data bus terminal (data), read signal terminal (RD), and write enable signal terminal (WR). Have.

The serial communication port (UAR) of the CPU 1
To T), a personal computer 9 for transferring program data is connected.

The start key 2 is an operation key for starting a facsimile transmission operation, and is connected to the input port 1 of the CPU.

The reset circuit 3 is a circuit for resetting an electronic device. When the power switch 4 is turned on, the reset circuit 3 sends a reset signal to the CPU 1 to reset (RESE).
Output to the T) terminal.

The program flash memory 5 is a nonvolatile memory for storing programs, and stores programs including a system program, an erase program, a write program, and a power-on program. The program flash memory 5 includes an address bus terminal (address), a data bus terminal (data), a chip select signal (CS), a read signal terminal (RD), and a write enable signal terminal (WR).

The SRAM 6 is a volatile memory that temporarily stores a program to be executed and also stores a flag. The SRAM 6 has an address bus terminal (address), a data bus terminal (data), a chip select signal (CS), a read signal terminal (RD), and a write enable signal terminal (WR).

The data flash memory 7 is a non-volatile memory that stores data such as image data such as fax image data that is handled by the electronic device. The data flash memory 7 includes an address bus terminal (address), a data bus terminal (data), a chip select signal (CS), a read signal terminal (RD), and a write enable signal terminal (WR).

The gate circuit 8 has a write enable signal (WR)
Is switched between valid and invalid. That is, the gate circuit 8
Is, when the signal from output port 2 is LOW level,
The write enable signal (WR) from the write enable signal terminal (WR) of the CPU 1 is invalidated, and the signal of the output port 2 becomes HIGH.
When the level is at the level, the write permission signal (WR) is made valid.

FIG. 2 is a schematic diagram showing an address arrangement of a storage area of the program flash memory according to the above embodiment.

An area from address F80000h to address FF0000h of the program flash memory 5 (hereinafter referred to as a first area) stores a system program. This system program includes a reset processing module for performing initialization processing of the system program. A unique pattern 11 is set at the beginning and end of the system program. As the unique pattern, for example, an arbitrary character string “123456789” can be used.

An area from address FF0000h to address FF8000h of the program flash memory 5 (hereinafter referred to as a second area) stores an erase program and a rewrite program. The area after address FF8000h of the program flash memory 5 (hereinafter, referred to as
The power-on program executed when the power is turned on is stored in the third area. Second, third
The area is protected from erasing and writing. Therefore, the program is not erased or rewritten due to runaway or erroneous operation of the program.

FIG. 3 is a flowchart showing an operation of rewriting a system program in the electronic device according to the above embodiment.

First, the normal operation will be described.

In step (hereinafter referred to as ST) 301, when the power switch 4 is turned on, a power-on program is started, and a startup process is executed.

In ST302, it is determined whether or not the start key 2 has been depressed when the power was turned on. If the start key 2 is not depressed, ST
Go to 303. In ST303, it is determined whether the beginning and end of the system program stored in the first area shown in FIG. 2 match the unique pattern. If the unique patterns match and are normal, the process proceeds to ST304.

In ST304, the write permission 1 and write permission 2 flags stored in the SRAM 6 are turned off. Further, the signal from the output port 2 is set to the LOW level, in other words, the signal from the output port 2 is turned off, and the write permission signal (WR) is invalidated.

In ST305, a reset process of the system program, generally, a power-on initialization process is performed, and in ST306, the process shifts to a normal process.

As described above, during normal use, the write enable signal (WR) is always invalid, so that even if the system program runs away, the program will not be erased or rewritten.

Next, the rewriting operation of the system program will be described.

The operator depresses the start key 2 simultaneously with turning on the power.

In ST302, it is recognized that the start key 2 is depressed when the power is turned on.
Proceed to ST307.

In ST307, the flag "write permission 1" is turned on. Next, in ST308, a request is made to input a personal identification number. In ST309, it is determined whether or not the password is normal. If the password is abnormal, an error is displayed in ST310 and ST311 is displayed.
The operation shifts to waiting for the power supply to stop. On the other hand, if the password is correct, the process proceeds to ST312, and write permission 2 is turned on.

In ST313, it is determined whether or not the flags "write permission 1" and "write permission 2" are both on. If both are not on, the process proceeds to ST310 to display an error and shift to power-off wait. On the other hand, if both are on, the process proceeds to ST314, where the signal of the output port is set to HI.
The write enable signal (WR) is made valid as the GH level.

In ST315, the erase program and the rewrite program are stored in the program flash memory 5.
To the SRAM 6. This is because data cannot be read from the flash memory during rewriting or erasing, and thus erasing or rewriting cannot be performed while a program remains on the flash memory.

In ST316, the erase program on the SRAM 6 is executed, and the program flash memory 5 is executed.
Delete the system program stored in. Next, ST
At 317, the rewriting program on the SRAM 6 is executed, a new system program is read from the personal computer 9 via the serial communication port (UART), and written to the program flash memory 5. Erasing and writing of a program in ST316 and 317 are performed only when the write permission signal (WR) is valid.

Next, in ST318, the write permission 1 and the write permission 2 are turned off, and the signal of the output port is set to the LOW level to invalidate the write permission signal (WR).

In ST319, the system program is reset, and the program rewriting process ends.

As described above, since a plurality of flags are set in relation to the power-on and the input of the personal identification number, which are sequentially performed in the rewriting procedure of the system program, if both the flags are not set, the system program is reset. The program is not rewritten, and erasure and rewriting of the program due to erroneous operation can be reliably prevented.

Hereinafter, erasing and rewriting of the program will be described in more detail.

In a volatile memory such as an SRAM, writing is completed only by writing program data to a program address. However, the flash memory is designed so that writing cannot be performed unless a predetermined series of processing (sequence) is performed. Therefore, normally, this sequence is modularized, and the program is rewritten in the form of a module call.

FIG. 4 is a flowchart showing the operation of the writing module in the electronic device according to the above embodiment.

In this embodiment, the program flash memory 5 does not perform a series of processing for writing the command 1 at the address 1, then writing the command 2 at the address 2, and finally writing the command 3 at the address 1. It is designed so that data cannot be written.

In ST401, it is determined whether write permission 1 and write permission 2 are both on. If both are not on, write permission 1 and write permission 2 are turned off in ST402, the signal of output port 2 is set to the LAW level, and the write permission signal (WR) is invalidated. Thereafter, in ST403, the system program is reset.

If both are on in ST401,
In ST404, the program flash memory 5
Write command 1 to address 1 of Next, ST4
At 05, command 2 is written to address 2.

In ST406, it is determined whether both write permission 1 and write permission 2 are on. If both are not on, write permission 1 and write permission 2 are turned off in ST407, the signal of output port 2 is set to the LAW level, and the write permission signal (WR) is invalidated. Thereafter, in ST408, the system program is reset.

If both are on in ST406,
In ST409, the program flash memory 5
Write command 3 to address 1 of

In ST410, program data is written to a program address. Next, in ST411, data polling of the program flash memory 5 is performed. Then, in ST412, it is determined whether or not the program has been completed normally. If abnormal, S
Proceeding to T413, error processing is performed. On the other hand, if it is normal, the writing process ends.

Therefore, the writing module performs at ST40
4. A program can be written only after the sequence of ST405 and ST409. And ST
In steps 401 and ST406, it is confirmed that the flag indicates that rewriting is permitted, so that it is possible to prevent the program from being written due to an erroneous operation.

As described above, the write permission signal (WR) of the program flash memory 5 becomes effective when the start key 2 is depressed when the power is turned on.
Also, this is only when both the passwords are normal and the system program is not erased or rewritten due to an erroneous operation.

Next, the system program runs away, and FIG.
The case where the program jumps to the processing for enabling the write permission signal in ST314 shown in FIG.

When the data flash memory 7 is mounted as in the electronic apparatus according to the present embodiment, the system program includes a program for erasing and rewriting the flash memory. As a result, the system program runs away and the system program flash memory 5
May be attempted to be erased and rewritten.

As shown in FIG. 4, in the write module, when both the write permission 1 and the write permission 2 are not turned on, the write module detects the write permission 1 and the write permission 1 in the ST402 and ST407. The permission 2 is turned off, the write permission signal (WR) is invalidated, and the process proceeds to ST403 and ST407, the resetting process of the system program. Therefore, writing to the flash memory is not performed unless the sequence of ST404, ST405, and ST409 is executed in order.
Rewriting of the program can be prevented.

Even if the program goes out of control in the process of writing command 1 to address 1 in ST404, the system program is not rewritten to confirm the flag in ST406.

Similarly, by using the same judgment for the erase sequence, it is possible to prevent the system program from being illegally erased.

As described above, even if the system program runs away and jumps to ST314, the flag is not ON, so that ST401 and ST406 in the write module are executed.
An error occurs in the confirmation process in step 2, and the write sequence is not executed in order. As a result, erroneous writing of the system program can be prevented.

Further, since the flag is confirmed during the write sequence of the write module (ST
406), ST404 due to runaway of the system program
It is possible to prevent the system program from being erroneously written even if it jumps to the server. As a result, the reliability of the program in the flash memory against the program runaway can be significantly improved.

Next, a case where the power is turned off by mistake during erasing or writing of the system program will be described.

If the power is accidentally turned off during the erasing and writing of the system program, at least one of the beginning and end of the system program is "00" or "FF" because the rewriting of the program is not completed normally.
Is set to For this reason, the first or last character string of the system program does not match the unique pattern 11 stored in the power-on program. Accordingly, an error occurs in the unique pattern determination in ST303 shown in FIG. 3, the process proceeds to ST310, an error is displayed, and the power supply waits in S311. The operator turns off the power once, turns on the power while depressing the start key 2 again, and rewrites the system program. With the above operation, if the system program is normally rewritten, the electronic device operates normally. As a result,
Even if the system program is rewritten, the function of the electronic device can be easily restored.

[0070]

As is apparent from the above description, according to the present invention, the program mounted on the nonvolatile memory is:
Erasure or rewriting due to erroneous operation or erroneous operation can be prevented. Further, the reliability of the program in the nonvolatile memory against the program runaway can be remarkably improved.

Further, according to the present invention, the function of the electronic device can be easily restored even when the erasing and rewriting of the system program are not completed normally.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an electronic device according to an embodiment of the present invention.

FIG. 2 is a schematic diagram showing an address arrangement of a storage area of a program flash memory according to the embodiment;

FIG. 3 is a flowchart showing an operation of rewriting a system program in the electronic device according to the embodiment;

FIG. 4 is a flowchart showing an operation of a writing module in the electronic device according to the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 CPU 2 Start key 3 Reset circuit 4 Power switch 5 Flash memory for program 6 SRAM 7 Flash memory for data 8 Gate circuit

Claims (5)

[Claims] A nonvolatile memory for storing a program, a memory for storing flag information for permitting rewriting of the program, a flag rewriting means for rewriting the flag information under a predetermined condition, An electronic apparatus comprising: a write control unit that controls whether a write permission signal for the nonvolatile memory is valid / invalid; and a rewriting unit that rewrites a program when the write permission signal is valid. 2. The memory according to claim 1, wherein the memory stores a plurality of pieces of flag information, and the condition for rewriting the plurality of pieces of flag information relates to an operation sequentially performed in a predetermined program rewriting procedure. 2. The electronic device according to claim 1, wherein the write enable signal is made valid when the device indicates rewrite permission. 3. The electronic device according to claim 1, wherein the write control unit checks the flag information a plurality of times during the program rewriting procedure. 4. The apparatus according to claim 1, further comprising a detection unit configured to detect an abnormality in the program when character string information included in a program storage area of the nonvolatile memory does not match a predetermined character string. 3. The electronic device according to any one of 3. 5. The flag rewriting means for rejecting flag information when character string information included in a program storage area of a nonvolatile memory matches a predetermined character string. Item 5. An electronic device according to any one of Items 4.