JPH1145206A - Electronic device, memory activation method, and recording medium recording memory activation program - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To enable activation of memories having different bus widths without requiring change of a built-in ROM. A memory having a predetermined bus width is provided in an apparatus main body.
5 is connected. Identification information for identifying the bus width is recorded in a predetermined area of the memory 15. CPU11
Retrieves the identification information from the memory 15 and determines the bus width based on the identification information. Then, the CPU 11 activates the memory 15 according to the determined bus width.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device such as a portable information processing device, and more particularly to an electronic device to which memories having different bus widths are connected, a memory starting method and a memory starting program used in the device. The present invention relates to a recording medium in which

[0002]

2. Description of the Related Art Conventionally, in a case where memories having different bus widths are incorporated in a main body of an electronic device such as a portable information processing device, it is necessary to change a built-in ROM of a microprocessor according to the type of the memory. there were.

That is, for example, if there is an 8-bit bus memory and a 16-bit bus memory, when connecting the 8-bit bus memory, the built-in ROM of the microprocessor is accessed so that the memory can be accessed by the 8-bit bus.
When connecting 16-bit bus memory,
This is to change the built-in ROM of the microprocessor so that the memory can be accessed by a 16-bit bus.

[0004]

As described above, conventionally, the built-in R of the microprocessor is used in accordance with the type of the memory.
The OM needed to be changed. For this reason, when memories having different bus widths are connected to the main body of the apparatus, there is a problem that a built-in ROM specific to each is required.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has an electronic device, a memory activation method, and a memory activation program capable of activating memories having different bus widths without changing an internal ROM. An object of the present invention is to provide a recording medium on which is recorded.

[0006]

According to a first aspect of the present invention, there is provided an electronic device comprising: a memory having a predetermined bus width connected to an apparatus main body; and accessing a predetermined area of the memory to access the memory. A bus discriminating means for discriminating a bus width, and a memory activating means for activating the memory based on the bus width discriminated by the bus discriminating means.

According to such a configuration, 8 bits, 16 bits
When a memory having a bus width of a bit or more is connected to the apparatus main body, the bus width is determined by accessing a predetermined area of the memory, and the memory is activated based on the bus width.

Further, according to a second aspect of the present invention, in the first aspect, identification information for identifying a bus width is recorded in a predetermined area of the memory, and the bus determining means stores the identification information from the memory. The identification information is searched, and the bus width is determined based on the identification information.

According to such a configuration, 8 bits, 16 bits
When a memory having a bus width of a bit or more is connected to the apparatus main body, identification information recorded in a predetermined area of the memory is searched, and the bus width is determined based on the identification information.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a circuit configuration of an electronic device according to one embodiment of the present invention. The present apparatus is realized by a computer which reads a program recorded on a recording medium such as a magnetic disk and the operation of which is controlled by the program.

As shown in FIG. 1, the electronic device according to the present embodiment includes a CPU 11. The CPU 11 controls the entire apparatus, and executes various processes by activating the memory 15 (ROM, RAM) according to an input instruction.

The CPU 11 is connected to devices such as a key input unit 12, a display drive unit 13, and a display unit 14, and here a plurality of memories 15 having different bus widths.
Is connected.

The key input unit 12 is composed of, for example, a keyboard, has character keys and function keys, and is used for inputting data and instructing various functions. The display driving unit 13 displays the date under the control of the CPU 11.
Drive. The display unit 14 includes, for example, a liquid crystal display device and displays data.

The memory 15 is composed of a ROM or a RAM, and stores various data necessary for the apparatus. Here, 15 types of memories (R
OM or RAM) 15 is connected to the apparatus main body. These memories 15 are accessed by an 8-bit bus or a 16-bit bus.

FIG. 2 is a diagram showing a comparison between a case where the memory 15 incorporated in the electronic device is an 8-bit bus and a case where the memory 15 is a 16-bit bus. When the memory 15 is a 16-bit bus, data is stored in units of 16 bits as shown in FIG. Therefore, when address 0 is viewed on an 8-bit bus, $ 0000 data (8 bits) is obtained, whereas when address 0 is viewed on a 16-bit bus, $ 0 is obtained.
Thus, 000 to 1 data (16 bits) is obtained. Similarly, when address 1 is viewed on an 8-bit bus, data of $ 0002 (8 bits) is obtained, and when address 1 is viewed on a 16-bit bus, data of $ 0002 to $ 3 (16 bits) is obtained. When the address 2 is viewed on an 8-bit bus, data of $ 0004 (8 bits) is obtained, and when the address 2 is viewed on a 16-bit bus, data of $ 0004 to $ 5 (16 bits) is obtained.

On the other hand, when the memory 15 is an 8-bit bus, data is stored in 8-bit units as shown in FIG. Therefore, when address 0 is viewed on an 8-bit bus, $ 0000 data (8 bits) is obtained, whereas when viewed on a 16-bit bus, $ 0000 is obtained.
(Lower 8 bits) and indefinite data (upper 8 bits). Similarly, when address 1 is viewed on an 8-bit bus, $ 0001 data (8 bits), and when viewed on a 16-bit bus, $ 0001 data (lower 8 bits) and undefined data (upper 8 bits) Is obtained. Also, when address 1 is viewed on an 8-bit bus, $ 0002 data (8 bits), and when viewed on a 16-bit bus, $ 0002 data (lower 8 bits) and indefinite data (upper 8 bits). can get.

As described above, since data differs depending on the bus width of the memory 15, if accessed normally,
I do not know where and what data is. However, if only address $ 0000 is accessed with an 8-bit bus width, the same data can be obtained regardless of the bus width of the memory 15.

Therefore, in the present embodiment, this $ 0000
A boot ID for identifying the bus width of the memory 15 is recorded at the address, and by reading this, the bus width is determined by the boot ID.

FIG. 3 is a diagram showing a data structure of the memory 15 incorporated in the electronic device. The memory 15 stores 16-byte data as shown in FIG. In this case, if it is an 8-bit bus, it is stored in units of 8 bits as described in FIG. 2B, and if it is a 16-bit bus, it is 16 bits as described in FIG. It is stored in units.

Here, in the first byte (8 bits), a start ID for identifying the bus width of the memory 15 is recorded. This activation ID is also used to identify the ROM. Then, INF (1 byte), ADD
R (4 bytes) and CRC (4 bytes) are recorded in this order. INF is a device type, ADDR is a start address, and CRC32 is a 32-bit CRC (Cyclic R).
edundancy Check) data.

Next, the operation of the embodiment will be described. FIG.
9 is a flowchart showing an operation of a startup process in the embodiment. The processing here is performed by the built-in ROM of this device.
Is realized by the CPU 11 reading the startup program stored in the.

Here, as shown in FIG.
The description will be made on the assumption that 15 types of memories (ROM or RAM) 15 indicated by 1 to CS15 are connected to the apparatus main body.

First, after the system internal variables are initialized (step S11), the system bus is set to 8 bits and CS0 (chip select 0).
Is selected (step S12).

When the memory 15 is selected, the memory 1
The data stored at address $ 0000 of CPU5 is CPU1
1 (step S14), and it is checked whether or not it is an activation ID (step S15). Also, the activation ID
If it is (Yes in step S15), it is checked whether or not the memory 15 is a RAM based on the activation ID (step S16).

As a result, if the data at address $ 0000 is not the activation ID (No in step S15), or
Even in the case of the activation ID, in the case of the RAM (step S16
Yes), the next memory 15 is selected (step S)
17).

As described above, the address $ 0000 in the 15 types of memories 15 indicated by CS1 to CS15 is sequentially searched, and if a corresponding activation ID cannot be obtained (Yes in step S13), Processing is performed assuming that there is no ROM (step S18).

On the other hand, when the activation ID of the ROM is obtained (No in step S16), the activation ID is checked. As a result, the activation ID is the activation ID of the 8-bit bus.
If it is (Yes in step S19), the bus setting is processed as it is in the current state (8-bit bus). If the activation ID is the activation ID of the 16-bit bus (No in step S19), the bus is set. Setting is changed from 8 bit bus to 16
The mode is switched to the bit bus (step S20).

When the bus width is determined to be 8 bits or 16 bits, a CRC check is performed on the memory 15 (ROM). This is to read certain data in the memory 15 (ROM) according to the determined bus width and check the consistency between the data and the CRC data. As a result of the CRC check, when it is determined that the data in the memory 15 (ROM) is normal (Yes in step S21), the memory 15 is activated according to the activation address (step S2).
2).

As described above, the bus width is determined based on the activation ID recorded at the address $ 0000 of the memory 15, and the memory 15 is activated according to the bus width. Therefore, the memory 1 of the 8-bit bus or the 16-bit bus
Even when the device 5 is connected to the apparatus main body, the memory 15 can be started without changing the processing (built-in memory) of the CPU 11.

In the above embodiment, an 8-bit bus and a 16-bit bus are assumed. However, even if the bus width is larger, the same method as described above can be used. Also, the method described in the above-described embodiment, that is,
The startup process shown in FIG. 4 is executed by a computer as a program that can be executed by writing it on a recording medium such as a magnetic disk (floppy disk, hard disk, etc.), an optical disk (CD-ROM, DVD, etc.), a semiconductor memory, etc. The present invention can be applied to an apparatus or transmitted to a communication medium and applied to various apparatuses. A computer that realizes the present apparatus reads the program recorded on the recording medium, and executes the above-described processing by controlling the operation of the program.

[0031]

As described above, according to the first aspect of the present invention, the bus width of the memory connected to the apparatus main body is determined,
The memory is activated based on the bus width. Therefore, it is possible to activate memories having different bus widths without changing the internal ROM.

According to the second aspect of the present invention, the identification information recorded in the predetermined area of the memory is searched, and the bus width is determined based on the identification information. Therefore, by recording the identification information for identifying the bus width in a predetermined area of the memory in advance, it is possible to activate memories having different bus widths without changing the internal ROM.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration of an electronic device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a comparison between a case where a memory incorporated in the electronic device is an 8-bit bus and a case where a memory is a 16-bit bus.

FIG. 3 is a view showing a data configuration of a memory incorporated in the electronic device.

FIG. 4 is an exemplary flowchart illustrating the operation of a startup process in the embodiment.

[Explanation of symbols]

 11 CPU 12 Key input unit 13 Display drive unit 14 Display unit 15 Memory

Claims (4)

[Claims] A memory having a predetermined bus width connected to an apparatus main body; a bus determining means for determining a bus width of the memory by accessing a predetermined area of the memory; An electronic device comprising: a memory activating unit that activates the memory based on the determined bus width. 2. An identification information for identifying a bus width is recorded in a predetermined area of the memory, and the bus determining means searches the memory for the identification information, and determines a bus based on the identification information. The electronic device according to claim 1, wherein the width is determined. 3. A memory activation method for activating a memory having a predetermined bus width connected to an apparatus main body, wherein identification information for identifying the bus width is recorded in a predetermined area of the memory. A memory activation method comprising: retrieving the identification information from the memory; determining a bus width based on the identification information; and activating the memory according to the determined bus width. 4. A recording medium storing a memory activation program for activating a memory having a predetermined bus width connected to an apparatus main body, the identification medium being used to identify a bus width in a predetermined area of the memory. A program for causing a computer to execute a procedure of recording information, causing the memory to search for the identification information, determining a bus width based on the identification information, and activating the memory according to the bus width is recorded. Computer readable recording medium.