JPH11319241A - Pachinko game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To variously change the duration of fluctuation on and after a reach state at random by determining the duration of fluctuation of a pattern to be fluctuated on the other pattern display part by a random number means, when patterns stopped and displayed on two pattern display parts constitute a part of a specified display mode. SOLUTION: When the stopped pattern of a left pattern display part 4 and the stopped pattern of a middle pattern display part 5 are conformed to form a two-pattern reach satisfying the necessary condition of combination of a big hit pattern, a CPU stores it in a right pattern fluctuation random number resistor. The duration of fluctuation of a pattern to be fluctuated on the other pattern display part is selected on the basis of a selection condition file according to the present value of the right pattern fluctuation random number resistor. Further, the fluctuating number of the pattern to be fluctuated within the selected duration of fluctuation is determined, and the pattern corresponding to an internal processing index of a right display pattern data memory resistor is displayed in the stopping time of fluctuation of a right pattern display part 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in symbol display control of a pachinko game machine.

[0002]

2. Description of the Related Art A part of a specific symbol combination is formed when some of the symbol displays are stopped and displayed before all of the symbol displays are stopped (so-called players, game arcades, etc.). There is a pachinko gaming machine in which the fluctuation continuation time of the symbol display unit that stops last is made longer than usual.

[0003]

In a conventional symbol display device of a pachinko gaming machine, two types of display, a normal state and a reach state, are provided.
There is only an aspect, and the design variation display aspect of the pachinko gaming machine lacks amusement.

[0004] An object of the present invention is to determine the fluctuation duration of the changing symbol display unit in a so-called reach state according to a random number, so that the fluctuation duration after the reach state varies randomly. Another object of the present invention is to provide a pachinko gaming machine that can attract the player's interest.

[0005]

According to the present invention, in order to solve the above-mentioned problems, a combination of symbols displayed on a plurality of symbol display portions has a predetermined specific combination mode. A gaming machine that is brought into a specific gaming state by this means, comprising a random number means, wherein a symbol stopped and displayed on at least two of the plurality of symbol display portions is one of the specific display modes. In the case where a part is configured, the variable duration of the symbol variably displayed on another symbol display part is determined by the random number means.

When the symbols stopped and displayed on at least two of the plurality of symbol display units constitute a part of the specific display mode (when a so-called reach state is reached), other symbols are displayed. The variation duration of the symbol variably displayed on the symbol display section is selectively determined according to the value of the random number means, and the variation duration is varied.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a front view showing one surface of a game board according to one embodiment to which the symbol display device of the pachinko machine of the present invention is mounted. A front glass for preventing game balls from jumping out is provided on the front surface of the game board 1, but is not shown. Hereinafter, the direction from the game board 1 to the front glass will be referred to as the front, and the direction opposite to the direction from the game board 1 to the front glass will be referred to as the back.

In FIG. 2, a symbol display unit 2 as a symbol display device of a pachinko machine is provided at a substantially central portion of the game board 1, and a left prize opening 55, which is a normal prize opening, is provided on the left and right sides of the symbol display unit 2, respectively. Right winning opening 56 is arranged,
Below the symbol display unit 2, a middle type 1 starting port 10, which is a part of the specific winning opening, is provided. In addition, the first
A winning device 9 having an attacker-shaped large winning opening 8 which is linked to the symbol display unit 2 and driven to be opened and closed by a solenoid or the like is provided below the seed starting opening 10. A left type 1 starting port 11 which is a part of the specific winning opening is provided, and a right type 1 starting port 12 which is a part of the specific winning opening is provided below and to the right of the winning device 9. Middle first
Inside the seed starting port 10, the left type 1 starting port 11 and the right type 1 starting port 12, a middle type 1 starting port winning detection switch SW is provided.
1 and the left first type start opening winning detection switch SW2 and the right first type
Each of the seed opening winning detection switches SW3 is provided.

The inside of the special winning opening 8 in the winning device 9 is divided into three winning regions by game ball dividing walls 20 and 21, and a central winning region having the game ball dividing walls 20 and 21 on both sides is special. A specific area winning detection switch SW4 is set in the specific area 14 as a winning area, and a special area winning operation switch for continuously opening the special winning opening 8 behind the specific area 14. Note that the continuous opening operation of the special winning opening 8 is based on the first pattern based on the symbol matching of the symbol display unit 2.
The maximum number of times of the first opening operation and the continuous opening operation by the operation of the specific area winning detection switch SW4 is up to 16 times. The duration of one opening operation of the special winning opening 8 is set to 29.5 seconds. However, if the total number of game balls that have won the special winning opening 8 during the one opening operation exceeds ten, 10 The first opening operation is completed by detecting the winning of the individual.

In FIG. 2, a lower left winning opening 57, a lower right winning opening 58, a windmill 59 with a lamp, a windmill 60, and an out ball receiving port 6 are shown.
1. The components of the ball guide rail 62 and the return rubber 63 are well known and will not be described.

Reference numeral 50 denotes an indicator light A, 51 denotes an indicator light B, 52 denotes an indicator light C, 53 denotes an indicator light D, and 54 denotes an indicator light E.

FIG. 1 is a sectional view showing the symbol display unit 2 divided vertically at the center.
A dot matrix LED display 23 disposed substantially parallel to the game board surface and a dot matrix LED display 22 disposed substantially at right angles to the game board surface, and a symbol display and a dot matrix by the dot matrix LED display 23 are provided. The half mirror 24 is arranged at an angle so that the mirror image of the symbol display by the LED display 22 can be viewed from the front of the game board 1.

The dot matrix LED display 23 is a symbol display means for displaying a symbol through a half mirror 24 disposed obliquely with respect to the game board. This is a symbol display means for displaying a symbol via a reflection surface. The distance from the dot matrix LED display 23 to the reflection surface of the half mirror 24 is shorter than the distance from the dot matrix LED display 22 to the reflection surface of the half mirror 24.

FIG. 3 is a plan view showing the dot matrix LED display 22 from the side of the display surface 22b with one edge 22a of the substantially rectangular dot matrix LED display 22 facing upward. The symbol display section 3 is composed of 192 elements of 1 row, 1 column to 8 rows, 24 columns of the LED elements constituting the dot matrix LED display 22, and L constituting the dot matrix LED display 22.
64 elements from 1 row, 1 column to 8 rows 8 of the ED element and 1 row 9
64 elements from column to 8 rows and 16 columns and 1 row from 17 columns to 8
Left symbol display LE by each of 64 elements up to row 24 column
D (L), middle symbol display LED (C) and right symbol display LE
D (R), and a dot matrix LED display 2
The upper symbol display LED (U) is composed of 124 elements from 2 rows 9 rows 1 columns to 16 rows 24 columns.

FIG. 4 shows a dot matrix LED display 23.
2 is a plan view showing the front side of the game board 1, and shows 64 LED elements of 1 row, 1 column to 8 rows, 8 columns and 1 row, 9 columns to 8 rows, 1 of the LED elements constituting the dot matrix LED display 23.
A left symbol display LED (l), a middle symbol display LED (c), and a right symbol display LED (r) are constituted by 64 elements up to 6 columns and 64 elements from 1 row to 17 columns to 8 rows and 24 columns. ing.

The dot matrix LED display 22, the dot matrix LED display 23 and the half mirror 24
Is the left symbol display LE by the dot matrix LED 23
D (l), middle symbol display LED (c), right symbol display LED
(R) Symbol display and dot matrix LED display 22
Left design display LED (L), middle design display LED
(C), it is arranged at a position where the right symbol display LED (R) can be seen overlapping with the mirror image of each symbol display. In addition, the transparent cover member 27 is provided for the dot matrix LED display 22.
This is for protecting the display surface.

The left of the dot matrix LED display 23,
The distance from each of the middle and right symbol display LEDs (l), (c) and (r) to the half mirror 24 depends on the left, middle and right symbol display LEDs of the dot matrix LED display 22.
The distance from each of (L), (C), and (R) to the reflection surface of the half mirror 24 is shorter than that of the half mirror 24.
The left, middle, and right symbols of the D display 23 appear to be in front of the left, middle, and right symbols of the dot matrix LED display 22, and the dot matrix LED display 2
2 is a dot matrix LED display 2
3 does not interfere with the left, middle, and right symbol display. As an example, “BB” is displayed on the upper symbol display LED (U) of the dot matrix LED display 22, and each symbol display LED on the left, middle, and right of the dot matrix LED display 23.
FIG. 5 shows the visual recognition state when “7” is indicated in each of (l), (c), and (r).

In FIG. 2, a dot matrix LED
The left symbol display LED (L) of the display 22 and the left symbol display LED (l) of the dot matrix LED display 23 perform symbol display of the left symbol display section 4, and the middle symbol display of the dot matrix LED display 22. The symbol display of the middle symbol display section 5 is performed by the LED (C) and the middle symbol display LED (c) of the dot matrix LED display 23, and the right symbol display LED (R) of the dot matrix LED display 22 and the dot matrix. Right symbol display LED of LED display 23
With (r), the symbol is displayed on the right symbol display section 4, and the upper symbol display LED of the dot matrix LED display 22 is displayed.
By (U), the symbol display of the upper symbol display section 7 is performed. The left, middle, right, and upper symbols are the first type start port 10, the left first type start port 11, and the right first type start port 12 in the game board 1.
When the game ball wins one of the symbols, the left, middle, right, and upper symbol display units 4, 5, 6, and 7 start changing, and the left,
The symbols are stopped in the order of middle, right and top.

The symbol display unit 2 is provided with a winning opening 25 at the top thereof, and a character display LED 54 and a stored number display LED 13 are provided at a lower rear portion of the half mirror 24. The stored number display LED 13 uses the number of game balls that have won the first, second, and right type start-up ports 11, 10, and 12 as the number of executions of the symbol matching during the execution of the symbol variation display or the opening operation of the special winning opening 8. The number of lit LEDs is displayed up to four times, and the character display LED 54 changes the function of the stored number display LED 13 to “M”.
The player is informed by character display such as "EMORY".
An arc-shaped game ball distribution unit 26 protrudes from the upper edge of the substantially rectangular viewing window 28 formed in front of the half mirror 24 in the symbol display unit 2 so as to obstruct visual recognition due to rolling of the game ball and to display symbols. Inadvertent invasion of game balls into the unit 2 is prevented.

In FIG. 6, a control unit of the symbol display unit 2 includes a ROM 31 storing a control program of the symbol display unit 2, data of a display symbol, a fluctuation time of the symbol, and the like, and a RAM 32 and a ROM 3 used for temporary storage of data.
The control unit is configured by a CPU 30 that drives and controls each unit of the symbol display unit 2 in accordance with the control program of 1. The control unit also functions as a display control unit and a condition detection unit. Also, ROM
The control program 31 includes a display control program serving as a setting condition for controlling a switching operation of a display output to the dot matrix LED display 23 or the dot matrix LED display 22. Note that the ROM here does not mean a storage unit that cannot be written or rewritten.

Left, middle, right first type starting ports 11, 10, 12
Type 1 starter winning detection switch SW2, S
Each of W1 and SW3 is connected to C through switch detection unit 33.
Left, middle and right special symbol display LEDs connected to the PU 30 and in the dot matrix LED displays 22 and 23
(L), (C), (R), (U), (l), (c),
Each of (r) is connected to the CPU 3 via the LED display circuit 34.
0 controls the drive individually or simultaneously. The clock reset circuit 35 is connected to the CPU 3
0 processing cycle is defined.

The CPU 30 is a winning device 9 in the game board 1.
It also serves as drive control means such as the display lights A, B, C, and E, and the speakers for outputting sound effects, including the storage number display LED 13 and the character display LED 54, and the drive control method for each of these members is well known. Therefore, the description is omitted.

Hereinafter, the processing operation of the pachinko machine according to the present embodiment will be described with reference to flowcharts (FIGS. 7 to 18) showing the main parts of the control program stored in the ROM 31. The processing of task 1 shown in FIG. 7, the processing of task 2 shown in FIGS. 8 to 10, and the processing of task 3 shown in FIGS. 11 to 18 are performed by the CPU 30 according to a signal from the clock circuit 35. It is repeatedly executed in parallel for each processing cycle (on the order of μs).

The processing of task 1 shown in FIG.
Is generated by successively incrementing the value of a random number for a big hit, which is a random number means for hit determination, in a range of 0 to 215 at predetermined intervals, and a first type start port 10 and a left first type start port in the game board 1 are generated. Each time a winning detection signal is issued from the left, middle, or right first-class start winning detection switch SW2, SW1, or SW3 based on a game ball prize in any one of the first type start opening 11 and the right first-type start opening 12. , The value of the random number for jackpot
Up to four times, including the above-mentioned symbols being changed, are stored up to four times, and are lit on the stored number display LED 13 of the symbol display unit 2.

The CPU 30 sequentially increments the value of the big hit random number in the range of 0 to 215 at every predetermined processing cycle (step a1), and checks whether the value of the big hit random number storage register W has reached 215 or not. Determine (step a
2), every time the value of the big hit random number storage register W reaches 215, the value of the register W is initialized to 0 (step a)
3).

Next, the CPU 30 determines whether or not a winning detection signal has been input from the left, middle, and right type 1 starting opening winning detection switches SW2, SW1, and SW3 (step a).
4), left, middle and right type 1 starting opening winning detection switch SW
2, when the winning detection signal is input from SW1 or SW3, the current value of the operation flag Fa relating to the symbol variation of the symbol display section 3 is a value that defines the waiting for winning detection to the first-type start-up openings 10, 11, and 12. 0 or not (step a
5) If it is determined that the current value of the operation flag Fa is 0, the symbol display unit 3 is not performing the variable display process, and the current value of the big hit random number storage register W is stored in the determined value storage register R0. The storage is performed (step a6), the storage state identification flag F0 is set to 1 to permit the start of the symbol variation process (step a7), and the process of task 1 is completed.

On the other hand, in the determination processing of step a5,
When it is determined that the current value of the operation flag Fa is a value other than 0, the symbol display unit 3 is performing the variable display process, and in this case, the CPU 30 sets the search index i as the initial value. A value 1 is set (step a8), and it is determined whether the current value of the search index i exceeds the maximum storage number 4 (step a9). If the value of the search index i does not exceed 4, the search is performed. The storage state identification flag Fi is detected based on the value of the index i, and it is determined whether or not the storage state identification flag Fi is 1, that is, whether or not a winning has already been stored (step a10). If the identification flag Fi is not 1, the determined random number storage register Ri is detected based on the value of the search index i, and the current value of the big hit random number storage register W is stored in the determined random number storage register Ri (step a1).
1), 1 is set to the storage state identification flag Fi to permit the start of the execution of the symbol variation process (step a12), and the storage number display LED 13 of the symbol display unit 2 is lit to end the process of the task 1, while If the detected storage state identification flag Fi is 1, it means that the winning has already been stored, and the value of the search index i is incremented by one (step a13), and the value of the search index i in step a9 is incremented. Is determined whether or not exceeds 4.

The CPU 30 determines that the current value of the operation flag Fa is a value other than 0 in the determination processing of step a5, ie, that the variable display processing of the symbol display unit 3 is being performed. The storage state identification flag Fi detects an unused definite random number storage register Ri based on the value of the search index i, and stores and stores the current value of the big hit random number storage register W in this definite random number storage register Ri. Since the state identification flag Fi is set, as shown in FIG. 20, the determined random number storage register Ri stores W at the time of winning detection.
Is stored up to four values.

The value of the big hit random number storage register W is changed in a regular manner in each predetermined processing cycle, but the timing of winning detection to the left, middle, and right first-type starting ports 11, 10, and 12, and the big hit random number storage Since there is no causal relationship with the current value of the register W, the current value of W at the time of winning detection can be used as a random number.

In the discriminating process of step a4,
Left, middle, right type 1 starting port winning detection switch SW2, SW
1, when the winning detection signal from SW3 is not input, and when the value of the search index i exceeds 4 as a result of repeating the determination loop of step a9, step a10, and step a13, in this case, it is determined. In the random number storage registers R1 to R4, four W values at the time of winning detection are stored. In these cases, the CPU 30 ends the processing of the task 1.

The processing of task 2 shown in FIGS. 8 to 10 is an internal process stored in each of the left symbol data storage register r0, the middle symbol data storage register r1, the right symbol data storage register r2, and the upper symbol data storage register r3. This is a process for randomly creating a combination of a winning symbol and a combination of a missing symbol by sequentially changing the index value.

The CPU 30 stores the fourth and fifth bits (values from 0 to 3) of the R register in the register R1 (step b1), adds 1 to the value of the register R1 (step b2), It is determined whether the value of R1 is 4 (step b3). If it is 4, 0 is stored in the register R1 (step b4).
The value of the register R1 and the value of the left symbol data storage register r0 (values from 0 to 12) are added and stored in the left symbol data storage register r0 (step b5), and the value of the left symbol data storage register r0 is 13 or more. It is determined whether or not it is 13 (step b6).
Is subtracted and stored in the left symbol data storage register r0 (step b7). As a result, any value from 0 to 12 is set in the left symbol data storage register r0.

Here, the R register is a register for storing a state of an execution result every time one instruction of the program stored in the ROM 31 is executed, and is incremented by one each time the CPU 30 executes one instruction of the program. , R registers are cleared to zero when they reach a saturated state. The register R1 is a general-purpose register used by the CPU 30 for internal processing.

Next, the CPU uses the same algorithm as the above.
30 is the second and third bits (0 to 3) of the R register
Is stored in the register R1 (step b8),
One is added to the value of the register R1 (step b9), and it is determined whether or not the value of the register R1 is 4 (step b1).
0), 4 stores 0 in register R1 (step b11), otherwise stores it in register R1
Is added to the value of the middle symbol data storage register r1 (values from 0 to 12) and stored in the middle symbol data storage register r1 (step b12).
It is determined whether the value of 1 is 13 or more (step b1).
3) If 13 or more, subtract 13 from the value of register r1 and store it in middle symbol data storage register r1 (step b14). As a result, the middle symbol data storage register r
1 is set to any value from 0 to 12.

Further, the CPU 30 stores the first and second bits (values from 0 to 3) of the R register in the register R1.
(Step b15), 1 is added to the value of the register R1 (step b16), it is determined whether the value of the register R1 is 4 (step b17), and if it is 4, 0 is stored in the register R1. (Step b18) If it is not 4, the value of the register R1 and the value of the right symbol data storage register r2 (values from 0 to 18) are added and stored in the right symbol data storage register r2 (Step b18). b1
9) It is determined whether the value of the right symbol data storage register r2 is 19 or more (step b20). If it is 19 or more, 19 is subtracted from the value of the register r1 and stored in the right symbol data storage register r2 (step b20). b21). As a result, any value from 0 to 18 is set in the right symbol data storage register r2.

Further, the CPU 30 stores the 0th and 1st bits (values from 0 to 3) of the R register in the register R1 (step b22), and adds 1 to the value of the register R1 (step b23). ), The value of the register R1 is 4
Is determined (step b24), if it is 4, 0 is stored in the register R1 (step b25), and if it is not 4, the value of the register R1 and the value of the upper symbol data storage register r3 ( (Values from 0 to 3) are added and stored in the upper symbol data storage register r3 (step b2).
6) It is determined whether the value of the upper symbol data storage register r3 is 4 or more (step b27). If it is 4 or more, 4 is subtracted from the value of the register r3 and stored in the upper symbol data storage register r3 (step b27). b28). As a result, any value from 0 to 4 is set in the upper symbol data storage register r3.

Left, middle, right, upper symbol data storage register r
The values stored in 0 to r3 are the values of the internal processing indices, and the CPU 30 creates all possible combination symbols that can be displayed by sequentially and individually changing this value in each processing cycle. It is determined whether the combination of the internal processing indices created in the processing cycle is related to a winning symbol or a missing symbol (step b29), and if the combination is a winning symbol, the combination of r0 to r3 of each internal processing index is determined. Left, middle, right, upper jackpot symbol data storage register r0a
To r2a (step b30).
If the combination of the internal processing indices created in the processing cycle is out of relation with the symbol, each of the internal processing indices r0 to r
3 is stored in each of the left, middle, right and top off design data storage registers r0b to r3b (step b3).
1) Terminate the processing of task 2.

Accordingly, in each of the left, middle, right and upper big hit symbol data storage registers r0a to r3a, only the value of the internal processing index relating to the hit symbol is sequentially updated and stored. Only the value of the internal processing index relating to the off symbol is sequentially updated and stored in each of the off symbol data storage registers r0b to r3b.

The relationship between the value of the internal processing index stored in the symbol storage registers r0 to r3 and the symbol is as shown in Tables 1 to 4, and the left, middle, right and upper display indices il, i
It is equal to the relationship between c, ir, iu and the symbol. The possible values of the internal processing index for the left symbol and the middle symbol are 0 to 12.
And the possible value of the internal processing index for the right symbol is 0
To 18 and possible values of the internal processing index for the upper symbol are 0 to 3. Therefore, in order to create all the possible combinations of symbols in a single cycle, 132, 19.4
One processing cycle is required.

[0041]

[Table 1]

[0042]

[Table 2]

[0043]

[Table 3]

[0044]

[Table 4] The combination of symbols stored in the left, center, right, and upper jackpot symbol data storage registers r0a to r3a is one of the combinations shown in Table 5, and all other combinations are left and center. , Right and top off symbol data storage registers r0b to r3b.

[0045]

[Table 5] When the left, middle, and right symbols all match, there is a combination of jackpot symbols regardless of the upper symbol, and there are 52 combinations, and the left and middle symbols match, and the left and middle symbols match. The middle and right symbols are “009”, “110”, “22”
1 "," 332 "," 443 "," 554 "," 66 "
In the case of any one of "5", "776", "887", and "998", the symbol combination of the big hit is obtained only when the display of the upper symbol becomes "+1". Therefore, the number of combinations is 10. Therefore, the probability of a big hit on the display is a value 62/12844 obtained by dividing the number of combinations of winning symbols by the total number of combinations of symbols.

In the embodiment, the variable display is performed based on the relationship between the value of the fixed random number storage register Ri set at the time of winning detection in the left, middle, and right type 1 starting openings 11, 10, and 12, and the set value. Since the symbols to be displayed at the time of stop are selected, the probability of occurrence of a big hit can be set arbitrarily irrespective of the combination occurrence probability of each symbol. Note that registers r0a to r3a, registers r0b to r3b,
Each value of the registers r0 to r3 indicates the value of the internal processing index, and is a display index i used for actual fluctuation display.
It is independent of the current values of l, ic, ir, iu.

The processing of task 3 shown in FIG. 11 to FIG. 18 is mainly concerned with the variable display of symbols.

The CPU 30 that has started the processing of the task 3
First, it is determined whether 1 or 2 is set in the operation flag Fa as to whether or not a new symbol variation display based on winning detection in the left, middle, and right type 1 starting openings 11, 10, and 12 can be started. (Step c1, step c1)
2). If the value of the operation flag Fa is 1, the symbol variation display is being executed, and if the value of the operation flag Fa is 2, the opening operation of the special winning opening 8 is being executed. It is impossible to start a new symbol change display. When the value of the operation flag Fa is 1, the CPU 30 continuously executes the symbol variation display in the processing of the task 3, and when the value of the operation flag Fa is 2, the CPU 30 substantially executes the task 3. The symbol variation display process is not executed.

If the operation flag Fa is a value other than 1 and 2, no symbol change display and opening operation of the special winning opening 8 are performed, and a new symbol change can be started. In the initial stage, the value of Fa is 0, and the winning detection to the left, middle, and right first-type starting ports 11, 10, and 12 is awaited.

In this case, the CPU 30 first determines whether or not the storage state identification flag F0 is set to 1;
Task 1, left, middle, right type 1 opening 11,
It is determined whether or not the winning of No. 12 has already been detected (step c3).

Left, middle, right type 1 starting ports 11, 10, 12
If the winning is detected, the value of the big hit random number storage register W at the time of the winning detection is set to the value of the step a of the task 1.
6 and step a7, the determined value storage register R0
And the storage state identification flag F0 is set to 1 in correspondence with the fixed value storage register R0. When the operation flag Fa has a value of 1 or 2, the CPU 30 sets the left, middle and right first. Each time a winning in the seed starting port 11, 10, 12 is detected, the determined random number storage register R is set in the order of i = 1 to 4.
The random number is stored in i. 1 in the storage state identification flag F0
Is set, left, middle, right type 1 starter 11,
This means that a prize of 10, 12 has been detected at least once (see steps a8 to a13).

If the storage state identification flag F0 is set to 1, the CPU 30 proceeds to step c4, sets 1 to the operation flag Fa, stores the start of the variable display, and selects the variable display. The variable state storage flag Fb that defines the process is set to 0 (step c5), and ta
A predetermined value is set to the parameters tc to tc (step c6). As shown in FIG. 19, ta to tc are fixed values indicating the switching time of the changing speed of each of the left, middle, right, and upper special symbols.

The CPU 30, which has set the switching time of the fluctuation speed of each of the left, middle, right and upper symbols, then sets the left, middle, right and upper symbol display LEDs (L), (C), (R), and (U) start a process of continuously incrementing the values of the display indices il, ic, ir, and iu indicating the symbols to be displayed in each of the symbols and changing the symbols at high speed (step). c7) Activate the timer T to start measuring the elapsed time after the start of the fluctuation display (step c).
8). In addition, actual symbol feed is each symbol display LED
By switching the display output of each line of (L), (C), (R), and (U) every several lines at predetermined intervals, the display is continuously performed as if the symbols flow up and down. Is well-known as a display technique using an LED element or the like, and thus description thereof is omitted. In the case of the embodiment, the reference values of the symbol feed speed of each symbol during the high-speed fluctuation and the low-speed fluctuation are 0.064 seconds / symbol and 0.256 seconds / symbol, respectively, and the transition order of each symbol is shown in FIG. It seems
Thirteen types of symbols are displayed on the left and middle symbols, 19 types of symbols are displayed on the right symbol, and four types of symbols are displayed on the upper symbol.

Further, it is not always necessary to use the dot matrix LED display 22 for each of the left, middle, and right symbol displays. Instead, the dot matrix LED display 23 is used.
May be used. Further, if a symbol based on the display indices il, ic, ir, iu is output to both the dot matrix LED display 22 and the dot matrix LED display 23, the symbol can be changed by the three-dimensional display. In the case of the embodiment, the distance from the dot matrix LED display 23 to the reflection surface of the half mirror 24 is the dot matrix L.
Since the distance from the ED display 22 to the reflection surface of the half mirror 24 is short, the dot matrix LED display 2
When the pattern is output to both the dot matrix LED display 23 and the dot matrix LED display 23, each dot of the dot matrix LED display 23 is overlapped with the dot matrix LED display 2
Because it looks closer and bigger than each dot of 2,
The central part of each dot is depressed and displayed three-dimensionally.

Hereinafter, the left, middle, right, and upper symbol display sections 4,
The description will be made on the assumption that the dot matrix LED display 22 is used for displaying the symbols 5, 6, and 7.

As described above, the variable display of the symbols based on the winning detection in the left, middle, and right type 1 starting openings 11, 10, and 12 is started. The value after td, that is, the value that regulates the time of low-speed fluctuation of the right symbol display unit 6 and the value that regulates the time of low-speed fluctuation of the upper symbol display unit 7 are not set.

In the processing after the next cycle, the operation flag Fa has already been set.
Is set to 1, the CPU 30 proceeds to step c.
After execution of the determination process of step 1, the process proceeds to step c9, and thereafter, steps c1 and c9 are performed until the elapsed time T after the start of the fluctuation display reaches the set value ta according to the current value 0 of the fluctuation state storage flag Fb. In addition, the determination processing of step c10 and the processing of step c18 relating to the high-speed fluctuation of each of the left, middle, right, and upper symbol display sections 4, 5, 6, and 7 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T after the start of the fluctuation display reaches the set value ta while repeatedly executing the high-speed fluctuation processing of each symbol in this way (step c10), the CPU 30 proceeds to step c10.
Whether the value of the fixed value storage register R0 matches the set value 7, that is, whether the left stimulus for starting the current symbol variation process,
It is determined whether or not the value of the big hit random number storage register W at the time of detecting a winning in the middle and right type 1 starting openings 11, 10, 12 matches the set value 7 corresponding to the big hit (step c).
11) If the value of the fixed value storage register R0 matches the set value 7, the respective values of the left, middle, right and upper jackpot symbol data storage registers r0a to r3a are changed to the left, middle, right and upper display symbol data storage registers. On the other hand, when the value of the fixed value storage register R0 does not match the set value 7, the values of the left, middle, right, and off design symbol data storage registers r0b to r3b are stored in the left and right (step c12). It is stored in each of the middle, right, and upper display symbol data storage registers r0c to r3c (step c13), and the left, middle, right,
The symbols to be displayed on the upper symbol display sections 4, 5, 6, 7 are determined.

Then, as shown in FIG. 21, the CPU 30 stores the data in the storage state identification flags F1 to F4 and the determined random number storage registers R1 to R4 into the storage state identification flags F0 to F2, the determined value storage register R0, and the determined random number. Shift sequentially to the storage registers R1 to R3,
Storage state identification flag F4 and fixed random number storage register R
4 is set to 0 to initialize (step c14).

The CPU 30 changes the value of the display index il for the left symbol so that the symbol corresponding to the internal processing index of the left display symbol data storage register r0c is displayed at the time of the fluctuation stop time tb of the left symbol display section 4. (Step c1
5) The change speed of the left symbol display unit 4 is switched from the high-speed change to the low-speed change (step c16), the change state storage flag Fb is set to 1 (step c17), and the processing of this cycle is ended.

Although the value of the display index il of the left symbol display unit 4 at time ta is not obvious, the value of the low speed fluctuation time tb-ta = A of the left symbol display unit 4 is set in advance. Since the low-speed fluctuation speed of the unit 4 is constant, the display index i is based on only the information of the display index of the symbol to be displayed on the left symbol display unit 4 during the fluctuation stop time tb of the left symbol display unit 4.
A setting change value of 1 can be obtained.

According to the processing timing of the embodiment, at the time of switching from the high-speed fluctuation to the low-speed fluctuation, the current value of the display index il is two symbols earlier than the display index of the symbol to be displayed on the left symbol display unit 4 when the fluctuation is stopped. Il to be the display index of
By changing the setting of the value, the symbol of r0c can be obtained at the time of the fluctuation stop. For example, if the value of the left display symbol data storage register r0c is 3, the left symbol displayed at the time of stop is 9 according to Table 1, so that when switching from high-speed fluctuation to low-speed fluctuation, the current value of the display index il is The value is switched to the value for displaying the symbol の two symbols before, and the process shifts to the low-speed fluctuation, and the symbol 9 is displayed on the left symbol display section 4 at the time of the fluctuation stop time tb.

In the processing after the next cycle, the CPU 30 proceeds to step c19 after executing the determination processing in step c1 and step c9, and thereafter, according to the current value 1 of the fluctuation state storage flag Fb, the elapsed time after the start of the fluctuation display. T is the set value t
Until it reaches b, the determination processing of step c1, step c9 and step c19 to step c20, the processing relating to the low-speed fluctuation of the left symbol display section 4, and the middle, right, and upper symbol display sections 5, 6, 7 The processing of step c28 relating to the high-speed fluctuation is repeatedly executed at a predetermined processing cycle.

In this manner, the elapsed time T after the start of the fluctuation display is set to the set value t while the fluctuation processing of each symbol is repeatedly executed.
When b is reached (step c28), the CPU 30 stops the low-speed fluctuation of the left symbol display unit 4 (step c21), and the symbol corresponding to the index stored in the left symbol data storage register r0c is statically displayed. Become. Then, CP
U30 is a display index i relating to the middle symbol so that the symbol corresponding to the internal processing index of the middle display symbol data storage register r1c is displayed at the time of the fluctuation stop time tc of the middle symbol display section 5.
The value of c is changed (step c22), and the speed of change of the middle symbol display unit 5 is switched from the high speed change to the low speed change (step c23).
Is set (step c24), and the process in this cycle is ended.

As in the case of the left symbol display unit 4, the value of the low speed fluctuation time tc-tb = A of the middle symbol display unit 5 is set in advance, and the low speed fluctuation speed of the middle symbol display unit 5 is constant. Therefore, it is possible to obtain a setting change value of the display index ic of the symbol to be displayed on the middle symbol display unit 5 at the time of the fluctuation stop time tc of the middle symbol display unit 5 based only on the information of the middle symbol data storage register r1c. it can. According to the processing timing of the embodiment, when switching from high-speed fluctuation to low-speed fluctuation, the current value of the display index ic is a display index two symbols before the display index of the symbol to be displayed on the medium symbol display unit 5 when the fluctuation is stopped. By changing the setting of the value of ic such that と, the symbol of r1c can be obtained at the time of fluctuation stop.

In the processing after the next cycle, the value of the fluctuation state storage flag Fb becomes 2, so that the CPU 30
After execution of the discriminating processes in steps c9 and c19, the process proceeds to step c25, and thereafter, step S25 is performed until the elapsed time T after the start of the fluctuation display reaches the set value tc according to the current value 2 of the fluctuation state storage flag Fb. c1, step c9,
Step c19 and steps c25 to c2
6 and the processing of step c27 relating to the low-speed fluctuation of the middle symbol display section 5 and the high-speed fluctuation of the right and upper symbol display sections 6, 7 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value tc in the determination processing of step c26, the CP
U30 stops the low-speed fluctuation of the middle symbol display section 5 (step c29). When the low-speed fluctuation of the middle symbol display unit 5 is stopped, the symbol corresponding to the index stored in the middle symbol data storage register r1c is statically displayed on the middle symbol display unit 5.

Next, the CPU 30 determines the current value of the display index il of the left symbol display section 4 and the display index ic of the middle symbol display section 5.
Is compared with the current value, that is, whether the symbol combination of the left symbol display unit 4 and the middle symbol display unit 5 for which the variable display is stopped satisfies the required condition of the big hit symbol combination. A determination is made (step c30), and t is determined according to the determination result.
Various data required for the symbol variation process after d time, that is, for setting the time of the low-speed variation of the right symbol display unit 6 is set.

First, when the result of the determination in step c30 is false, that is, the stop symbol on the left symbol display unit 4 and the stop symbol on the middle symbol display unit 5 do not match, and there is no probability that a big hit will occur. In the case of, the CPU 30 sets a predetermined value to td indicating the switching time of the right symbol fluctuation speed (step c31), and then stores the right display symbol data at the time of the fluctuation stop time td of the right symbol display unit 6. The value of the display index ir relating to the right symbol is set and changed so that the symbol corresponding to the internal processing index of the register r2c is displayed (step c3).
2), the change speed of the right symbol display unit 6 is switched from the high speed change to the low speed change (step c33), and the timer T is operated again to start measuring the elapsed time after the start of the low speed change display on the right symbol display unit 6. (Step c34), the variable state storage flag Fb is set to 3 (Step c35), and the processing in this cycle is ended.

The value of the low speed fluctuation time td of the right symbol display section 6 set when the value of the display index il of the left symbol display section 4 does not match the value of the display index ic of the middle symbol display section 5 is
This is a predetermined value B that is set in advance, and is 0.5 in the present embodiment.
76 seconds. Further, since the low-speed fluctuation speed of the right symbol display unit 6 is constant, the fluctuation stop time t of the right symbol display unit 6 is constant.
The setting change value of the display index ir can be obtained based on only the information of the display index of the symbol to be displayed on the right symbol display unit 6 at d. According to the processing timing of the embodiment, when switching from high-speed fluctuation to low-speed fluctuation, the current value of the display index ir is a display index two symbols before the display index of the symbol to be displayed on the right symbol display unit 6 when the fluctuation is stopped. Ir so that
By changing the value of, the symbol of r2c can be obtained at the time of the fluctuation stop.

When the result of the determination in step c30 is true, that is, when the stop symbol on the left symbol display unit 4 and the stop symbol on the middle symbol display unit 5 match, the necessary conditions for the combination of the big hit symbols are determined. In the case of a satisfying two symbol reach, CPU3
0 stores 0 to 4 bits (values from 0 to 31) of the R register in the right symbol variation random number register Y (step c36), and then, according to the current value of the right symbol variation random number register Y, The variable duration is selected based on the selection condition file in the ROM 31 as shown in Table 6 and set as the parameter td (step c37). Is selected based on the selection condition file in the ROM 30 as shown in (1), that is, the number of variations of the symbol which is varied within the variation duration, and based on the selected symbol variation number, the right symbol display section 6
The value of the display index ir relating to the right symbol is set and changed so that the symbol corresponding to the internal processing index of the right display symbol data storage register r2c is displayed at the time of the fluctuation stop time td (step c38).

[0072]

[Table 6] For example, if the value of the right display symbol data storage register r2c is 3
At this time, if the value of the right symbol change random number register Y is 6, from Table 6, 4.160 s is selected as the change continuation time and set as the parameter td. Equation 16 is selected, but the right symbol displayed at the time of stoppage is 9 from Table 3, so when switching from high-speed fluctuation to low-speed fluctuation, the current value of the display index ir displays the symbol の before the 16 symbols. The value is switched to a low-speed change.

Next, the CPU 30 proceeds to step c33, switches the fluctuation speed of the right symbol display unit 6 from the high speed fluctuation to the low speed fluctuation (step c33), activates the timer T again, and displays the low speed fluctuation display of the right symbol display unit 6. The measurement of the elapsed time after the start is started (step c34), the variable state storage flag Fb is set to 3 (step c35), and the processing of this cycle is ended.

The processing in steps c37 and c38 is performed by setting the fluctuation time at low speed to be constant as in the processing shown in step c31 and step c32. While resetting the value of the display index ir at the start,
The value of the display index ir at the start of the low-speed change is set in correspondence with the value of the display index of the symbol to be displayed when the change is stopped, assuming that the change time at the low speed is random according to the current value of the right symbol change random number register Y. It is to reset.

As shown in Table 6, the ROM 31 stores the symbol display on the right symbol display section 6 after the variation display on the middle symbol display section 5 is stopped in accordance with the value of the right symbol variation random number register Y. And the right display symbol data storage register r2
The symbol display of the right symbol display unit 6 is rotated substantially twice from the variation time of displaying the stop symbol of c, and the 32 types of variation time up to the variation time of displaying the stop symbol of the right display symbol data storage register r2c are stored. Which variation display time is selected and set is determined by the current value of the right symbol variation random number register Y. The player cannot recognize the current value of the right symbol change random number register Y, and cannot know whether the symbol display makes almost half or two turns.
It is very difficult to estimate a stopped symbol by simply observing the two symbols that have been stopped and the length of the fluctuation time of the symbol displayed at a low speed.

As a result of the variable state storage flag Fb being set to 3, in the processing after the next cycle, step c1, step c9, step c19, step c25, step c
After the execution of the determination process of step 39, the CPU 30 proceeds to step c40, and thereafter, in accordance with the current value 3 of the variable state storage flag Fb, until the elapsed time T after the start of variable display reaches the set value td, step c1. , Step c9, step c
19, step c25, step c39 and step c40, and the processing of step c49 relating to the low-speed fluctuation of the right symbol display section 6 and the high-speed fluctuation of the upper symbol display section 7 are repeatedly executed at a predetermined processing cycle.

When the elapsed time T reaches the set value td in the determination processing of step c40, the CP
U30 stops the low-speed fluctuation of the right symbol display section 6 (step c41). The symbol corresponding to the value stored in the right display symbol data storage register r2c is statically displayed on the right symbol display unit 6.

Next, the CPU 30 determines that the combination of the symbols stopped and displayed on the left, middle, and right symbol display sections 4, 5, and 6 is as shown in Table 5.
Whether the required condition of the combination of the symbol combinations related to the big hit shown in the lower row is satisfied, that is, 009, 11
0,221,332,443,554,665,77
In the case of a combination of any of the symbols of 6,887,998, hereinafter referred to as three symbol reach,
It is determined whether or not the combination of symbols stopped and displayed on the middle and right symbol display sections 4, 5, and 6 has reached three symbol reach (step c42, step c43, and step c5).
0), according to the determination result, the symbol variation processing after te,
That is, various data required for setting the time of the low-speed fluctuation of the upper symbol display unit 7 are set.

First, the CPU 30 determines whether or not the current value of the display index il of the left symbol display section 4 matches the current value of the display index ic of the middle symbol display section 5 (step c42). When the determination result of step c42 is false, that is, the stopped symbol and the middle symbol display unit 5 of the left symbol display unit 4
If the stop symbol does not match and there is no probability that a big hit will occur, the process proceeds to step c44, and a predetermined value is set to te indicating the switching time of the fluctuation speed of the upper symbol ( Step c44).

If the result of the determination at step c42 is true, that is, the stopped symbol on the left symbol display unit 4 and the middle symbol display unit 5
If the stop symbol matches, the CPU 30
It is determined whether or not the current value of the display index il of the left symbol display unit 4 matches the current value of the display index ir of the right symbol display unit 5 (step c43), and the determination result of step c43 is true. When the symbol pattern is displayed,
If the stop symbols 5 and 6 match in the same symbol and a big hit is obtained regardless of the stop symbol of the upper symbol, the process proceeds to step c44, and is set in advance to te indicating the switching time of the fluctuation speed of the upper symbol. Is set (step c44).

If the result of the determination in step c43 is false, that is, the stop symbol on the left symbol display unit 4 matches the stop symbol on the middle symbol display unit 5, and the left symbol display unit 4 When the stop symbol is different from the stop symbol of the right symbol display section 6, the CPU 30 determines that the current value of each of the display indices il, ic, and ir of the left, middle, and right symbol display sections 4, 5, and 6 is three.
A comparison is made to determine whether or not the symbol matches the symbol reach (step c50). If the determination result in step c50 is false, there is no probability that a big hit will occur due to a combination of 001 and 113, for example. In the case of, step c
The process proceeds to 44, where a predetermined value is set to te indicating the switching time of the fluctuation speed of the upper symbol (step c4).
4).

That is, the left, middle, and right symbol display sections 4, 5, 6
When the combination of the symbols stopped and displayed in the left and right middle becomes the same symbol and a big hit regardless of the stop symbol of the upper symbol,
When the combination of the symbols in the middle left and right is a combination other than the combination of the three symbols reach, a predetermined fixed value is set in the parameter te indicating the switching time of the fluctuation speed of the upper symbol. .

Then, in this case, after the processing of step c44, the CPU 30 displays the symbol corresponding to the internal processing index of the upper display symbol data storage register r3c at the time of the fluctuation stop time te of the upper symbol display section 7. To change the value of the display index ir relating to the upper symbol (step c4).
5) The switching speed of the upper symbol display unit 7 is switched from the high speed variation to the low speed variation (step c46), and the timer T is operated again to start measuring the elapsed time after the start of the low speed variation display of the upper symbol display unit 7. (Step c47), the variable state storage flag Fb is set to 4 (Step c48), and the processing of this cycle is ended.

Further, the value of the low speed fluctuation time te of the upper symbol display section 7 set in this case is a predetermined value set in advance, and is set to 0.320 seconds in the present embodiment. Also,
Since the low-speed fluctuation speed of the upper symbol display unit 7 is constant, the display index iu is determined based on only the information of the display index of the symbol to be displayed on the upper symbol display unit 7 during the fluctuation stop time te of the upper symbol display unit 7. A setting change value can be obtained. According to the processing timing of the embodiment, at the time of switching from high-speed fluctuation to low-speed fluctuation, the current value of the display index iu is a display index one symbol before the display index of the symbol to be displayed on the upper symbol display unit 7 when the fluctuation is stopped. By changing the value of iu so as to satisfy the above condition, it is possible to obtain the symbol r3c when the fluctuation stops.

On the other hand, in the discrimination processing in step c50, when the discrimination result is true, that is, when the current values of the display indices il, ic, and ir of the left, middle, and right symbol display sections 4, 5, and 6 are 3 If the symbol matches the symbol reach, CPU3
0 stores 0 to 1 bits (values from 0 to 3) of the R register in the upper symbol variation random number register Z (step c51), and then, according to the current value of the upper symbol variation random number register Z, The variable duration is selected based on the selection condition file in the ROM 30 as shown in Table 7 and the parameter t is set.
e (step c52), and the number of symbol variations is selected and selected according to the current value of the upper symbol variation random number register Z based on the selection condition file in the ROM 30 as shown in Table 7. Based on the number of symbol changes, the value of the display index iu relating to the upper symbol is changed so that the symbol corresponding to the internal processing index of the upper symbol data storage register r3c is displayed at the time of the fluctuation stop time te of the upper symbol display section 7. (Step c53).

[0086]

[Table 7] For example, if the value of the upper display symbol data storage register r3c is 3
At this time, if the value of the upper symbol variation random number register Y is 0, 4.672 s is selected as the variation continuation time from Table 7 and set as the parameter te. Equation 18 is selected, but since the upper symbol displayed at the time of stoppage is “+1” from Table 4, the current value of the display index iu is 18 symbols before the symbol “BB” when switching from high-speed fluctuation to low-speed fluctuation. Is switched to a value indicating "", and the operation shifts to low-speed fluctuation.

Next, the CPU 30 proceeds to step c46, switches the fluctuation speed of the upper symbol display section 7 from high-speed fluctuation to low-speed fluctuation (step c46), activates the timer T again, and displays the low-speed fluctuation display on the upper symbol display section 7. The measurement of the elapsed time after the start is started (step c47), the variable state storage flag Fb is set to 4 (step c48), and the processing of this cycle is ended.

The processing of step c52 and step c53 is performed by setting the fluctuation time at low speed to be constant as in the processing of step c44 and step c45. While the value of the display index iu at the start is reset,
The value of the display index iu at the start of the low-speed fluctuation is set in correspondence with the value of the display index of the symbol to be displayed when the fluctuation is stopped, assuming that the fluctuation time at low speed is random according to the current value of the upper symbol fluctuation random number register Z. It is to reset.

As shown in Table 7, the ROM 31 stores the symbol display on the upper symbol display unit 7 after the variation display on the right symbol display unit 6 is stopped in accordance with the value of the upper symbol variation random number register Z. Is stored in four types of variable times for displaying the stopped symbols in the upper symbol data storage register r3c by making approximately four to five cycles, and which variable display time is selected and set depends on the upper symbol variation. It is determined by the current value of the random number register Y. Since the player cannot recognize the current value of the upper symbol change random number register Z and cannot know whether the symbol display makes approximately four or five rounds, the player simply stops and displays the left symbol. It is very difficult to estimate the stop symbol by observing the combination of the three symbols, middle, and right, and the length of the fluctuation time of the upper symbol during the low-speed fluctuation.

As a result of the variable state storage flag Fb being set to 4, in the processing after the next cycle, step c1, step c9, step c19, step c25, step c
After the execution of the determination processing in step 39 and step c54, the CPU 30
Goes to step c55, and thereafter, the elapsed time T after the start of the variable display is set according to the current value 4 of the variable state storage flag Fb.
Step c1, Step c9, Step c19, Step c25, Step c
39, step c54 and step c55, and step c56 relating to the low-speed fluctuation of the upper symbol display unit 7.
Is repeatedly executed in a predetermined processing cycle.

When the elapsed time T reaches the set value te in the determination processing in step c55, the CP
U30 stops the low-speed fluctuation of the upper symbol display section 7 (step c57). At this point, the symbol corresponding to the value stored in the upper display symbol data storage register r3c is statically displayed on the upper symbol display unit 7.

Left, middle, right, upper symbol display sections 4, 5, 6, 7
CPU 30 that has stopped and displayed all of the symbols in the above-mentioned manner determines whether or not the combination of the current values il, ic, ir, and iu of the display indices of all the stopped and displayed symbols matches the combination of the symbols related to the jackpot (step). c58) If the result of the determination is true, that is, if the stop symbol is a big hit, 5 is set to the fluctuation state storage flag Fb (step c61), and the processing of this cycle is ended, while the processing of step c58 is terminated. If the result of the determination is false, that is, if the stop symbol is off, the operation flag Fa is set to 0 and initialized (step c5).
9), the variable state storage flag Fb is set to 0 for initialization (step c60), the process proceeds to step c3, and it is determined again whether the storage state identification flag F0 is set to 1 or not. .

Left, middle, right, upper symbol display sections 4, 5, 6, 7
If the stopped symbol is a symbol combination of a big hit, the variable state storage flag Fb is set to 5, and as a result, in the processing after the next cycle, the CPU 30 executes step c1 and step c
9, Step c19, Step c25, Step c39
After the execution of the determination processing in step c54, the CPU 30 proceeds to step c62 to start opening / closing the attacker-like large winning opening 8 driven to open and close by a solenoid or the like, and elapse of a predetermined opening time or to the large winning opening 8. Until the end condition of the opening / closing operation based on the detection of the winning number of game balls is satisfied, the opening / closing operation process of step c62 is repeatedly executed in a predetermined processing cycle, and the end condition is satisfied in the determination process of step c63. If it is detected, the special winning opening 8 is closed and the opening operation is terminated in the processing of step c64, the value of the operation flag Fa is set to 0 in the processing of step c65, and the fluctuation state is set in the processing of step c66. Set the value of the storage flag Fb to 0
Set and initialize, then proceed to step c3.

When the process again proceeds to the determination processing of step c3, when the operation flag Fa has a value of 1 or 2, the left,
If a prize is detected in the middle and right first-type start-up openings 11, 10, and 12 and the prize is stored, the process proceeds to step c14 to store the storage state identification flags F1 to F4 and the determined random number storage registers R1 to R4. Data is stored in status flag F
Since 0 to F2, the fixed value storage register R0, and the fixed random number storage registers R1 to R3 are sequentially shifted, the storage state identification flag F0 is set to 1, and the value of the big hit random number storage register W becomes It is stored in the fixed value storage register R0. In this case, the CP
U30 performs the next symbol variation process in order to proceed to the process after step c4.

Left, middle, right first type starting ports 11, 10, 12
If no winning is detected and no winning is stored, the storage state identification flag F0 is set to 0, and the CPU 30 ends the processing of the task 3.

In the present embodiment, the current value of the random number register W for the big hit is stored in the process of step a6 when the winning of the game ball to the left, middle and right type 1 starting ports 11, 10 and 12 is detected. At the time when the random number is stored in the register R0 or in the determined random number storage register Ri in the process of step a11, whether or not a big hit has occurred is determined by whether or not the stored random number value matches the set value 7. Is determined,
Further, at the time when the low-speed fluctuation of the left symbol display unit is started in the processing of step c15, steps c11 to c
By the process of 13, the combination of the big hit symbol and the combination of the missing symbols are determined in the left, middle, right and upper display symbol data storage registers r0c to r3c, and the left, middle, right and upper symbols are respectively changed from the high speed fluctuation display to the low speed. At the time of shifting to the variable display,
Middle, right, upper display symbol data storage registers r0c to r3
c, display index values il, ic, i corresponding to the symbols when the variable display is stopped, corresponding to the display data stored in each of the c.
The symbols to be displayed are stopped and displayed by switching r and iu to the previous values by the number of symbol variations and starting low-speed variation display.

In the embodiment, the low speed fluctuation time of the right symbol display section 6 is determined by the processing of step c30 when the symbols of the left and middle symbol display sections 4 and 5 are stopped and displayed. It is determined whether or not the current values of the display indices il and ic of No. 5 match, and if they match, the value of the right symbol change random number register Y is read out by the processing of Step c36, and Step c37
And in the process of step c38, one of the 32 types of variation times is selected from the ROM 31 in accordance with the current value of the right symbol variation random number register Y, and the number of symbol variations according to the selected variation time. Is read out, and the value ir of the display index corresponding to the symbol when the variable display is stopped corresponding to the display data stored in the right symbol display data storage register r2c is switched to the previous value by the number of symbol variations, and the low-speed variation is performed. Since the display is started, which change time is to be selected and set depends on the current value of the right symbol change random number register Y, so it is random. It is very difficult to estimate the stop symbol by observing the length of the change time of the symbol displayed in a variable manner.

The low-speed fluctuation time of the upper symbol display section 7 is
When the symbols on the left, middle, and upper symbol display sections 4, 5, and 6 are stopped and displayed, the display indices of the left, middle, and right symbol display sections 4, 5, and 6 are processed in steps c42, c43, and c50. It is determined whether or not the current values of il, ic, and ir match the symbols of the three symbol reach, and when they match, step c51 is determined.
The value of the upper symbol fluctuation random number register Z is read out by the process of
In the processes of step c52 and step c53, one of the four types of variation time is selected from the ROM 31 in accordance with the current value of the upper symbol variation random number register Z,
The number of symbol variations according to the selected variation time is read out,
The low-speed fluctuation display is started by switching the value iu of the display index corresponding to the symbol at the time of the fluctuation display stop corresponding to the display data stored in the upper symbol display data storage register r3c to the previous value by the number of symbol fluctuations. Since the change time to be selected and set depends on the current value of the upper symbol change random number register Z, it is random. It is very difficult to estimate the stop symbol by observing the length of the symbol fluctuation time.

Then, the low-speed fluctuation time of the right symbol display section 6 and the low-speed fluctuation time of the upper symbol display section 7 are obtained by shifting the display index values ir and iu corresponding to the symbols when the fluctuation display is stopped by the number of symbol fluctuations. Since the low-speed fluctuation display is started by switching to the value, it is set irrespective of the design when the fluctuation display is stopped.

In the case of the present embodiment, according to Table 6,
The low-speed fluctuation time of the right symbol display unit 6 at the time of the two symbol reach is 10.560 seconds at the maximum. According to Table 7, the low-speed fluctuation time of the upper symbol display unit 7 at the time of the three symbol reach is the maximum of 5.440.
Seconds, for example, assuming a case where a combination of three left and right symbols such as "110" and "AA" is displayed as an example of a missing symbol, such as "110" or "AA", At the same time, it is a symbol that reaches two symbols, so if 31 is selected as the random number for the right symbol variation and 3 is selected as the random number for the upper symbol variation, the total of the slow variation display time of the two symbols is 16 .000 seconds.
By the way, the symbols are not determined unless the symbols in the upper left and the middle are stopped.
Even if there is a prize memory for 10, 12, the next new symbol change will not be performed.

Further, each of the first type starting ports 11, 10, 12
When there are four winning memories, the winning memories for the new first-type starting ports 11, 10, and 12 become invalid.

Since the player plays a game for the purpose of opening the special winning opening 8 by the big hit of the symbol display section 3, the shorter the time from the start of the symbol change to the symbol determination, the shorter the symbol per unit time. Since the number of judgments increases and the probability of a big hit increases, a game that is advantageous to the player can be performed, but since the time from the start of symbol change to the symbol judgment is randomly operated, it will affect the game progress and the game result Can be. In particular, since a temporal irregularity can be generated at the level of the jackpot occurrence probability or the winning rate, it is possible to form a seasonal slump or a bad wave in a pachinko game.

[0103]

According to the pachinko gaming machine of the present invention, the symbols stopped and displayed on at least two of the plurality of symbol display portions constitute a part of the specific display mode in which the specific game state is established. In this case, that is, in the case of a so-called reach state, the symbol change duration time after the reach state is changed variously, so that the player's interest can be attracted.

[Brief description of the drawings]

FIG. 1 is a side sectional view showing a main part of a symbol display device of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is a front view showing a game board equipped with a symbol display device of the pachinko machine according to the embodiment of the present invention.

FIG. 3 is a front view showing a dot matrix display constituting a part of a symbol display section of the symbol display device of the embodiment.

FIG. 4 is a front view showing another dot matrix display which constitutes a part of the symbol display section of the symbol display device of the embodiment.

FIG. 5 is an exemplary front view showing an example of a visually recognized state of a symbol display unit of the symbol display device according to the embodiment;

FIG. 6 is a main block diagram showing a control unit of the symbol display device of the pachinko machine of the present invention.

FIG. 7 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine according to the embodiment of the present invention;

FIG. 8 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine according to the embodiment of the present invention.

9 is a continuation of the flowchart of FIG. 8;

10 is a continuation of the flowchart of FIG. 9;

FIG. 11 is a flowchart showing a part of the processing by the CPU provided in the pachinko machine according to the embodiment of the present invention;

FIG. 12 is a continuation of the flowchart of FIG. 10;

FIG. 13 is a continuation of the flowchart of FIG. 12;

14 is a continuation of the flowchart of FIG.

FIG. 15 is a continuation of the flowchart of FIG. 13;

16 is a continuation of the flowchart of FIG.

17 is a continuation of the flowchart of FIG. 18;

18 is a continuation of the flowchart of FIG.

FIG. 19 is a timing chart showing a symbol changing process in a symbol display unit of the symbol display device according to the embodiment of the present invention.

FIG. 20 is an operation principle diagram showing a storage operation of a fixed random number register Ri in the embodiment.

FIG. 21 is an operation principle diagram showing a storage operation of a fixed random number register Ri in the embodiment.

FIG. 22 is a diagram showing a transition order of each symbol in a symbol display unit of the symbol display device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Game board 2 Symbol display unit 3 Symbol display unit 4 Left symbol display unit 5 Middle symbol display unit 6 Right symbol display unit 7 Upper symbol display unit 8 Big winning opening 9 Winning device 10 Medium 1st type starting port 11 Left 1st type Starting port 12 Right type 1 starting port 13 Memorized number display LED 14 Specific area 20 Game ball sorting piece 21 Game ball sorting piece 22 Dot matrix LED display 23 Dot matrix LED display 24 Half mirror 25 Natural prize opening 26 Game ball sorting Unit 27 Transparent cover member 28 Viewing window 30 CPU 31 ROM 32 RAM 33 Switch detection unit 34 LED display circuit 35 Clock reset circuit 50 Indicator light A 51 Indicator light B 52 Indicator light C 53 Indicator light E 54 Character display LED 55 Left winning Mouth 56 Right winning opening 57 Lower left winning opening 58 Lower right winning opening 59 Windmill with lamp 60 Windmill 61 Out ball receiving port 62 Ball guide rail 63 Return rubber SW1 Type 1 starting port winning detection switch SW2 Type 1 starting port winning detecting switch SW3 Type 1 starting port winning detecting switch SW4 Specific area winning detecting switch SW5 Large winning port winning Detection switch

Claims (1)

[Claims] 1. A gaming machine that enters a specific gaming state when a combination of symbols displayed on a plurality of symbol display portions is a predetermined specific combination mode, and includes random number means. When the symbols stopped and displayed on at least two of the symbol display units among the plurality of symbol display units constitute a part of the specific display mode, the symbols which are variably displayed on other symbol display units are displayed. A pachinko gaming machine, wherein a fluctuating duration is determined by the random number means.