JPH11312775A - Manufacture of semiconductor package and semiconductor package manufactured by the method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the control of working size, and to improve the accuracy of products by molding the stage of a lead frame for the stage in the same surface as a lead-frame frame and placing the front end section of the lead terminal of a lead frame for the lead terminal at a place upper than the lead- frame frame and bending and shaping the front end section of the lead terminal. SOLUTION: A lead frame 1 for a stage is placed on a work base, semiconductor chips 2 are placed and fixed onto the top faces of each stage 12 while directing electrode sections 20 to the upper side, a lead frame 3 for lead terminals is superposed on the lead frame 1 for the stage while using mutual positioning holes 13, 32 as references, and lead terminal groups 31, 31... are stacked on the top faces of the semiconductor chips 2 at proper intervals. The front end sections 31t of the lead terminals 31 and the corresponding electrodes 20 are connected with wires 5. Since the stages 12 are formed in the same surface as a lead-frame frame 10 at that time, both lead frames 1, 3 can be horizontally displaced successively without vertically moving a heater block only by a feeding pawl.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor package and a semiconductor package manufactured by the method, and more particularly, to a conventional manufacturing apparatus and line using a flat stage lead frame for manufacturing. The present invention relates to a method of manufacturing a semiconductor package that can be manufactured without changing the structure, and a semiconductor package manufactured by the method.

[0002]

2. Description of the Related Art Generally, a semiconductor package is an element ("semiconductor chip") in which an integrated circuit network is formed by semiconductors.
Abbreviated. ) Is formed into a predetermined shape by resin-sealing the entirety of the semiconductor chip except for the external terminals of the lead terminals that are wire-connected (wire-bonded) to the electrode portions of the semiconductor chip. The arrangement of the lead terminals with respect to the semiconductor chip in the package is described in, for example,
No. 132453 has been proposed and disclosed. As shown in FIG. 8, this is achieved by sealing the internal terminals of the lead terminals in the height direction with respect to the semiconductor chip with a part or all of the resin in a state of being overlapped with each other, thereby reducing the size of the semiconductor package. Is also of a configuration for miniaturization.

According to the method disclosed in the above publication, a method of manufacturing the semiconductor package 200 is shown in FIG.
As shown in the perspective view, first, a long strip-shaped lead frame made of a thin metal plate is press-punched to form a stage 101 for mounting the semiconductor chip 110 thereon.
A stage lead frame 100 held downward from the frame 102 via a support bar 103, and a plurality of lead frames corresponding to the electrode portions 111 of the semiconductor chip 110 by press punching the lead frame. The lead terminal 1 is a lead terminal lead frame 1 in which the lead terminals 121, 121,...
After the semiconductor chip 110 is mounted and fixed on the upper surface of the stage 101 of the stage lead frame 100, the lead terminal lead frame 12
Then, the leading end 121t of the lead terminal 121 and the electrode part 111 of the semiconductor chip 110 are connected by the wire 130 in this state, and the external connection part 121c of the lead terminal 121 is left. And the whole is sealed with resin 210, and finally both lead frames 10
0, 120 to separate semiconductor package 2
00 is formed.

[0004]

However, in the above-mentioned conventional manufacturing method, a step portion ("lead step portion") 121d is formed for bending the lead terminal 121 of the lead terminal lead frame 120 downward. In addition, since the stage 101 of the stage lead frame 100 needs to be held at a position lower than the lowered position of the lead terminal 121, a step portion (“support step portion”) 103d in which the support bar 103 is bent downward. Therefore, in addition to managing the dimensional accuracy of the lead step 121d and the support step 103d, it is also necessary to manage the mutual dimensional error at the time of superposition. There was a problem that required management.

[0005] After the semiconductor chip 110 is sandwiched between the two lead frames 100 and 120, the wires are sequentially and continuously connected. This wire attachment process generally uses both the ultrasonic method and the thermocompression bonding method,
In order to efficiently transmit heat to the frame 102 and the stage 101, as shown in FIG. 11, a matching recess 141 in which a step difference of the support bar 103 is formed in the heater block 140 is formed, and It was necessary to increase the area of contact with the heater block 140 by adapting it. Therefore, when the stage 101 is sequentially sent to the heater block 140, a moving mechanism for moving the heater block 140 up and down every time the stage moves is required in addition to the horizontal feeding mechanism using the feed claw 150. In addition, a complicated additional mechanism is required, such as a need for an upper stop repetition position accuracy mechanism.

[0006] This means that the existing production equipment cannot be applied as it is, and it is necessary to make a dedicated capital investment, which in turn causes a cost increase.

[0007]

Accordingly, the present invention has been made in view of the above-mentioned problems, and by maintaining a flat lead frame for a stage, it is possible to reduce the management of machining dimensions and improve product accuracy, and to maintain the conventional equipment. An object of the present invention is to provide a method of manufacturing a semiconductor package aiming to suppress an increase in product cost by enabling manufacturing using the semiconductor package, and a semiconductor package manufactured by the method.

[0008]

In order to achieve the above object, a method of manufacturing a semiconductor package according to the present invention is configured as follows.

That is, a semiconductor chip is mounted on a stage formed by stamping and forming on a stage lead frame, and lead terminals corresponding to the electrode portions of the semiconductor chip are stamped on the mounted semiconductor chip. A semiconductor comprising a plurality of steps of laminating the formed lead terminal lead frame, and then wire-connecting the tip of the lead terminal and the electrode portion, and then sealing the resin with the external connection portion of the lead terminal remaining. In the manufacturing method of the package, the stage of the lead frame for the stage is formed on the same surface as the frame frame, and the leading end of the lead terminal of the lead frame for the lead terminal is positioned higher than the frame frame to set the lead terminal to a desired standard. It is characterized by being bent and formed into a configuration.

Further, the terminal is formed so that the back surface of the external connection portion of the lead terminal and the back surface of the stage are substantially flush with each other, and resin sealing is performed in a state where the back surface of the external connection portion and the back surface of the stage are exposed. It is characterized by the following.

Further, the semiconductor package manufactured by the above manufacturing method is characterized in that the back surface of the external connection portion of the lead terminal and the back surface of the stage are made substantially flush with each other and are sealed with a resin in an exposed state. .

[0012]

According to the present invention constructed as above, only the lead terminals of the lead frame for lead terminals are bent,
Since the stage of the stage lead frame is kept on the same plane as the frame frame, a dimensional error when superimposed is reduced, and dimensional accuracy control is reduced.

Further, since the lower surface of the stage lead frame has no protruding portion and is a flat surface, the stage is moved only by a horizontal moving mechanism using a feed claw.

[0014]

Next, embodiments of the present invention will be described in detail with reference to the drawings. The description of the orientation used in this specification is for convenience on the basis of the drawings. [First Embodiment] FIG. 1 is an exploded perspective view showing a first embodiment of the present invention, FIG. 2 is a cross-sectional view showing the same in a direction transverse to a lead frame, and FIG. 3 shows a semiconductor package manufactured thereby. FIG.

Reference numeral 1 denotes a long strip-shaped stage lead frame made of a thin metal plate.
A punching repetition pattern is formed that leaves a frame 10, two support bars 11, 11 formed continuously facing the frame 10, and a rectangular stage 12 formed through the support bar 11. The frame 10, the support bar 11, and the stage 12 are formed on the same plane. Reference numeral 13 denotes positioning holes formed in the frame 10 at appropriate intervals. In the present embodiment,
Although two support bars 11 are opposed to each other, the present invention is not limited to this, and two or more support bars 11 may be arranged at appropriate positions.

Reference numeral 2 denotes an element on which an integrated circuit network having a predetermined function is burned, which is generally called a semiconductor chip, and an appropriate number of external connection electrodes are provided on the upper surface thereof. The portions 20, 20,... Are formed so as to be exposed.

Reference numeral 3 denotes a long strip-shaped lead terminal lead frame made of a thin metal plate.
0 and a plurality of punching repetition patterns leaving a plurality of lead terminals 31, 31,... Corresponding to the electrode portions 20 of the semiconductor chip 2 are formed. In the lead terminal 31, an attachment portion to the frame 30 is a portion constituting the external connection portion 31 c in the semiconductor package 2,
The rear surface 31b is bent downward by the thickness of the stage lead frame 1, and after a flat surface of a predetermined length, a predetermined height (stage thickness + semiconductor chip thickness + α) is formed by a bent step portion 31d. ), And then bent into a shape in which a horizontal portion having a predetermined length is provided at the tip 31t. Reference numeral 32 denotes a positioning hole formed in the frame 30 at appropriate intervals.

With this configuration, when manufacturing the semiconductor package 4, the stage lead frame 1 is mounted on a work table (not shown), and the semiconductor chip 2 is mounted on the upper surface of each stage 12 with the electrode section 20 facing upward. After being fixed, the lead terminal lead frame 3 is inserted into the positioning holes 13, 3.
2 and a lead terminal group 3 on the upper surface of the semiconductor chip 2.
, Are overlapped with an appropriate gap. Next, the distal end portion 31t of the lead terminal 31 and the corresponding electrode 20 are connected by the wire 5. In this wire connection, generally, an ultrasonic method and a thermocompression bonding method are used in combination, and heating is performed from below by the heater block 6 in order to efficiently transmit heat to the frame 10 and the stage 12.

In this case, the stage 12 is
Since there is no portion of the stage 101 protruding below the stage lead frame 100 unlike the conventional example shown in FIG. 11, only the feed claw 7 that reciprocates horizontally as shown in FIG. Thus, the two lead frames 1 and 3 can be sequentially moved horizontally without moving the heater book 6 up and down.

After completion of the wire connection, the entire stage 12, the semiconductor chip 2, and the lead terminals 31 are resin-sealed by the transfer molding method, and then the external connection portions 31c of the lead terminals 31 exposed from the molded body of the resin 40 are formed. To
The semiconductor package 4 is manufactured by cutting at an appropriate position and cutting it off from the frame 30. In the resin encapsulation, the mold is configured such that the back surface 12b of the stage 12, a part of the external connection portion 31c, and the back surface 31b are exposed.

As shown in the cross-sectional view of FIG. 3, the semiconductor package 4 manufactured by such a manufacturing method is such that the back surface 12b of the stage 12 and a part of the external connection portion 31c of the lead terminal 31 and the back surface 31b are flush with each other. To be exposed,
The other part is sealed with a resin 40 and is surface-mounted on a printed circuit board (not shown) or the like using the back surface 31b of the external connection part 31 as an adhesive surface. Second Embodiment Next, a second embodiment of the present invention will be described.

FIG. 5 is an exploded perspective view showing Embodiment 2 of the present invention, FIG. 6 is a cross-sectional view showing the same in a direction transverse to a lead frame, and FIG. 7 is a cross-sectional view showing a semiconductor package manufactured thereby. It is.

The second embodiment differs from the first embodiment only in the shape of the lead terminal 81 of the lead terminal lead frame 8, and the same components as those in the first embodiment are the same. And the detailed description is omitted.

The lead terminals 81 shown in FIG.
After bending from the mounting portion of No. 0 and standing up by the thickness (or height) of the semiconductor package 9, a horizontal portion of a predetermined length to be the external connection portion 81c is formed to extend inward, and then the bent step portion 81d And then bent downward into a shape in which a horizontal portion having a predetermined length is provided at the distal end portion 81t.

With the above configuration, the semiconductor package 9 is manufactured by mounting and fixing the semiconductor chip 2 on the upper surface of each stage 12 of the stage lead frame 1 as in the first embodiment. The frame 8 is positioned and overlapped, and then the electrode portion 20 is
After connecting the end portion 81t of the lead terminal 8 with the lead terminal 8, resin sealing is performed in the same manner as in the first embodiment.

As shown in the cross-sectional view of FIG. 7, the semiconductor package 9 manufactured by such a manufacturing method has the rear surface 12b of the stage 12 on the lower surface side, a part of the external connection portion 81c of the lead terminal 81 and the rear surface 81b. Is exposed on the upper surface side, and the entire other portion is sealed with the resin 90, and the back surface 81b of the external connection portion 8 is used as an adhesive surface.
Surface mounted on a printed circuit board or the like.

The structure of the semiconductor package 9 is SON (Small Outlin Nolea).
It is known as a d) type semiconductor package (for example, JP-A-6-132453), and its effect is to make the package compact.

[0028]

[Effect] By configuring the present invention as described above,
The following effects are obtained. That is, unlike the conventional case, in which both the lead frame for the stage and the lead frame for the lead terminal are formed with bent steps, the bent step is formed only on the lead frame for the lead terminal. Therefore, the step size can be easily managed, and the manufacturing accuracy can be improved and the product defect rate can be reduced.

Further, since the stage of the stage lead frame is formed on the same surface as the frame, the upper surface of the heater block used for wire connection can be moved only horizontally. That is, unlike the related art, there is no need to provide a recess for adapting a stage arranged in a descending arrangement to the heater block, nor does it require a mechanism for moving the heater block up and down each time the lead frame is moved. It can be used as it is, and has the effect of suppressing an increase in production cost.

Further, according to the manufacturing method of the second aspect and the semiconductor package of the third aspect, the stage for mounting the semiconductor chip can be used as a heat radiating plate exposed on the back surface of the package at the time of manufacturing.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view showing a first embodiment of the present invention.

FIG. 2 is a cross-sectional view in a cross direction of a lead frame showing the first embodiment;

FIG. 3 is a cross-sectional view showing a semiconductor package manufactured according to the first embodiment.

FIG. 4 is a cross-sectional view illustrating an arrangement of a heater block according to the present embodiment.

FIG. 5 is an exploded perspective view showing a second embodiment of the present invention.

FIG. 6 is a cross-sectional view in a cross direction of a lead frame showing a second embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a semiconductor package manufactured according to the first embodiment.

FIG. 8 is a cross-sectional view showing a conventional semiconductor package.

FIG. 9 is a cross-sectional view in a cross direction of a lead frame showing a manufacturing method of a conventional example.

FIG. 10 is an exploded perspective view showing a conventional manufacturing method.

FIG. 11 is a cross-sectional view showing an arrangement of a heater block of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Lead frame for stage 10 Frame frame 11 Support bar 12 Stage 12b Back surface (~ of stage) 13 Positioning hole 2 Semiconductor chip 20 Electrode part 3 Lead frame for lead terminal 30 Frame frame 31 Lead terminal 31b Back surface (~ of external connection part) 31c External connection part 31d Bending step part 31t Tip part 32 Positioning hole 4 Semiconductor package 40 Resin 5 Wire 6 Heater block 7 Feeding claw 8 Lead terminal lead frame 80 Frame 81 Lead terminal 81b Back surface (of external connection part) 81c External Connecting part 81d Bent step part 81t Tip part 82 Positioning hole 9 Semiconductor package 90 Resin

Claims (3)

[Claims] A semiconductor chip is mounted on a stage formed by stamping and forming a lead frame for a stage, and a lead terminal corresponding to an electrode portion of the semiconductor chip is stamped on the mounted semiconductor chip. A semiconductor comprising a plurality of steps of laminating the formed lead terminal lead frame, and then wire-connecting the tip of the lead terminal and the electrode portion, and then sealing the resin with the external connection portion of the lead terminal remaining. In the method of manufacturing a package, the stage of the lead frame for the stage is formed on the same surface as the frame frame, and the leading end of the lead terminal of the lead frame for the lead terminal is positioned higher than the frame frame to set the lead terminal to a desired standard. A method for manufacturing a semiconductor package, wherein the semiconductor package is bent and formed into a configuration. 2. A lead terminal is formed such that the back surface of the external connection portion of the lead terminal and the back surface of the stage are substantially flush with each other, and resin sealing is performed with the back surface of the external connection portion and the back surface of the stage exposed. 2. The method for manufacturing a semiconductor package according to claim 1, wherein: 3. A semiconductor chip is mounted on a stage formed by die-cutting on a lead frame for a stage, and lead terminals corresponding to the electrode portions of the semiconductor chip are die-cut on the mounted semiconductor chip. It is manufactured by laminating the formed lead terminal lead frame, and then wire-connecting the tip of the lead terminal and the electrode portion, and then sealing the resin with the external connection portion of the lead terminal remaining. A semiconductor package, wherein a back surface of an external connection portion of a lead terminal and a back surface of a stage are substantially flush with each other and are sealed with a resin in an exposed state.