JPH11289657A - Rush current deterring unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To materialize a rush current deterring unit, which lessens the loss when steady operation as compared with the case of using resistors only. SOLUTION: This rush current deterrent is provided with a resistor R1, which is connected in series to the circuit for connecting the fellow negative sides of the main circuit and an electronic circuit, resistors R3 and R4 which are connected in series to the preceding stage of this resistor R1 and besides is connected in parallel with the power source, a transistor Q1 whose gate electrode is connected to the junction between these resistors R3 and R4 and whose source electrode and drain electrode are connected across the resistor R1 connected in series to the negative side, and a capacitor C2 which is provided between the gate of this transistor and the negative side of the main power source.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a rush current suppressing device for suppressing a rush current generated when a main power switch is turned on in a power supply circuit of electric equipment.

[0002]

2. Description of the Related Art An inrush current is generated when a main power switch is turned on or when an instantaneous power failure occurs. If the inrush current is large, the power switch may be welded, and it is necessary to reduce this.

FIG. 1 shows a conventional technique for suppressing an inrush current.
3, the thing shown in FIG. 14 is known. In FIG. 13, 1 is a main power supply, 2 is an inrush current suppressing means, and 3 is an electronic circuit. In this example, resistors R1 and R2 are connected in series on the positive side and the negative side of a path through which an inrush current flows. C1 is a capacitor for removing a ripple current when the electronic circuit 3 is a switching power supply. In such a circuit, an inrush current occurs due to the capacitor C1 and the like included in the electronic circuit 3. In some cases, one of the resistors R1 and R2 may be omitted.

FIG. 14 shows another conventional example, and FIG.
One of the resistors is a thermistor, and utilizes the fact that the resistance decreases as the temperature rises. In this example, when the power supply is initially turned on, the temperature of the thermistor is low and the resistance value is high, so that the inrush current is suppressed by the resistance component. During a steady operation, the resistance value is reduced by its own heat generation, so that the loss can be suppressed. In the figure, the resistor R1
However, the resistor may be omitted and the connection position of the thermistor and the resistor may be reversed.

[0005]

However, FIG.
Is effective in the case of an electronic circuit with low power consumption, but is effective in a circuit with a large current value flowing during normal use (large power consumption of the electronic circuit 3). The heat generation and the loss of the device increase. Further, in such a circuit (having a large loss), it is necessary to use a resistor having a large rated power as an inrush current prevention resistor. However, a resistor having a high rated power tends to be physically large, and thus occupies a large volume in the device. That is, there is a problem that the inrush current increases when the heat generation and the loss are reduced, and the heat generation and the loss increase when the resistance is increased to reduce the inrush current.

The conventional circuit shown in FIG. 14 is effective for a simple electronic circuit having a small board area, but has a small effect of suppressing the rush current at a high temperature because the resistance of the resistor R2 is low. . Therefore, when the ambient temperature is high, or when the switch is turned on while the temperature is high due to self-heating, there is a problem that the rush current increases.

An object of the present invention is to improve such a point, and to suppress a large rush current generated by an electronic component such as a capacitor included in an electronic circuit or a circuit configuration. To reduce the loss during regular use. Compatible with a wide input voltage range. It is not necessary to consider the variation in characteristics and temperature conditions that occur when using a thermistor. It is an object of the present invention to provide an inrush current suppressing device that takes measures such as the above.

[0008]

According to the present invention, a DC voltage from a main power supply is supplied to an electronic circuit connected to a subsequent stage through an inrush current suppressing means. In the inrush current suppression device configured to supply the inrush current suppression means, the inrush current suppression means includes a resistor (R1) connected in series to a circuit connecting the negative sides between the main power supply and the electronic circuit; A resistor (R3) and (R4) connected in series with the preceding stage of R1) and connected in parallel to the main power supply, and a gate electrode is connected to a connection point between the resistors (R3) and (R4). A transistor (Q1) having a source electrode and a drain electrode connected across both ends of the resistor (R1) connected in series to the negative side; and a transistor (Q1) provided between the gate of the transistor and the negative side of the main power supply. Capacitor (C2) It is characterized in that digit. The rush current suppressing device according to claim 2, wherein the DC voltage from the main power supply is supplied to an electronic circuit connected to a subsequent stage via the rush current suppressing means, wherein the rush current suppressing means includes the main power supply and the main power supply. DC /
A DC converter (4) and a resistor (R5) between an output terminal of the DC / DC converter (4) and the negative side of the main power supply;
One end is connected between the resistor (R5) and the capacitor (C3);
A resistor (R6) having the other end connected to the negative side of the main power supply,
A resistor (R1) having a gate electrode connected between the resistors (R5) and (R6) and connected in series to the negative side of the main power supply
A transistor (Q1) having a source electrode and a drain electrode connected to each other with both ends of the transistor (Q1) interposed therebetween. The rush current suppression device according to claim 3, wherein the DC voltage from the main power supply is supplied to an electronic circuit connected to a subsequent stage via the rush current suppression means. D provided between the electronic circuits
A C / DC converter (4) and a resistor (R) between an output terminal of the DC / DC converter (4) and the negative side of the main power supply.
5) and a resistor (R6) connected through the resistor (R6).
A transistor (Q1) having a gate electrode connected between 5) and (R6) and having a source electrode and a drain electrode connected across both ends of a resistor (R1) connected in series to the negative side of the main power supply. A drain electrode is connected to the gate electrode of the transistor (Q1), and a source electrode is connected to the negative side of the main power supply. The gate electrode is composed of a capacitor (C4) for detecting whether the main power supply is turned on and a resistor (R7). A transistor (Q2) connected to the differentiating means is provided. According to a fourth aspect of the present invention, in the rush current suppressing device of the third aspect, a Zener diode (D1) having a cathode connected between the capacitor (C4) and the resistor (R7) and an anode connected to the negative side of the power supply is provided. It is characterized by: According to a fifth aspect of the present invention, in the rush current suppressing device of the third aspect, a resistor (R8) having one end connected between the capacitor (C4) and the resistor (R7) and the other end connected to the gate of the transistor (Q2). It is characterized by having been provided. According to a sixth aspect of the present invention, in the rush current suppressing device of the third aspect, one end is connected between the capacitor (C4) and the resistor (R7), and the other end is connected to the gate of the transistor (Q2). And a resistor (R
8) and a Zener diode (D1) having one end connected between the gate of the transistor (Q2) and the other end connected to the source of the transistor (Q2). According to a seventh aspect of the present invention, in the rush current suppressing device of the sixth aspect, a capacitor (C5) having one end connected between the capacitor (C4) and the resistor (R7) and the other end connected to the negative side of the power supply is provided. It is characterized by that. Claim 8
In the rush current suppressing device according to claim 6, a capacitor (C6) having one end connected between the resistor (R8) and the gate of the transistor (Q2) and the other end connected to the negative side of the power supply is provided. It is characterized by. According to a ninth aspect, in the rush current suppressing device according to the second to eighth aspects, a current-sensitive interrupting device (F1) provided in a main power supply.
A control circuit (5) provided at a stage subsequent to the DC / DC converter (4); and a transistor (Q3) connected to an output terminal of the control circuit (5) to a gate terminal and performing a switching operation from a main power supply. A switching circuit (6) having one end connected to the output terminal of the DC / DC converter and the other end connected to one end of a resistor (R5); and a drain terminal of the transistor (Q1) and one end of a resistor R1. It is characterized by comprising a temperature-sensitive shut-off device (F2). According to Claim 10, in the rush current suppressing device according to Claims 2 to 9, the switching circuit (6).
The cathode side of the Zener diode is connected to the switch control section, and the anode is connected between the above and the drain terminal of the transistor (Q1).

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 1 shows an example of an embodiment of the present invention using a resistor and a transistor.
A resistor R2 is connected in series to a circuit connecting the positive sides of the main power supply 1 and a resistor R1 is connected in series to a circuit connecting the negative sides of the main power supply 1 and the electronic circuit 3.

A capacitor C1 is connected in parallel to the main power supply at a stage subsequent to the resistors R1 and R2, and a resistor connected in series and connected in parallel to the main power supply before the resistors R1 and R2. R3 and R4 are connected. This resistance R
The connection point between R3 and R4 is connected to the gate electrode of the transistor Q1, and the source electrode and the drain electrode are connected across both ends of the resistor R1 connected in series to the negative side of the main power supply. A capacitor C2 is connected between the gate of the transistor Q1 and the negative side of the power supply 1.

In the above configuration, the moment the power is turned on, the transistor Q1 is off. At this time, since the current flows through the resistors R2 and R1, the rush current is suppressed. When a certain time has passed since the power was turned on, electric charge is accumulated in the capacitor C2, and the transistor Q1 is turned on. For this reason, the loss when the portion of R1 is constantly operated can be reduced as compared with the case where only the resistor is used (R2 in FIG. 1 is not necessary).

FIG. 2 shows another embodiment of the present invention. In FIG. 2, reference numeral 1 denotes a main power supply, 2c denotes an inrush current suppressing means, and 3 denotes an electronic circuit. In this embodiment, the inrush current suppressing means 2c includes a DC / DC converter 4 disposed in a stage preceding the electronic circuit 3. Make up. Here, DC / DC
Converter 4 and capacitor C provided on the negative side of power supply 1
Reference numeral 8 functions as an AC component cut element.

The output of the DC / DC converter 4 is a resistor R5
The other end of the capacitor C3 is connected to the reference point A of the power supply 1. One end of the resistor R6 is connected between the resistor R5 and the capacitor C3, and the other end is connected to the reference point A. Resistance R
5 and the capacitor C3, the gate electrode of the transistor Q1 is connected. The source electrode and the drain electrode of the transistor Q1 have one end connected to the reference point A and the other end connected to the both ends of the resistor R1 connected to the capacitor C1. With main power 1
Is connected to the negative side.

Here, for example, when the input voltage is 32 V and R1 =
1Ω, Q1 ON resistance = 0.03Ω OFF resistance = 、
When the output of the DC / DC converter 4 is designed to be 18V,
The time chart of the inrush current suppression circuit is shown in FIG.
The result is as shown in (h). In addition, the numerical value at the bottom indicates the passage of time (several meters to several tens of meters). In the figure,

(A) is the input voltage, which reaches 32 V when the switch SW is turned on. (B) is a voltage across the resistor R1. The voltage across the resistor R1 decreases with time because the current flowing through the resistor R1 decreases (as the capacitor C1 is charged). Is exceeded, and when Q1 becomes conductive, the voltage across R1 becomes almost completely zero.) (C) is a voltage between both ends of the capacitor C1, which becomes the same voltage as the input voltage 32V after a predetermined time 12 has elapsed.

(D) is an output voltage of the DC / DC converter 4, which becomes a design voltage of 18 V when time 3 has elapsed.
(E) is the voltage at both ends of the DC / DC converter 4 for time 7
Becomes equal to the design voltage 18V at the time when the time has elapsed.

(F) is a voltage between the gate and the source of the transistor Q1, which is turned on when the threshold value is exceeded.

(G) is a current flowing through the drain-source of the transistor Q1, which starts flowing when the transistor Q1 is turned on after a predetermined time 12 has elapsed. (H) is the total inflow current Iin flowing through the circuit when the switch SW is turned on.

In FIG. 2, when the switch SW of the main power supply is turned on, the DC / DC converter 4 operates, and the DC / DC converter 4 operates.
The transistor Q1 operates at the output of the DC converter 4, and the time until the transistor Q1 is turned on is adjusted by the time constant of the capacitor C3 and the resistor R5. Therefore,
The inrush current first flows only through the resistor R1, and after a certain period of time,
It will flow through transistor Q1.

As a result, at the moment when the switch is turned on, the current flows through the resistor R1 functioning as an inrush current suppressing resistor, so that the peak value of the current is suppressed. And
At the time of steady operation, since the on-resistance of the transistor Q1 is extremely small as compared with the resistance R1, the current mainly flows to the transistor Q1.

As a result, the loss can be reduced as compared with a circuit using only a resistor. In addition, since the transistor Q1 is driven by the output of the DC / DC converter 4, regardless of the input voltage, after the power switch SW is turned on and the transistor Q1 is turned off, the transistor Q1 is ideally operated. It can be turned on (stable) under a bias condition. Such a circuit is effective when the input voltage range of the external power supply cannot be set large in the circuit shown in FIG.

By the way, in the embodiment shown in FIG.
Even if the voltage of the capacitor C1 drops to some extent (for example, about 4 V), the DC / DC converter 4 continues to output if the voltage is within the operating range of the DC / DC converter 4. For this reason, when the external power supply is momentarily interrupted, or when the power switch SW is turned on, the power supply switch SW is turned off for a short time from a short time, and at a certain timing (for example, when the voltage of the capacitor C1 is lowered and the DC / DC converter In the case where the power switch SW is turned on again while the power switch 4 is operating), there is a problem that the rush current cannot be suppressed because Q1 is kept on all the time.

FIG. 4 shows a resistor R5, a transistor Q1 and a DC.
FIG. 9 is a diagram illustrating voltage changes of respective units when the switch SW is turned off and then turned on in a short time when the / DC converter 4 is used. As shown in the figure, when the power switch SW is turned off at the time indicated by A, the charge of the capacitor C1 is discharged, but the output of the DC / DC converter 4 continues for a certain time. After a certain period of time, the output of the converter 4 also becomes zero, but if the switch SW is turned on immediately before the stop (the gate of the transistor Q1 is still on), the current does not pass through the resistor R1. The current flows between the drain and source of the transistor Q1 having a low resistance value. Therefore, in such a case, there is no effect of suppressing the rush current.

FIG. 5 shows a case where the external power supply is momentarily interrupted, or a case where the power switch SW is turned on and the power supply switch SW is turned off for a short time from a short time.
This shows another embodiment of the present invention in which the rush current is suppressed even when the power supply is re-input. B surrounded by a two-dot chain line
The other parts are the same as those shown in FIG. 2, and the description thereof will be omitted.

In FIG. 5, the drain terminal of the transistor Q2 is connected to the gate electrode of the transistor Q1,
One end of the capacitor C4 and one end of the resistor R7 are connected to the gate electrode of the transistor Q2 via the resistor R8, the other end of the capacitor C4 is connected to the positive side of the power supply, and the other end of the resistor R7 is connected to the negative side. A differentiating circuit is constituted by the capacitor C4 and the resistor R7. The gate of the transistor Q2 is connected to the cathode of the Zener diode D1, and the anode is connected to the negative side.

Here, the transistor Q2 is a low power FE for communication having a maximum rated VGS between the gate and the source of about 20V.
Use the one with high operation speed at T. The resistor R8 is for protecting the gate of the transistor Q2 and functions as an overvoltage prevention resistor. The time constant of the differentiating circuit is determined by the resistor R7 and the capacitor C4. The capacity of the capacitor C4 is, for example, about 1 μF smaller than the capacity of the capacitor C1 of about 5000 μF.

Here, the voltage across the resistor R7 is VR7, the gate-source voltage of the transistor Q1 is VQ1gs,
The gate-source voltage of Q2 is VQ2gs, and the threshold level of the gate of Q1 is VQ1th (= about 1.5
V), the threshold level of the gate of Q2 is set to VQ2t
Consider h (= approximately 1.5 V).

First, assuming that R8 is short and Zener diode D1 is open, it is assumed that VR7 = VQ2gs (see FIG. 6). When the power switch 1 is turned on, VR7 = Vin, and the voltage across VR7 decreases with the passage of time. Here, during the period of VR7> VQ2th (several tens of milliseconds), since Q2 is on, the gate and source of Q1 are short-circuited.

Therefore, IR1 = Iin while VQ1gs = 0 and Q1 remain off. When several tens of milliseconds elapse after the switch 1 is turned on, VR7 <VQ2th, and Q2 is turned off.

At that time, the charging of the capacitor C1 is almost completed, and VC1 becomes ≒ Vin. And Iin
Is considerably small (several A or less), and VR1 = I
Consider that R1 × R1 ≒ 0. Since the output of the DC / DC converter 4 is stable at 18 V, VQ1gs is
Determined by dividing cnv1 by R6 and R5, (18 + VR1) × R6 / (R6 + R5) ≒ 18 × R6
/ (R6 + R5)> VQ1th, so that Q1 turns on and IDS (current of Q1)
>> IR1 is obtained.

Here, the resistor R8 and the Zener diode D
Considering the addition of 1, if the Zener voltage of the diode D1 is designed to be, for example, 12V, VQ2GS ≦ 12V even if a voltage exceeding this is applied to Vin, and the maximum rating between the gate and source of Q2 is about 20V. The gate of Q2 will be protected.

FIG. 7 shows the state of the switch SW from the state of VC1 = 0.
FIG. 6 is a conceptual diagram showing operation timings of the circuit shown in FIG. 5 when is turned on. As shown in the figure, when the switch SW is turned on, Iin flows into the circuit (b), and the voltage VC1 across the capacitor C1 starts to increase (a). At the same time, transistor Q2
, The voltage VGS between the gate and the source of the transistor quickly rises and the transistor Q2 is turned on (c). Since the transistor Q1 is off while the transistor Q2 is on, the inrush current is R1
Flows through. (D) is a voltage VGS between the gate and the source of the transistor Q1. (E) is the output of the DC / DC converter. As a result, the inrush current can be suppressed to several tens A or less.

FIG. 8 is a conceptual diagram showing the operation timing of the circuit when the switch SW is turned off and turned on again in a short time. First, it is assumed that the switch SW is turned off at the time indicated by A. From that point, the charge of the capacitor C1 starts to be discharged (a). Before the switch SW is turned off, a steady consumption current of Iin (several A) flows through the circuit, and becomes zero A after the switch is turned off (b). The gate-source voltage VGS of the transistor Q2 is off (c), the gate-source voltage VGS of the transistor Q1 is on (d),
The output of the DC / DC converter 4 is on (e).

When the switch is turned on again at the point indicated by B, the rush current of Iin flows through the circuit at that point (b), and as a result, the charge of the capacitor C1 starts to be charged (a). At this time, the gate-source voltage VGS of the transistor Q2 turns on (c), and the gate-source voltage VGS of the transistor Q1 turns off (d). The output of the DC / DC converter 4 is kept on (e).

FIG. 9 shows a circuit in which a capacitor C5 is added to both ends of the resistor R7 in the circuit shown in FIG. 5. According to such a configuration, even if a very high voltage is input, the voltage can be divided and the Zener diode D1 It functions as a protection circuit for the transistor Q2. FIG. 10 shows a configuration in which capacitors C6 are added to both ends of the zener diode D1 in the circuit shown in FIG. 5, and such a configuration can further stabilize the circuit.

FIG. 11 is a circuit diagram showing an example in which the rush current suppressing circuit is used in a DC power supply driven electronic device. FIG.
The whole constitutes one DC-DC converter (switching power supply). In a switching power supply, a current flowing in a transformer is turned on and off by a transistor to generate an alternating current, and energy is transmitted to a secondary side through a magnetic field of the transformer. On the secondary side, the transmitted energy is rectified by a diode and a capacitor to obtain a direct current.

The secondary side voltage is detected by any method, and 1
By adjusting the ON-OFF interval on the secondary side, the secondary-side DC voltage is kept constant. In this embodiment, the secondary winding voltage is detected by using the auxiliary winding (transformer terminal 5-6), and the ON / OFF time of Q3 is controlled.

Here, the switching transistor Q3
Is to take measures in the event of short mode. When the transistor Q3 is short-circuited, the capacitor C
The voltage between the terminals 1 becomes 0 V, and the DC-DC converter 4 stops. Then, the Q included in the inrush current suppression circuit 2g
1 becomes OFF.

As a result, the current path flows from the terminal 1 of the switch SW to Q3 through the resistor R1 to the terminal 3 of the switch SW. At this time, since the transistor Q1 is OFF, an input voltage is applied to both ends of the resistor R1, and power is consumed only by the resistor R1 to generate heat. By the way, Fuse F1
Is 6.3 A and the resistance of the resistor R1 is 1 Ω, for example, if 24 V is input, 24 V ÷ 1 = 24 A, so that the fuse (F1) can be cut off instantaneously and safety can be maintained.

However, when the input is 8 V, the flowing current is 8 A. In this case, due to the fusing characteristics of the fuse,
It takes tens of minutes to one hour for F1 to shut off. In the meantime, the resistance continues to generate heat at 64 W, which is dangerous. The same can occur when the overcurrent protection function is set in the power supply source (main power supply) 1. For example, in the case of a main power supply in which the voltage setting is 24 V and the overcurrent protection function is set to 8 A, the protection operation is activated (due to the short circuit of Q3), and the current of 8 A continues to flow until the current path is cut off. It becomes a state.

FIG. 12 shows an example of an embodiment of the present invention for solving the above problem. In this embodiment, a resistor is connected via a switching circuit 6 for switching the output of a DC / DC converter 4. R5, and the connection between the drain electrode of the transistor Q1 and the resistor R1 is made via a temperature-sensitive interrupting device (hereinafter referred to as a temperature fuse) F2 (the positions of the resistor R1 and the fuse F2 may be reversed). ). In the embodiment, the photocoupler 20a is used as the switching element of the switching circuit 6, but a switch such as a bipolar transistor, a field effect transistor, an electromagnetic relay, or a semiconductor relay may be used.

The anode of the Zener diode D2 is connected via the resistor R9 between the photocoupler 20a constituting the switching circuit 6 and the drain terminal of the transistor Q1 (the positions of the resistor R9 and the Zener diode D2 are opposite. Good). The resistor R1 and the thermal fuse F2 need to be thermally coupled sufficiently. For example, a thermal fuse built-in resistor can be used.

In the above configuration, when the main switching transistor Q3 is short-circuited, the voltage across the capacitor C1 first decreases, and the output of the DC / DC converter 4 turns off, so that the transistor Q1 turns off. Thereafter, the resistor R1 generates heat due to the current, and the temperature fuse F2 is blown by receiving the heat.

Since the gate potential of the transistor Q1 rises momentarily immediately after the blowing of the thermal fuse F2, if the switching circuit 6 is not provided, the transistor Q1 may be turned on halfway and damaged. However, since the gate potential of the transistor Q1 is maintained at the same level as the source potential even immediately after the thermal fuse F2 is blown by the operation of the switching circuit 6, the transistor Q1 can be kept off.

In the above description, when the output of the DC / DC converter 4 drops slowly, the switching circuit 6 turns off slowly and the transistor Q1 also turns off slowly. If the transistor Q1 is turned off slowly while a current is flowing through the transistor Q1, the transistor Q1 may be broken beyond the safe operation area. It works effectively when the Zener diode D2 is inserted as a countermeasure. That is,
Since the Zener diode D2 can be turned off in a short time when the output of the DC / DC converter 4 decreases slowly,
When the safe operation area of Q1 becomes a problem, there is an effect that the current path is quickly cut off to ensure safety.

The foregoing description of the present invention has been presented by way of illustration and example only, and of particular preferred embodiments. Accordingly, the present invention has many modifications, without departing from its essence,
It will be apparent to those skilled in the art that variations can be made. The scope of the present invention defined by the description in the claims section is intended to cover alterations and modifications within the scope.

[0047]

As described above, according to the present invention, according to claim 1, a resistor (R1) connected in series to a circuit connecting a negative side between a main power supply and the electronic circuit,
The resistors (R3) and (R3) connected in series before the resistor (R1) and connected in parallel with the main power supply.
4), a gate electrode is connected to a connection point between the resistors (R3) and (R4), and the resistor (R) connected in series to the negative side.
1) A transistor (Q1) having a source electrode and a drain electrode connected to each other with both ends interposed therebetween, and a capacitor (C2) provided between the gate of the transistor and the negative side of the main power supply.
Is provided, the loss in the case of the stationary operation can be reduced as compared with the case where only the resistor is used.

According to another aspect of the present invention, a DC / DC converter (4) provided between a main power supply and the electronic circuit.
A capacitor (C3) connected between an output terminal of the DC / DC converter (4) and the negative side of the main power supply via a resistor (R5); and a resistor (R5) and a capacitor (C5).
3) a resistor (R6) having one end connected to the negative side of the main power source and the other end connected to the negative side of the main power source;
6), a transistor (Q1) in which a source electrode and a drain electrode are connected across both ends of a resistor (R1) connected in series to the negative side of the main power source is provided. Loss can be reduced compared to a circuit using only Further, the transistor Q1 is connected to DC /
Since the transistor Q1 is driven by the output of the DC converter 4, the transistor Q1 can be driven under stable conditions regardless of the input voltage.

According to a third aspect of the present invention, a DC / DC converter (4) provided between a main power supply and the electronic circuit.
And a resistor (R6) connected between the output terminal of the DC / DC converter (4) and the negative side of the main power supply via a resistor (R5), and an intermediate point between the resistors (R5) and (R6). A transistor (Q1) having a gate electrode connected thereto, a source electrode and a drain electrode connected across both ends of a resistor (R1) connected in series to the negative side of the main power supply, and a gate electrode of the transistor (Q1) The transistor (Q2) has a drain electrode connected to the negative side of the main power supply, a source electrode connected thereto, and a gate electrode connected to a differentiating means comprising a capacitor (C4) for detecting the presence or absence of the main power supply and a resistor (R7). ), The inrush current can be suppressed when the power switch is turned on (when initially turned on) in a state where no charge is accumulated in the capacitor (C1).

In addition to this, immediately after the power switch is turned off, electric charge still remains in the capacitor C1, so that the DC / DC converter (4) is operating and the transistor Q1 is turned on. S
Inrush current generated when W is turned on again can also be suppressed. Further, as in the case of the second aspect, the inrush current suppressing device which can reduce the loss at the time of steady use, can cope with a wide input voltage range, and does not need to consider the variation in characteristics and the temperature condition generated when the thermistor is used. Can be realized.

According to a fourth aspect of the present invention, there is provided a Zener diode (D1) in which a cathode is connected between the capacitor (C4) and the resistor (R7) and an anode is connected to the negative side of the power supply. ), Q2
Gate can be protected.

According to a fifth aspect of the present invention, one end of the inrush current suppressing device is connected between the capacitor (C4) and the resistor (R7), and the other end is connected to the gate of the transistor (Q3). Since (R8) is provided, the gate of Q2 can be protected.

In one embodiment, one end is connected between the capacitor (C4) and the resistor (R7), and the other end is connected to the gate of the transistor (Q2).
And a resistor (R8) and a transistor (Q2)
One end is connected between the gates of the transistors (Q2) and the other end is connected to the source of the transistor (Q2).
1), the differentiation point (resistor R7 and capacitor C4
It is possible to prevent the operation from becoming unstable even when the voltage at the (connection point) suddenly rises.

According to a seventh aspect of the present invention, the inrush current suppressing device according to the sixth aspect includes a capacitor (C4) and a resistor (R
Since the capacitor (C5) having one end connected to the other end and the other end connected to the negative side of the power supply is provided, the circuit can be stabilized.

According to a ninth aspect of the present invention, the inrush current suppressing device according to the sixth aspect includes a resistor (R8) and a transistor (Q).
Since a capacitor (C6) having one end connected between the gates and the other end connected to the negative side of the power supply is provided, the circuit can be stabilized.

According to a ninth aspect of the present invention, the rush current suppressing device according to the third to eighth aspects is provided at a stage subsequent to the current-sensitive interrupting device (F1) provided in the main power supply and the DC / DC converter (4). A control circuit (5) provided, and a transistor (Q3) connected to an output of the control circuit (5) at a gate terminal and performing a switching operation from the main power supply
A switching circuit (6) having one end connected to the output end of the DC / DC converter and the other end connected to one end of the resistor (R5); a drain terminal of the transistor (Q2); and one end of a resistor R1. , The resistor R1 functions as a heating element when the transistor Q3 fails in the short mode, and is affected by the heat generated by the resistor R1. The current path can be interrupted by the interrupting device F2. Also,
According to the tenth aspect, by adding the zener diode D2 to the circuit of the ninth aspect, when the safe operation area of the transistor Q1 becomes a problem, the current path can be quickly cut off to ensure the safety.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an inrush current suppressing device according to the present invention.

FIG. 2 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 3 is a time chart of the inrush current suppressing device according to the present invention.

FIG. 4 is a diagram illustrating a voltage change of each unit when a switch is turned off and then turned on in a short time when a resistor, a transistor, and a DC / DC converter are used.

FIG. 5 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 6 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 7 is a conceptual diagram showing operation timings of the circuit shown in FIG. 5 when a switch SW is turned on.

FIG. 8 is a conceptual diagram showing the operation timing of the circuit when the switch is turned on in a short time after being turned off.

FIG. 9 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 10 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 11 is a circuit diagram showing an example in which the inrush current suppression circuit is used in a DC power supply-driven electronic device.

FIG. 12 is a circuit diagram showing another configuration of the inrush current suppressing device according to the present invention.

FIG. 13 is a circuit diagram showing a configuration of a conventional inrush current suppressing device.

FIG. 14 is a circuit diagram showing another configuration of the conventional inrush current suppressing device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Main power supply 2 Inrush current suppression means 3 Electronic circuit 4 DC / DC converter 5 Control circuit 6 Switching circuit Q1, Q2, Q3 Transistors C1, C2, C3, C4, C5, C6, C7, C8 Capacitors R1, R2, R3 R4, R5, R6, R7, R8, R
9 Resistance D1, D2 Zener diode

Claims (10)

[Claims] 1. An inrush current suppressing device which supplies a DC voltage from a main power supply to an electronic circuit connected to a subsequent stage via an inrush current suppressing means, wherein the inrush current suppressing means includes the main power supply and the inrush current suppressing means. A resistor (R1) connected in series to a circuit connecting the negative sides of the electronic circuits, a resistor (R1) connected in series before the resistor (R1), and connected in parallel to the main power supply. A gate electrode is connected to a connection point between the resistors (R3) and (R4) and the resistors (R3) and (R4), and a source electrode is sandwiched between both ends of the resistor (R1) connected in series on the negative side. An inrush current suppressing device comprising: a transistor (Q1) connected to a drain electrode; and a capacitor (C2) provided between the gate of the transistor and the negative side of the main power supply. 2. An inrush current suppressing device for supplying a DC voltage from a main power supply to an electronic circuit connected to a subsequent stage via an inrush current suppressing means, wherein the inrush current suppressing means includes the main power supply and the inrush current suppressing means. DC /
A DC converter (4) and a resistor (R5) between an output terminal of the DC / DC converter (4) and the negative side of the main power supply;
One end is connected between the resistor (R5) and the capacitor (C3);
A resistor (R6) having the other end connected to the negative side of the main power supply,
A resistor (R1) having a gate electrode connected between the resistors (R5) and (R6) and connected in series to the negative side of the main power supply
A rush current suppressing device comprising a transistor (Q1) having a source electrode and a drain electrode connected with both ends of the transistor (Q1) interposed therebetween. 3. An inrush current suppressing device configured to supply a DC voltage from a main power supply to an electronic circuit connected to a subsequent stage via an inrush current suppressing means, wherein the inrush current suppressing means includes the main power supply and the main power supply. DC /
A DC converter (4) and a resistor (R5) between an output terminal of the DC / DC converter (4) and the negative side of the main power supply;
A resistor (R6) connected through the resistor (R5)
A transistor (Q1) having a gate electrode connected in between the terminals (R6) and (R6) and having a source electrode and a drain electrode connected across both ends of a resistor (R1) connected in series to the negative side of the main power supply; A drain means is connected to the gate electrode of the transistor (Q1), a source electrode is connected to the negative side of the main power supply, and the gate electrode comprises a capacitor (C4) for detecting whether the main power supply is turned on and a differentiating means (R7). A rush current suppressing device, further comprising a transistor (Q2) connected to the inrush current control device. 4. A zener diode (D1) having a cathode connected between the capacitor (C4) and the resistor (R7) and an anode connected to the negative side of the power supply. Inrush current suppression device. 5. One end is connected between the capacitor (C4) and the resistor (R7), and the other end is connected to the transistor (Q2).
4. The rush current suppressing device according to claim 3, further comprising a resistor (R8) connected to said gate. 6. One end is connected between the capacitor (C4) and the resistor (R7), and the other end is connected to the transistor (Q2).
And a Zener diode (D) having a cathode connected between the resistor (R8) and the gate of the transistor (Q2) and an anode connected to the source of the transistor (Q2).
4. The inrush current suppressing device according to claim 3, wherein 1) is provided. 7. A capacitor (C5) having one end connected between the capacitor (C4) and the resistor (R7) and the other end connected to the negative side of the power supply. The inrush current suppressing device as described in the above. 8. The transistor (Q) and said resistor (R8).
7. The rush current suppressing device according to claim 6, wherein a capacitor (C6) having one end connected between the gates and the other end connected to the negative side of the power supply is provided. 9. A control circuit (5) provided in a stage subsequent to the DC / DC converter (4), a current-sensitive type breaker (F1) provided in the main power supply, and a control circuit (5) for the control circuit (5). A transistor (Q3) having an output connected to a gate terminal and performing a switching operation from the main power supply;
A switching circuit (6) having one end connected to the output end of the DC converter and the other end connected to one end of the resistor (R5), and a temperature connected to the drain terminal of the transistor (Q1) and one end of the resistor R1. Sensitive shut-off device (F
9. The rush current suppressing device according to claim 2, further comprising (2). 10. A switching control unit of said switching circuit, wherein a cathode side of a Zener diode is connected and an anode is connected between said Zener diode and a drain terminal of said transistor (Q1). Inrush current suppression device.